NCP4624
150 mA, Wide Input Range,
LDO Linear Voltage
Regulator
The NCP4624 is a CMOS 150 mA LDO linear voltage regulator
which features high input voltage range while maintaining low
quiescent current 2 mA typically. Several protection features like
Current Limiting and Reverse Current Protection Circuit are fully
integrated to create a versatile device suitable for the power source
being in the standby−mode. A high maximum input voltage (11 V) and
wide temperature range (−40°C to 85°C) makes the NCP4624 device
with output capacitor as low as 0.1 mF an ideal choice for industrial
applications also a portable equipments powered by 2−cell Li−ion
battery.
www.onsemi.com
MARKING
DIAGRAMS
XXXMM
SOT−23−5
CASE 1212
1
Features
• Operating Input Voltage Range: 2.5 V to Set VOUT + 6.5 V, Max.
•
•
•
•
•
•
•
•
11 V
Output Voltage Range: 1.2 to 5.5 V (available in 0.1 V steps)
±2% Output Voltage Accuracy
Output Current: min. 150 mA
Line Regulation: 0.02%/V
Current Limit Circuit
Available in SOT−23−5, UDFN4 1.0 x 1.0 mm and SC−88A Package
Built−in Reverse Current Protection Circuit
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
•
•
•
•
•
Home Appliances, Industrial Equipment
Cable Boxes, Satellite Receivers, Entertainment Systems
Car Audio Equipment, Navigation Systems
Notebook Adaptors, LCD TVs, Cordless Phones and Private LAN
Systems
Battery−Powered Portable Communication Equipments
NCP4624x
VIN
VIN
0.1mF
1
UDFN4
CASE 517BR
SC−88A
(SC−70−5/SOT−353)
CASE 419A
XX, XXX, XXXX
M, MM
A
Y
W
G
XXXX MG
G
1
= Specific Device Code
= Date Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
VOUT
See detailed ordering and shipping information in the package
dimensions section on page 15 of this data sheet.
VOUT
C1
XX
MM
1
C2
CE
GND
0.1mF
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2014
August, 2017 − Rev. 3
1
Publication Order Number:
NCP4624/D
NCP4624
NCP4624xxxx
NCP4624Dxx
Vin
Vout Vin
Vref
Vref
Current Limit
CE
Vout
CE
Current Limit
Reverse Detector
Reverse Detector
GND
GND
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
SOT−23−5
SC−88A
UDFN 1x1
Pin Name
1
5
4
VIN
Input pin
2
3
2
GND
Ground pin
3
1
3
CE
Chip enable pin (“H” active)
4
2
NC
Non connected
5
4
1
VOUT
*EP
EP
Description
Output pin
Exposed Pad (leave floating or connect to GND)
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN
−0.3 to 12
V
Output Voltage
VOUT
−0.3 to VIN ≤ 11
V
Chip Enable Input
VCE
−0.3 to VIN ≤ 11
V
Power Dissipation SOT−23−5
PD
420
mW
Input Voltage (Note 1)
Power Dissipation uDFN 1.0 x 1.0 mm
400
Power Dissipation SC−88A
380
Junction Temperature
TJ
−40 to 150
°C
Storage Temperature
TSTG
−55 to 125
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to Electrical Characteristics and Application Information for safe operating area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
www.onsemi.com
2
NCP4624
THERMAL CHARACTERISTICS
Symbol
Value
Unit
Thermal Characteristics, SOT−23−5
Thermal Resistance, Junction−to−Air
Rating
RqJA
238
°C/W
Thermal Characteristics, uDFN 1x1
Thermal Resistance, Junction−to−Air
RqJA
250
°C/W
Thermal Characteristics, SC−88A
Thermal Resistance, Junction−to−Air
RqJA
263
°C/W
ELECTRICAL CHARACTERISTICS −40°C ≤ TA ≤ 85°C; CIN = COUT = 0.1 mF, unless otherwise noted. Typical values are at
TA = +25°C.
Parameter
Operating Input Voltage
Test Conditions
Symbol
Min
1.2 V < VOUT < 4.5 V
VIN
2.5
Typ
4.5 V ≤ VOUT < 5.5 V
Output Voltage
Output Voltage Temp. Coefficient
Ta = 25°C, VOUT > 1.5 V
Max
Unit
Vset +
6.5
V
11
VOUT
x0.99
x1.01
−40°C < TA < 85°C, VOUT > 1.5V
x0.982
x1.018
TA = 25°C, VOUT < 1.5 V
−15
+15
−40°C < TA < 85°C, VOUT < 1.5V
−28
Line Regulation
Set VOUT + 0.5 V < VIN < VIN max, IOUT = 1 mA
LineReg
Load Regulation
VIN = VOUT + 2 V, 0.1mA < IOUT ≤ 150 mA
LoadReg
1.2 V ≤ VOUT < 1.3 V
IOUT = 150 mA
Dropout Voltage
−35
VDO
ppm/°C
0.02
0.20
%/V
−3
35
mV
V
1.68
2.59
1.3 V ≤ VOUT < 1.5 V
1.63
2.49
1.5 V ≤ VOUT < 1.8 V
1.48
2.23
1.8 V ≤ VOUT < 2.3 V
1.16
2.19
2.3 V ≤ VOUT < 3.0 V
0.90
1.47
3.0 V ≤ VOUT < 4.0 V
0.61
1.05
4.0 V ≤ VOUT ≤ 5.5 V
0.39
0.76
Output Current
IOUT
mV
+28
±100
VIN = VOUT + 2 V, IOUT = 100 mA, TA = −40 to
105°C
V
150
mA
Short Current Limit
VOUT = 0 V
ISC
45
Quiescent Current
Iout = 0 mA
IQ
2.0
3.7
mA
VIN = VIN max , VCE = 0 V
ISTB
0.2
0.6
mA
0.9
mA
CE Input Voltage “H”
VCEH
1.7
VIN
V
0
Standby Current
CE Pin Pull−Down Current
CE Pin Threshold Voltage
IPD
0.3
mA
CE Input Voltage “L”
VCEL
Reverse Current
0 V ≤ VIN < 11 V, VOUT > 1.5 V
IREV
0
0.16
mA
Reverse Current Detection Offset
0 V ≤ VIN < 11 V, VOUT > 1.5 V
VREV_DET
55
100
mV
0 V ≤ VIN < 11 V, VOUT > 1.5 V
VREV_REL
70
120
mV
PSRR
27
Reverse Current Release Offset
Power Supply Rejection Ratio
Output Noise Voltage
Autodischarge NMOS Resistance
VIN = VOUT + 2.5 V,
ΔVIN_PK−PK = 0.3 V,
IOUT = 50 mA, f = 1 kHz
VOUT = 1.2 V
0.8
VOUT = 2.5 V
22
VOUT = 3.3 V
18
VOUT = 5.5 V
15
dB
VOUT = 1.2 V, IOUT = 30 mA, f = 100 Hz to 100 kHz
VNOISE
105
mVrms
VIN = 7.0 V, VCE = 0.0 V (D version only)
RDSON
380
W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
www.onsemi.com
3
NCP4624
TYPICAL CHARACTERISTICS
1.4
3.5
1.2
3
0.8
VIN = 2.5 V
VOUT (V)
VOUT (V)
2.5
7.5 V
1
4.0 V
5.5 V
0.6
2
1.5
0.4
1
0.2
0.5
VIN = 9.8 V
5.8 V
0
0
0
50
100
150
200
250
300
350
0
400
50
300
350
400
1.4
1.2
VIN = 6.5 V
VOUT (V)
VOUT (V)
250
Figure 4. Output Voltage vs. Output Current
3.3 V Version (TJ = 255C)
1
3
11 V
2
1 mA
IOUT = 50 mA
0.8
0.6
30 mA
0.4
1
0.2
0
50
100
150
200
250
300
350
0
400
1
2
3
4
5
6
7
IOUT (mA)
VIN (V)
Figure 5. Output Voltage vs. Output Current
5.5 V Version (TJ = 255C)
Figure 6. Output Voltage vs. Input Voltage
1.2 V Version
4
7
3.5
6
3
5
VOUT (V)
2.5
2
4
3
1 mA
1 mA
2
30 mA
1
30 mA
1
0.5
0
0
200
Figure 3. Output Voltage vs. Output Current
1.2 V Version (TJ = 255C)
4
1.5
150
IOUT (mA)
5
0
0
100
IOUT (mA)
6
VOUT (V)
4.3 V
IOUT = 50 mA
IOUT = 50 mA
0
1
2
3
4
5
VIN (V)
6
7
8
9
10
0
Figure 7. Output Voltage vs. Input Voltage
3.3 V Version
1
2
3
4
5
6
VIN (V)
7
8
9
10
Figure 8. Output Voltage vs. Input Voltage
5.5 V Version
www.onsemi.com
4
11
NCP4624
TYPICAL CHARACTERISTICS
1.22
3.33
3.32
1.21
VOUT (V)
VOUT (V)
3.31
1.2
3.3
3.29
1.19
3.28
1.18
−40
−20
0
20
40
60
3.27
−40
80
20
40
60
80
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 10. Output Voltage vs. Temperature,
3.3 V Version
QUIESCENT CURRENT (mA)
2
5.5
5.49
VOUT (V)
0
Figure 9. Output Voltage vs. Temperature,
1.2 V Version
5.51
5.48
5.47
5.46
5.45
−40
1.6
1.2
0.8
0.4
0
−20
0
20
40
60
0
80
1
2
3
4
5
6
7
TJ, JUNCTION TEMPERATURE (°C)
VIN (V)
Figure 11. Output Voltage vs. Temperature,
5.5 V Version
Figure 12. Quiescent Current vs. Input
Voltage, 1.2 V Version
2.5
8
2.5
QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)
−20
2
1.5
1
0.5
0
2
1.5
1
0.5
0
0
1
2
3
4
5
6
VIN (V)
7
8
9
10
0
Figure 13. Quiescent Current vs. Input
Voltage, 3.3 V Version
2
4
6
VIN (V)
8
10
Figure 14. Quiescent Current vs. Input
Voltage, 5.5 V Version
www.onsemi.com
5
12
NCP4624
TYPICAL CHARACTERISTICS
0.8
1.6
DROPOUT VOLTAGE (V)
DROPOUT VOLTAGE (V)
2
TA = 85°C
TA = −40°C
1.2
TA = 25°C
0.8
0.4
0
0.6
0.4
TA = −40°C
0.2
0
0
30
60
90
120
150
0
30
60
90
120
150
IOUT (mA)
IOUT (mA)
Figure 16. Dropout Voltage vs. Output Current,
3.3 V Version
6
VN, OUTPUT VOLTAGE NOISE
(mVrms/√Hz)
DROPOUT VOLTAGE (V)
TA = 25°C
Figure 15. Dropout Voltage vs. Output Current,
1.2 V Version
0.5
0.4
0.3
TA = 85°C
0.2
TA = −40°C
TA = 25°C
0.1
0
0
30
60
90
IOUT (mA)
120
150
5
4
3
2
1
0
10
Figure 17. Dropout Voltage vs. Output Current,
5.5 V Version
100
1k
10k
FREQUENCY (Hz)
100k
1M
Figure 18. Output Voltage Noise, 1.2 V Version,
VIN = 2.5 V, IOUT = 30 mA, Cin = Cout = 0.1 mF
12
14
VN, OUTPUT VOLTAGE NOISE
(mVrms/√Hz)
VN, OUTPUT VOLTAGE NOISE
(mVrms/√Hz)
TA = 85°C
10
8
6
4
2
0
10
12
10
8
6
4
2
0
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 19. Output Voltage Noise, 3.3 V Version,
VIN = 4.3 V, IOUT = 30 mA, Cin = Cout = 0.1 mF
Figure 20. Output Voltage Noise, 5.5 V Version,
VIN = 6.5 V, IOUT = 30 mA, Cin = Cout = 0.1 mF
www.onsemi.com
6
NCP4624
TYPICAL CHARACTERISTICS
70
60
60
50
PSRR (dB)
1 mA
40
30
30 mA
1 mA
30
30 mA
IOUT = 50 mA
10
10
IOUT = 50 mA
100
1k
10k
100k
0
1M
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. PSRR vs. Frequency, 1.2 V Version
Figure 22. PSRR vs. Frequency, 3.3 V Version
60
50
1 mA
40
30
30 mA
20
10
IOUT = 50 mA
0
10
100
1k
10k
FREQUENCY (kHz)
100k
1M
Figure 23. PSRR vs. Frequency, 5.5 V Version
4.0
3.5
3.0
2.5
1.8
VIN (V)
10
PSRR (dB)
0
40
20
20
VOUT (V)
PSRR (dB)
50
1.6
1.4
1.2
1.0
0.8
0.60
0.1 0.2
0.3
0.4
0.5 0.6
t (ms)
0.7
0.8
0.9
Figure 24. Line Transients, 1.2 V Version,
IOUT = 1 mA
www.onsemi.com
7
1.0
1M
NCP4624
TYPICAL CHARACTERISTICS
5.8
5.3
4.8
VIN (V)
VOUT (V)
4.3
3.9
3.7
3.5
3.3
3.1
2.9
2.7 0
0.1 0.2
0.3
0.4
0.5 0.6
t (ms)
0.7
0.8
0.9
1.0
Figure 25. Line Transients, 3.3 V Version,
IOUT = 1 mA
8.0
7.5
7.0
6.1
VIN (V)
VOUT (V)
6.5
5.9
5.7
5.5
5.3
5.1
4.9
0
0.1 0.2
0.3
0.4
0.5 0.6
t (ms)
0.7
0.8
0.9
1.0
Figure 26. Line Transients, 5.5 V Version,
IOUT = 1 mA
15
10
5
IOUT (mA)
VOUT (V)
0
1.8
1.6
1.4
1.2
1.0
0.8
0.6 0
40
80
120 160 200 240
t (ms)
280 320 360 400
Figure 27. Load Transients, 1.2 V Version, Load
Step 1 mA to 10 mA,
VIN = 2.5 V
www.onsemi.com
8
NCP4624
TYPICAL CHARACTERISTICS
15
10
5
IOUT (mA)
VOUT (V)
0
3.9
3.7
3.5
3.3
3.1
2.9
2.70
40
80
120 160 200 240
t (ms)
280 320 360 400
Figure 28. Load Transients, 3.3 V Version, Load
Step 1 mA to 10 mA, VIN = 4.3 V
15
10
5
IOUT (mA)
VOUT (V)
0
6.1
5.9
5.7
5.5
5.3
5.1
4.90
40
80
120 160 200 240
t (ms)
280 320 360 400
Figure 29. Load Transients, 5.5 V Version, Load
Step 1 mA to 10 mA, VIN = 6.5 V
150
100
50
IOUT (mA)
VOUT (V)
0
2.4
2.0
1.6
1.2
0.8
0.4
0.0
0
40
80
120 160 200 240
t (ms)
280 320 360 400
Figure 30. Load Transients, 1.2 V Version, Load
Step 50 mA to 100 mA, VIN = 2.5 V
www.onsemi.com
9
NCP4624
TYPICAL CHARACTERISTICS
150
100
50
0
IOUT (mA)
VOUT (V)
4.5
4.1
3.7
3.3
2.9
2.5
2.1
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 31. Load Transients, 3.3 V Version, Load
Step 50 mA to 100 mA, VIN = 4.3 V
150
100
50
0
IOUT (mA)
VOUT (V)
6.7
6.3
5.9
5.5
5.1
4.7
4.3
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 32. Load Transients, 5.5 V Version, Load
Step 50 mA to 100 mA, VIN = 6.5 V
4.5
Chip Enable
3.0
1.5
VCE (V)
VOUT (V)
0.0
IOUT = 1 mA
1.2
0.9
IOUT = 30 mA
0.6
0.3
IOUT = 150 mA
0.0
−0.3
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 33. Turn−on Behavior, 1.2 Version,
VIN = 3 V
www.onsemi.com
10
NCP4624
TYPICAL CHARACTERISTICS
6.6
Chip Enable
4.4
2.2
VCE (V)
VOUT (V)
0.0
4.0
3.0
IOUT = 1 mA
2.0
IOUT = 30 mA
1.0
IOUT = 150 mA
0.0
1.0
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 34. Turn−on Behavior, 3.3 Version,
VIN = 4.3 V
9.75
Chip Enable
6.50
3.25
VCE (V)
VOUT (V)
0.00
6.0
4.5
IOUT = 1 mA
3.0
IOUT = 30 mA
1.5
IOUT = 150 mA
0.0
−1.5
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 35. Turn−on Behavior, 5.5 Version,
VIN = 6.5 V
4.5
3.0
1.5
0.0
1.2
IOUT = 30 mA
0.9
0.6
IOUT = 150 mA
0.3
IOUT = 1 mA
0.0
−0.3
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 36. Turn−off Behavior, 1.2 Version,
VIN = 3 V
www.onsemi.com
11
VCE (V)
VOUT (V)
Chip Enable
NCP4624
TYPICAL CHARACTERISTICS
6.6
4.4
4.0
2.2
0.0
VCE (V)
VOUT (V)
Chip Enable
IOUT = 30 mA
3.0
2.0
IOUT = 150 mA
1.0
IOUT = 1 mA
0.0
−1.0
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 37. Turn−off Behavior, 3.3 Version,
VIN = 4.3 V
9.75
6.50
3.25
0.00
IOUT = 30 mA
6.0
4.5
3.0
IOUT = 150 mA
1.5
IOUT = 1 mA
0.0
−1.5
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 38. Turn−off Behavior, 5.5 Version,
VIN = 6.5 V
www.onsemi.com
12
VCE (V)
VOUT (V)
Chip Enable
NCP4624
APPLICATION INFORMATION
down current source which assure off state of LDO in case
the CE pin will stay floating. If the enable function is not
needed connect CE pin to VIN.
The D version of the NCP4624 includes a transistor
between VOUT and GND that is used for faster discharging
of the output capacitor. This function is activated when the
IC goes into disable mode.
A typical application circuit for NCP4624 series is shown
in the Figure 39.
NCP4624x
VIN
VIN
VOUT
VOUT
C1
C2
CE
GND
0.1mF
0.1mF
Thermal Consideration
As a power across the IC increase, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and also the ambient
temperature affect the rate of temperature increase for the
part. When the device has good thermal conductivity
through the PCB the junction temperature will be relatively
low in high power dissipation applications.
Figure 39. Typical Application Schematic
Input Decoupling Capacitor (C1)
A 100 nF ceramic input decoupling capacitor should be
connected as close as possible to the input and ground pin of
the NCP4624. Higher values and lower ESR improves line
transient response.
Reverse Current Protection Circuit
Internal Reverse Current Circuitry stops the reverse
current from VOUT pin to GND pin and VIN pin when
VOUT goes higher than VIN voltage or VSET voltage. VSET
means voltage given by voltage version. The parasitic diode
of PMOS pass device is internally switched to reverse
direction before VIN becomes lower than VOUT. The
operation coverage of the Reverse Current Protection
Circuit is VOUT > 1.5 V. In order to avoid unstable behavior
a hysteresis is created by different threshold of detecting
voltage VREV_DET and releasing voltage VREV_REL. See
Figures 40 and 41 for details of configuration.
Output Decoupling Capacitor (C2)
A 100 nF ceramic output decoupling capacitor is
sufficient to achieve stable operation of the IC. If tantalum
capacitor is used, and its ESR is high, the loop oscillation
may result. The capacitor should be connected as close as
possible to the output and ground pin. Larger values and
lower ESR improves dynamic parameters.
Enable Operation
The enable pin CE may be used for turning the regulator
on and off. The IC is switched on when a high level voltage
is applied to the CE pin. The enable pin has an internal pull
Vin
Vin
Vout
Vout
Vref
CE
Vref
Current
Limit
Current
Limit
CE
Reverse Detector
Reverse Detector
GND
GND
Figure 40. Normal Operating Mode
Figure 41. Reverse Current Protection Mode
www.onsemi.com
13
NCP4624
• The conditions when the device performs stable
ESR versus Output Current
When using the NCP4624 devices, consider the following
points:
• The relation between Output Current IOUT and ESR of
the output capacitor are shown below in Figures 42, 43
and 44.
operation are marked as the hatched area in the charts.
NCP4624xxx12xx, VIN = 2.5 V,
CIN = COUT = 0.1 mF, TA = 25°C
NCP4624xxx33xx, VIN = 4.3 V,
CIN = COUT = 0.1 mF, TA = 25°C
Figure 42. ESR vs. Load Current
Figure 43. ESR vs. Load Current
NCP4624xxx55xx, VIN = 6.5 V,
CIN = COUT = 0.1 mF, TA = 25°C
Figure 44. ESR vs. Load Current
www.onsemi.com
14
NCP4624
ORDERING INFORMATION
Device
NCP4624DMU12TCG
Marking
Nominal Output
Voltage
Feature
Package
Shipping
5A
1.2 V
Enable High,
UDFN4
(Pb−Free)
10000 / Tape & Reel
UDFN4
(Pb−Free)
10000 / Tape & Reel
UDFN4
(Pb−Free)
10000 / Tape & Reel
UDFN4
(Pb−Free)
10000 / Tape & Reel
SOT−23−5
(Pb−Free)
3000 / Tape & Reel
SOT−23−5
(Pb−Free)
3000 / Tape & Reel
SOT−23−5
(Pb−Free)
3000 / Tape & Reel
SOT−23−5
(Pb−Free)
3000 / Tape & Reel
SC−88A
(Pb−Free)
3000 / Tape & Reel
SC−88A
(Pb−Free)
3000 / Tape & Reel
Auto discharge
NCP4624DMU30TCG
5X
3.0 V
NCP4624DMU33TCG
6A
3.3 V
Enable High,
Auto discharge
Enable High,
Auto discharge
NCP4624DMU50TCG
6T
5.0 V
Enable High,
Auto discharge
NCP4624DSN12T1G
F12
1.2 V
NCP4624DSN18T1G
F18
1.8 V
Enable High,
Auto discharge
Enable High,
Auto discharge
NCP4624DSN33T1G
F33
3.3 V
Enable High,
Auto discharge
NCP4624DSN50T1G
F50
5.0 V
NCP4624DSQ12T1G
AT12
1.2. V
Enable High,
Auto discharge
Enable High,
Auto discharge
NCP4624DSQ33T1G
AT33
3.3 V
Enable High,
Auto discharge
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
15
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23 5−LEAD
CASE 1212−01
ISSUE A
DATE 28 JAN 2011
SCALE 2:1
A
5
E
1
A2
0.05 S
B
D
A1
4
2
L
3
L1
5X
e
E1
b
0.10
C
M
C B
A
S
S
C
RECOMMENDED
SOLDERING FOOTPRINT*
3.30
XXX = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DESCRIPTION:
98ASH70518A
SOT−23 5−LEAD
MILLIMETERS
MIN
MAX
--1.45
0.00
0.10
1.00
1.30
0.30
0.50
0.10
0.25
2.70
3.10
2.50
3.10
1.50
1.80
0.95 BSC
0.20
--0.45
0.75
XXX MG
G
0.85
0.56
DIM
A
A1
A2
b
c
D
E
E1
e
L
L1
GENERIC
MARKING DIAGRAM*
5X
5X
DOCUMENT NUMBER:
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSIONS: MILLIMETERS.
3. DATUM C IS THE SEATING PLANE.
A
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE L
SCALE 2:1
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
G
5
4
−B−
S
1
2
DATE 17 JAN 2013
DIM
A
B
C
D
G
H
J
K
N
S
3
D 5 PL
0.2 (0.008)
B
M
M
N
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
--0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
--0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
J
GENERIC MARKING
DIAGRAM*
C
K
H
XXXMG
G
SOLDER FOOTPRINT
0.50
0.0197
XXX = Specific Device Code
M
= Date Code
G
= Pb−Free Package
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
mm Ǔ
ǒinches
STYLE 1:
PIN 1. BASE
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
STYLE 2:
PIN 1. ANODE
2. EMITTER
3. BASE
4. COLLECTOR
5. CATHODE
STYLE 3:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. CATHODE 1
STYLE 4:
PIN 1. SOURCE 1
2. DRAIN 1/2
3. SOURCE 1
4. GATE 1
5. GATE 2
STYLE 6:
PIN 1. EMITTER 2
2. BASE 2
3. EMITTER 1
4. COLLECTOR
5. COLLECTOR 2/BASE 1
STYLE 7:
PIN 1. BASE
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
STYLE 8:
PIN 1. CATHODE
2. COLLECTOR
3. N/C
4. BASE
5. EMITTER
STYLE 9:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. ANODE
5. ANODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42984B
STYLE 5:
PIN 1. CATHODE
2. COMMON ANODE
3. CATHODE 2
4. CATHODE 3
5. CATHODE 4
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
SC−88A (SC−70−5/SOT−353)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UDFN4 1.0x1.0, 0.65P
CASE 517BR−01
ISSUE O
1
SCALE 4:1
PIN ONE
REFERENCE
2X
0.05 C
4X
A
B
D
ÉÉ
ÉÉ
typ
DETAIL A
0.05 C
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L3
c 0.18
L2
E
3X
TOP VIEW
0.43
4X
(A3)
0.05 C
A
3X
0.05 C
NOTE 4
A1
SIDE VIEW
e
DETAIL A
e/2
1
3X
2
DATE 27 OCT 2010
C
SEATING
PLANE
DETAIL B
0.10
0.23
DIM
A
A1
A3
b
D
D2
E
e
L
L2
L3
GENERIC
MARKING DIAGRAM*
L
1
D2
4
3
4X
b
0.05
XX
MM
XX = Specific Device Code
MM = Date Code
D2
45 5
MILLIMETERS
MIN
MAX
−−−
0.60
0.00
0.05
0.10 REF
0.20
0.30
1.00 BSC
0.43
0.53
1.00 BSC
0.65 BSC
0.20
0.30
0.27
0.37
0.02
0.12
M
C A B
NOTE 3
BOTTOM VIEW
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
RECOMMENDED
MOUNTING FOOTPRINT*
0.65
PITCH
DETAIL B
2X
0.52
PACKAGE
OUTLINE
1.30
0.53
4X
0.30
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON53254E
UDFN4, 1.0X1.0, 0.65P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Email Requests to: orderlit@onsemi.com
onsemi Website: www.onsemi.com
◊
TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800−282−9855 Toll Free USA/Canada
Phone: 011 421 33 790 2910
Europe, Middle East and Africa Technical Support:
Phone: 00421 33 790 2910
For additional information, please contact your local Sales Representative
工商网监
湘ICP备2023018690号
