NCP4629

NCP4629 500 mA, Wide Input Range, LDO Linear Voltage Regulator The NCP4629 is a CMOS 500 mA LDO linear voltage regulator which features a high input voltage range while maintaining a low quiescent current. Several protection features like current limiting and thermal shutdown are fully integrated to create a versatile and robust device. A high maximum input voltage (36 V) and wide temperature range (−40°C to 105°C) makes the NCP4629 an ideal choice for high power industrial applications. Features http://onsemi.com MARKING DIAGRAMS • • • • • • • • • • • • • • Operating Input Voltage Range: 4 V to 24 V Output Voltage Range: 3.0 to 12.0 V (available in 0.1 V steps) ±2% Output Voltage Accuracy Output Current: min. 500 mA (VIN = VOUT + 1 V) Line Regulation: 0.05%/V Current Limit Circuit Thermal Shutdown Circuit Available in SOT−89−5 and DPACK5 Package These are Pb−Free Devices Home appliances, industrial equipment Cable boxes, satellite receivers, entertainment systems Car audio equipment, navigation systems Notebook adaptors, LCD TVs, cordless phones and private LAN systems Office equipment: copiers, printers, facsimiles, scanners, projectors, monitors VIN C1 470 n NCP4629x VIN CE VOUT GND VOUT C2 10 m XXXXXXXX XX MM DPAK−5 CASE 369AE 1 1 SOT−89 5 CASE 528AB XXX XMM Typical Applications XX, XXX= Specific Device Code M, MM = Date Code A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (*Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. Figure 1. Typical Application Schematic © Semiconductor Components Industries, LLC, 2011 June, 2011 − Rev. 0 1 Publication Order Number: NCP4629/D NCP4629 VIN VOUT Vref CE Current Limit Short Protection Thermal Shutdown GND Figure 2. Simplified Schematic Block Diagram PIN FUNCTION DESCRIPTION Pin No. SOT89 1 2 3 4 5 Pin No. DPACK 1 2 3 4 5 Pin Name VIN GND GND CE VOUT Input pin Ground pin, all ground pins must be connected together when it is mounted on board Ground pin, all ground pins must be connected together when it is mounted on board Chip enable pin (“H” active) Output pin Description ABSOLUTE MAXIMUM RATINGS Rating Input Voltage Output Voltage Chip Enable Input Power Dissipation SOT−89 Power Dissipation DPACK Junction Temperature Storage Temperature ESD Capability, Human Body Model (Note 2) ESD Capability, Machine Model (Note 2) TJ TSTG ESDHBM ESDMM Symbol VIN VOUT VCE PD Value −0.3 to 36 −0.3 to VIN ≤ 36 −0.3 to VIN ≤ 36 900 1900 −40 to 150 −55 to 125 2000 200 °C °C V V Unit V V V mW Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Duration time = 200 ms 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114) ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115) Latch−up Current Maximum Rating tested per JEDEC standard: JESD78. http://onsemi.com 2 NCP4629 THERMAL CHARACTERISTICS Rating Thermal Characteristics, SOT−89 Thermal Resistance, Junction−to−Air Thermal Characteristics, DPACK Thermal Resistance, Junction−to−Air Symbol RqJA RqJA Value 111 53 Unit °C/W °C/W ELECTRICAL CHARACTERISTICS TA = 25°C Parameter Operating Input Voltage Output Voltage Output Voltage Temp. Coefficient Line Regulation Load Regulation Dropout Voltage VIN = VOUT + 1 V, IOUT = 100 mA VIN = VOUT + 2 V, IOUT = 100 mA, TA = −40 to 105°C VIN = VOUT + 1 V to 24 V, IOUT = 10 mA VIN = VOUT + 2 V, IOUT = 0.1 mA to 200 mA IOUT = 200 mA 3.0 V ≤ VOUT < 5.0 V 5.0 V ≤ VOUT < 9.0 V 8.0 V ≤ VOUT ≤ 12.0 V Output Current Short Current Limit Quiescent Current Standby Current CE Pin Threshold Voltage VIN = VOUT + 1 V VOUT = 0 V VIN = VOUT + 1 V, VIN = VCE VIN = 24 V, VCE = 0 V CE Input Voltage “H” CE Input Voltage “L” Thermal Shutdown Temperature Thermal Shutdown Release Temperature Power Supply Rejection Ratio VIN = VOUT + 2.0 V, ΔVIN_PK−PK = 0.5 V, IOUT = 100 mA, f = 1 kHz VOUT ≤ 6.0 V VOUT > 6.0 V VN IOUT ISC IQ ISTB VCEH VCEL TSD TSR PSRR 2.0 0 160 135 60 50 TBD mVrms 500 65 70 0.1 130 1 VIN 0.4 °C °C dB LineReg LoadReg VDO Test Conditions Symbol VIN VOUT Min 4 x0.98 ±100 0.05 25 0.135 0.115 0.095 0.10 60 0.225 0.180 0.155 mA mA mA mA V Typ Max 24 x1.02 Unit V V ppm/°C %/V mV V Output Noise Voltage VOUT = TBD V, IOUT = TBD mA, f = 10 Hz to 100 kHz http://onsemi.com 3 NCP4629 TYPICAL CHARACTERISTICS 6 9.0 V VOUT, OUTPUT VOLTAGE (V) 5 VIN = 5.5 V 4 3 2 1 0 0 200 400 600 800 1000 IOUT, OUTPUT CURRENT (mA) 6.0 V 7.0 V VOUT, OUTPUT VOLTAGE (V) 6 5 4 3 2 1 0 0 200 400 600 800 1000 1200 IOUT, OUTPUT CURRENT (mA) VIN = 6.5 V 7.0 V 8.0 V 10 V 7 Figure 3. Output Voltage vs. Output Current, VOUT = 5 V 14 VOUT, OUTPUT VOLTAGE (V) VIN = 12.5 V 13 V 15 V 16 V 4 2 0 0 200 400 600 800 1000 VOUT, OUTPUT VOLTAGE (V) 12 10 8 6 6 5 4 Figure 4. Output Voltage vs. Output Current, VOUT = 6 V IOUT = 0.1 mA 3 2 1 0 100 mA 500 mA 0 1 2 3 4 5 6 7 8 9 10 IOUT, OUTPUT CURRENT (mA) VIN, INPUT VOLTAGE (V) Figure 5. Output Voltage vs. Output Current, VOUT = 12 V 7 VOUT, OUTPUT VOLTAGE (V) VOUT, OUTPUT VOLTAGE (V) 6 5 4 3 2 1 0 0 1 2 3 4 100 mA 500 mA 5 6 7 8 9 10 IOUT = 0.1 mA 14 12 10 8 6 4 2 0 0 Figure 6. Output Voltage vs. Input Voltage, VOUT = 5 V IOUT = 0.1 mA 100 mA 500 mA 3 6 9 12 15 VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) Figure 7. Output Voltage vs. Input Voltage, VOUT = 6 V Figure 8. Output Voltage vs. Input Voltage, VOUT = 12 V http://onsemi.com 4 NCP4629 TYPICAL CHARACTERISTICS 5.1 VOUT, OUTPUT VOLTAGE (V) VOUT, OUTPUT VOLTAGE (V) −20 0 20 40 60 80 100 120 6.1 5.05 6.05 5 6 4.95 5.95 4.9 −40 5.9 −40 −20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) Figure 9. Output Voltage vs. Temperature, VOUT = 5 V 12.1 VOUT, OUTPUT VOLTAGE (V) 80 70 SUPPLY CURRENT (mA) 60 50 40 30 20 10 11.9 −40 −20 0 20 40 60 80 100 120 0 0 Figure 10. Output Voltage vs. Temperature, VOUT = 6 V 12.05 12 11.95 1 2 3 4 5 6 7 8 9 10 TEMPERATURE (°C) Figure 11. Output Voltage vs. Temperature, VOUT = 12 V 80 70 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 60 50 40 30 20 10 0 0 2 4 6 8 10 12 80 70 60 50 40 30 20 10 0 0 Figure 12. Supply Current vs. Input Voltage, VOUT = 5 V VIN, INPUT VOLTAGE (V) 2 4 6 8 10 12 14 16 Figure 13. Supply Current vs. Input Voltage, VOUT = 6 V VIN, INPUT VOLTAGE (V) Figure 14. Supply Current vs. Input Voltage, VOUT = 12 V VIN, INPUT VOLTAGE (V) http://onsemi.com 5 NCP4629 TYPICAL CHARACTERISTICS 0.4 0.35 DROPOUT VOLTAGE (V) 0.3 0.25 0.2 0.15 0.1 0.05 0 0 100 200 300 400 500 TA = 110°C −40°C 25°C DROPOUT VOLTAGE (V) 0.4 0.35 0.3 0.25 0.2 0.15 0.1 0.05 0 0 100 200 300 400 500 −40°C TA = 110°C 25°C Figure 15. Dropout Voltage vs. Input Current, VOUT = 5 V 0.4 0.35 DROPOUT VOLTAGE (V) 0.3 PSRR (dB) 0.25 0.2 0.15 0.1 0.05 0 0 100 200 300 400 500 −40°C 25°C TA = 110°C 80 60 40 20 0 0.1 120 100 IOUT, OUTPUT CURRENT (mA) Figure 16. Dropout Voltage vs. Input Current, VOUT = 6 V IOUT, OUTPUT CURRENT (mA) IOUT = 1 mA 100 mA 300 mA 1.0 10.0 FREQUENCY (kHz) 100.0 1000 Figure 17. Dropout Voltage vs. Input Current, VOUT = 12 V 120 100 80 PSRR (dB) PSRR (dB) 60 40 20 0 300 mA 0.1 1.0 10.0 FREQUENCY (kHz) 100.0 1000 IOUT = 1 mA 100 mA 120 100 80 60 40 20 0 IOUT, OUTPUT CURRENT (mA) Figure 18. Ripple Rejection vs. Frequency, VOUT = 5 V IOUT = 1 mA 100 mA 300 mA 0.1 1.0 10.0 FREQUENCY (kHz) 100.0 1000 Figure 19. Ripple Rejection vs. Frequency, VOUT = 6 V Figure 20. Ripple Rejection vs. Frequency, VOUT = 12 V http://onsemi.com 6 NCP4629 TYPICAL CHARACTERISTICS 8 VN, NOISE DENSITY (mVrms/√Hz) VN, NOISE DENSITY (mVrms/√Hz) 0.1 1 10 100 1000 7 6 5 4 3 2 1 0 0.01 12 10 8 6 4 2 0 0.01 0.1 1 10 100 1000 FREQUENCY (kHz) FREQUENCY (kHz) Figure 21. Output Noise Density, VOUT = 5 V 30 VN, NOISE DENSITY (mVrms/√Hz) 25 20 15 10 5 0 0.01 Figure 22. Output Noise Density, VOUT = 6 V 0.1 1 10 FREQUENCY (kHz) 100 1000 Figure 23. Output Noise Density, VOUT = 12 V 750 500 250 0 5.05 5.00 4.95 4.90 4.85 4.80 0.0 0.2 0.4 0.6 0.8 1.0 1.2 t (ms) 1.4 1.6 1.8 2.0 IOUT (mA) VOUT (V) 5.10 Figure 24. Load Transient Response at Output Current Step 1 mA to 500 mA, VOUT = 5 V http://onsemi.com 7 NCP4629 TYPICAL CHARACTERISTICS 750 500 250 0 6.05 6.00 5.95 5.90 5.85 5.80 0.0 0.2 0.4 0.6 0.8 1.0 1.2 t (ms) 1.4 1.6 1.8 2.0 IOUT (mA) VOUT (V) 6.10 Figure 25. Load Transient Response at Output Current Step 1 mA to 500 mA, VOUT = 6 V 750 500 250 0 12.05 12.00 11.95 11.90 11.85 11.80 0.0 0.2 0.4 0.6 0.8 1.0 1.2 t (ms) 1.4 1.6 1.8 2.0 IOUT (mA) VOUT (V) 12.10 Figure 26. Load Transient Response at Output Current Step 1 mA to 500 mA, VOUT = 12 V 150 100 50 0 5.02 5.01 5.00 4.99 4.98 4.97 0 40 80 120 160 200 240 280 320 360 400 t (ms) IOUT (mA) VOUT (V) Figure 27. Load Transient Response at Output Current Step 50 mA to 100 mA, VOUT = 5 V http://onsemi.com 8 NCP4629 TYPICAL CHARACTERISTICS 150 100 50 0 6.02 6.01 6.00 5.99 5.98 5.97 0 40 80 120 160 200 240 280 320 360 400 t (ms) IOUT (mA) VOUT (V) Figure 28. Load Transient Response at Output Current Step 50 mA to 100 mA, VOUT = 6 V 150 100 50 0 12.02 12.01 12.00 11.99 11.98 11.97 0 40 80 120 160 200 240 280 320 360 400 t (ms) IOUT (mA) VOUT (V) Figure 29. Load Transient Response at Output Current Step 50 mA to 100 mA, VOUT = 12 V 9 8 7 6 VOUT (V) 5.04 5.02 5.00 4.98 4.96 4.94 0 20 40 60 80 100 120 140 160 180 200 t (ms) VIN (V) 5.06 Figure 30. Line Transient Response, VOUT = 5 V http://onsemi.com 9 NCP4629 TYPICAL CHARACTERISTICS 10 9 8 7 VOUT (V) 6.04 6.02 6.00 5.98 5.96 5.94 0 20 40 60 80 100 120 140 160 180 200 t (ms) VIN (V) 6.06 Figure 31. Line Transient Response, VOUT = 6 V 16 15 14 13 VOUT (V) 12.04 12.02 12.00 11.98 11.96 11.94 0 20 40 60 80 100 120 140 160 180 200 t (ms) VIN (V) 12.06 Figure 32. Line Transient Response, VOUT = 12 V Chip Enable 9 6 3 0 VOUT (V) 4 3 2 1 0 −1 0 40 80 120 160 200 240 280 320 360 400 t (ms) IOUT = 1 mA VCE (V) 5 IOUT = 100 mA IOUT = 500 mA Figure 33. Turn−on Behavior with CE, VOUT = 5 V http://onsemi.com 10 NCP4629 TYPICAL CHARACTERISTICS 10.5 7.0 3.5 0.0 VOUT (V) 8 6 4 2 0 −2 0 40 80 120 160 200 240 280 320 360 400 t (ms) IOUT = 500 mA IOUT = 1 mA IOUT = 100 mA VCE (V) Chip Enable 19.5 13 6.5 VOUT (V) IOUT = 100 mA IOUT = 500 mA VCE (V) VCE (V) IOUT = 100 mA 5 t (ms) 6 7 8 9 10 11 10 8 6 4 2 0 −2 0.0 0.2 0.4 0.6 0.8 1.0 t (ms) 1.2 1.4 1.6 1.8 2.0 IOUT = 1 mA 0 9 6 Chip Enable 5 4 3 2 1 0 −1 0 IOUT = 500 mA 1 2 3 4 IOUT = 1 mA 3 0 VOUT (V) 10 Chip Enable Figure 34. Turn−on Behavior with CE, VOUT = 6 V Figure 35. Turn−on Behavior with CE, VOUT = 12 V Figure 36. Turn−off Behavior with CE, VOUT = 5 V http://onsemi.com NCP4629 TYPICAL CHARACTERISTICS 10.5 7.0 Chip Enable VOUT (V) 3.5 0.0 VCE (V) IOUT = 1 mA IOUT = 100 mA IOUT = 500 mA 0 2 4 6 8 10 t (ms) 12 14 16 18 20 6 4 2 0 −2 Figure 37. Turn−off Behavior with CE, VOUT = 6 V 19.5 13.0 Chip Enable VOUT (V) 6.5 0 12 9 6 3 0 −3 0 IOUT = 500 mA 4 8 12 16 20 t (ms) 24 28 32 36 40 IOUT = 1 mA IOUT = 100 mA VCE (V) Figure 38. Turn−off Behavior with CE, VOUT = 12 V http://onsemi.com 12 NCP4629 APPLICATION INFORMATION A typical application circuit for NCP4629 series is shown in Figure 39. VIN C1 470 n NCP4629x VIN CE GND VOUT C2 10 m VOUT Output Decoupling Capacitor (C2) A 10 mF ceramic output decoupling capacitor is sufficient to achieve stable operation of the IC. If tantalum capacitor is used, and its ESR is high, the loop oscillation may result. The capacitor should be connected as close as possible to the output and ground pin. Larger values and lower ESR improves dynamic parameters. Enable Operation Figure 39. Typical Application Schematic The enable pin CE may be used for turning the regulator on and off. The IC is switched on when a high level voltage is applied to the CE pin. The enable pin has an internal pull down current source. If the enable function is not needed connect CE pin to VIN. Thermal When VOUT voltage could be higher than VIN voltage it is necessary to use protective diode D1. If there is possibility that VOUT voltage could be negative then it is necessary to use schottky diode D2. See Figure 40 for details. Do not force the voltage to the VOUT pin. D1 NCP4629x VIN C1 470 n CE VOUT GND C2 10 m D2 VIN VOUT As a power across the IC increase, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and also the ambient temperature affect the rate of temperature increase for the part. When the device has good thermal conductivity through the PCB the junction temperature will be relatively low in high power dissipation applications. The IC includes internal thermal shutdown circuit that stops operation of regulator, if junction temperature is higher than 160°C. After that, when junction temperature decreases below 135°C, the operation of voltage regulator would restart. While high power dissipation condition is, the regulator starts and stops repeatedly and protects itself against overheating. PCB layout Figure 40. Typical Application Schematic with Protective Diodes Input Decoupling Capacitor (C1) A 470 nF ceramic input decoupling capacitor should be connected as close as possible to the input and ground pin of the NCP4629. Higher values and lower ESR improves line transient response. ORDERING INFORMATION Device NCP4629HDT050T5G NCP4629HDT060T5G NCP4629HDT120T5G Nominal Output Voltage 5.0 V 6.0 V 12.0 V Description Enable High Enable High Enable High Pins number 2 and 3 must be wired to the GND plane while it is mounted on board. Make VIN and GND lines sufficient. If their impedance is high, noise pickup or unstable operation may result. Connect capacitors C1 and C2 as close as possible to the IC, and make wiring as short as possible. Marking C1J050B C1J060B C1J120B Package DPACK−5 (Pb−Free) DPACK−5 (Pb−Free) DPACK−5 (Pb−Free) Shipping† 3000 / Tape & Reel 3000 / Tape & Reel 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *To order other package and voltage variants, please contact your ON Semiconductor sales representative. http://onsemi.com 13 NCP4629 PACKAGE DIMENSIONS DPAK−5 (TO−252, 5 LEAD) CASE 369AE−01 ISSUE O C A c2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. THERMAL PAD CONTOUR OPTIONAL, WITHIN DIMENSIONS b3, E2, L3 AND Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15mm PER SIDE. THESE DIMENSIONS TO BE MEASURED AT DATUM H. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. DIM A A1 b b2 c c2 D E E2 e H L L1 L2 L3 Z MILLIMETERS MIN MAX 2.10 2.50 0.00 0.13 0.40 0.60 5.14 5.54 0.40 0.60 0.40 0.60 5.90 6.30 6.40 6.80 5.04 REF 1.27 BSC 9.60 10.20 1.39 1.78 2.50 2.90 0.51 BSC 0.90 1.30 2.74 REF E b2 A B L3 D DETAIL A 1 23 4 5 Z H E2 e b TOP VIEW 0.12 M c SIDE VIEW CAB BOTTOM VIEW H C L L1 DETAIL A 0.10 C A1 L2 GUAGE PLANE RECOMMENDED SOLDERING FOOTPRINT* 5.70 6.00 10.50 5X 2.10 5X 0.80 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 14 NCP4629 PACKAGE DIMENSIONS SOT−89, 5 LEAD CASE 528AB−01 ISSUE O D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. LEAD THICKNESS INCLUDES LEAD FINISH. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. DIMENSIONS L, L2, L3, L4, L5, AND H ARE MEASURED AT DATUM PLANE C. DIM A b b1 c D D2 E e H L L2 L3 L4 L5 MILLIMETERS MIN MAX 1.40 1.60 0.32 0.52 0.37 0.57 0.30 0.50 4.40 4.60 1.40 1.80 2.40 2.60 1.40 1.60 4.25 4.45 1.10 1.50 0.80 1.20 0.95 1.35 0.65 1.05 0.20 0.60 E H 1 TOP VIEW A c 0.10 C C SIDE VIEW e b1 L 1 2 e b 3 L2 4X RECOMMENDED MOUNTING FOOTPRINT* 0.57 1.75 1.50 4.65 1.65 2X L5 5 4 2.79 0.45 L3 L4 D2 BOTTOM VIEW 1.30 1 2X 1.50 0.62 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 15 NCP4629/D