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NCP4686
400 mA, High Accuracy,
Low Input Voltage, Low
Dropout Regulator
The NCP4686 is CMOS Linear voltage regulators with 400 mA
output current capability. The device has very high output voltage
accuracy, low supply current and low ON−resistance transistor. The
NCP4686 is easy to use and includes output current fold−back
protection and a fully integrated constant slope circuit as a soft−start
circuit. Due to it inrush current is minimized and no output voltage
overshoots are there. A Chip Enable function is included to save
power by lowering supply current.
Features
•
•
•
•
•
•
•
•
•
•
•
•
Operating Input Voltage Range: 1.0 V to 3.6 V
Output Voltage Range: 0.7 V to 1.8 V (available in 0.1 V steps)
Output Voltage Accuracy: ±0.8% (VOUT ≥ 1.0 V, TA = 25°C)
Supply Current: 48 mA
Dropout Voltage: 0.22 V (VOUT = 1.5 V)
Line Regulation: 0.1%/V Typ.
Ripple Rejection: Typ. 60 dB (f = 10 kHz)
Stable with Ceramic Capacitors: 1 mF or more
Current Fold Back Protection
Build−in Constant Slope Circuit
Available in XDFN6 1.2 x 1.2 mm, SC−70, SOT23 Packages
These are Pb−Free Devices
Typical Applications
•
•
•
•
Battery−powered Equipment
Networking and Communication Equipment
Cameras, DVRs, STB and Camcorders
Home Appliances
VIN
VOUT
GND
SC−70
CASE 419A
XXX
XMM
1
XXXMM
SOT−23−5
CASE 1212
XDFN6
CASE 711AA
XX, XXX, XXXX
M, MM
A
Y
W
G
1
1
XX
MM
= Specific Device Code
= Date Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
VOUT
CE
C1
1m
MARKING
DIAGRAMS
(*Note: Microdot may be in either location)
NCP4686x
VIN
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C2
1m
Figure 1. Typical Application Schematics
© Semiconductor Components Industries, LLC, 2012
February, 2012 − Rev. 1
1
Publication Order Number:
NCP4686/D
NCP4686
VIN
VOUT VIN
VOUT
Vref
Vref
Current Limit
CE
Current Limit
CE
GND
GND
NCP4686Hxxxx
NCP4686Dxxxx
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
XDFN6
Pin No.
SC−70
Pin No.
SOT23
Pin Name
6
4
5
VOUT
Output pin
2
3
2
GND
Ground
3
1
3
CE
Chip enable pin (Active “H”)
4
5
1
VIN
Input pin
1
2
4
NC
No connection
5
−
−
NC
No connection
Description
*Please refer to package dimensions section on Page 15 on this data sheet for pin numbers associated with different package.
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN
4.0
V
Output Voltage
VOUT
−0.3 to VIN + 0.3
V
Chip Enable Input
VCE
−0.3 to 4.0
V
Output Current
IOUT
500
mA
PD
400
mW
Input Voltage (Note 1)
Power Dissipation XDFN1212
Power Dissipation SC−70
380
Power Dissipation SOT23
420
Junction Temperature
TJ
−40 to 150
°C
Storage Temperature
TSTG
−55 to 125
°C
TA
−40 to +85
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Operating Ambient Temperature Range
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
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2
NCP4686
THERMAL CHARACTERISTICS
Symbol
Value
Unit
Thermal Characteristics, XDFN6 1.2 x 1.2 mm
Thermal Resistance, Junction−to−Air
Rating
RqJA
250
°C/W
Thermal Characteristics, SOT23
Thermal Resistance, Junction−to−Air
RqJA
238
°C/W
Thermal Characteristics, SC−70
Thermal Resistance, Junction−to−Air
RqJA
263
°C/W
ELECTRICAL CHARACTERISTICS
−40°C ≤ TA ≤ 85°C; VIN = VOUT(NOM) + 1 V, whichever is greater; IOUT = 1 mA, CIN = COUT = 0.1 mF, unless otherwise noted. Typical
values are at TA = +25°C.
Parameter
Test Conditions
Operating Input Voltage
Output Voltage
TA = +25 °C
VOUT ≥ 1.0 V
−40°C ≤ TA ≤ 85°C
Output Voltage Temp. Coefficient
Symbol
Min
VIN
VOUT
Typ
Max
Unit
1.0
3.6
V
x0.992
x1.008
V
VOUT < 1.0 V
−8
8
mV
VOUT ≥ 1.0 V
x0.983
x1.017
V
VOUT < 1.0 V
−17
17
mV
−40°C ≤ TA ≤ 85°C
ΔVOUT /
ΔTA
±60
Line Regulation
VOUT(NOM) + 0.5 V ≤ VIN ≤ 3.6 V, VIN ≥
1.3 V
LineReg
0.10
0.25
%/V
Load Regulation
IOUT = 1 mA to 400 mA
LoadReg
25
45
mV
VDO
0.48
0.62
V
0.8 V ≤ VOUT <
0.9 V
0.40
0.54
0.9 V ≤ VOUT <
1.0 V
0.36
0.47
1.0 V ≤ VOUT <
1.2 V
0.32
0.45
1.2 V ≤ VOUT <
1.5 V
0.28
0.38
0.22
0.31
Dropout Voltage
IOUT = 400 mA
0.7 V ≤ VOUT <
0.8 V
1.5 V ≤ VOUT
Output Current
Short Current Limit
IOUT
VOUT = 0 V
Quiescent Current
IQ
48
75
mA
0.1
8.0
mA
ISTB
CE Pin Threshold Voltage
CE Input Voltage “H”
VCEH
Low Output N−channel Tr. On
Resistance
mA
110
VCE = 0 V, TA = 25°C
Output Noise Voltage
400
ISC
Standby Current
Power Supply Rejection Ratio
ppm/°C
mA
V
0.9
CE Input Voltage “L”
VCEL
VIN = VOUT + 1.0 V, ΔVIN = 0.2 Vpk−pk,
IOUT = 30 mA, f = 10 kHz
PSRR
60
dB
f = 10 Hz to 100 kHz, VOUT = 0.7 V,
IOUT = 30 mA
VN
30
mVrms
VIN = 2 V, VCE = 0 V, NCP4686D only
RLOW
43
W
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3
0.4
NCP4686
TYPICAL CHARACTERISTICS
0.9
1.4
0.8
1.2
0.7
VIN = 1.1 V
1.0
VOUT (V)
VOUT (V)
0.6
0.5
0.4
2.8 V
3.6 V
1.8 V
0.3
0.8
0.6
2.2 V
3.6 V
2.8 V
0.4
0.2
0.2
0.1
0
VIN = 1.5 V
0
100
200
300 400 500
IOUT (mA)
600
700
0
800
0
100
Figure 3. Output Voltage vs. Output Current
0.8 V Version (TJ = 255C)
200
300 400 500
IOUT (mA)
700
800
Figure 4. Output Voltage vs. Output Current
1.2 V Version (TJ = 255C)
2.0
0.50
1.8
VIN = 2.1 V
1.6
0.40
TJ = 85°C
1.2
2.8 V
1.0
VDO (V)
1.4
VOUT (V)
600
3.6 V
0.8
25°C
0.30
−40°C
0.20
0.6
0.4
0.10
0.2
0
0
100
200
300 400 500
IOUT (mA)
600
700
0
800
0
0.35
0.30
0.30
VDO (V)
VDO (V)
25°C
−40°C
0.20
0.10
0.05
0.05
50
100
150
200
250
250
300
350
400
300
350
0
400
IOUT (mA)
TJ = 85°C
0.15
0.10
0
200
0.25
TJ = 85°C
0.15
0
150
Figure 6. Dropout Voltage vs. Output Current
0.8 V Version
0.35
0.20
100
IOUT (mA)
Figure 5. Output Voltage vs. Output Current
1.8 V Version (TJ = 255C)
0.25
50
25°C
−40°C
0
50
100
150
200
IOUT (mA)
Figure 7. Dropout Voltage vs. Output Current
1.2 V Version
250
300
350
Figure 8. Dropout Voltage vs. Output Current
1.8 V Version
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4
400
NCP4686
TYPICAL CHARACTERISTICS
0.85
0.83
1.23
0.82
1.22
0.81
1.21
0.80
0.79
1.19
1.18
0.77
1.17
0.76
1.16
−40
−20
0
20
40
60
1.15
−40
80
−20
0
20
40
60
80
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 9. Output Voltage vs. Temperature,
0.8 V Version
Figure 10. Output Voltage vs. Temperature,
1.2 V Version
1.85
60
VIN = 2.8 V
1.84
50
1.83
1.82
40
1.81
IGND (mA)
VOUT (V)
1.20
0.78
0.75
VIN = 2.2 V
1.24
VOUT (V)
VOUT (V)
1.25
VIN = 1.8 V
0.84
1.80
1.79
30
20
1.78
1.77
10
1.76
1.75
−40
−20
0
20
40
60
0
80
0
0.6
1.2
1.8
2.4
3
TJ, JUNCTION TEMPERATURE (°C)
VIN, INPUT VOLTAGE (V)
Figure 11. Output Voltage vs. Temperature,
2.8 V Version
Figure 12. Supply Current vs. Input Voltage,
0.8 V Version
3.6
100
60
90
50
80
70
IGND (mA)
IGND (mA)
40
30
20
60
50
40
30
20
10
10
0
0
0
0.6
1.2
1.8
2.4
3
3.6
0
0.6
1.2
1.8
2.4
3
VIN, INPUT VOLTAGE (V)
VIN, INPUT VOLTAGE (V)
Figure 13. Supply Current vs. Input Voltage,
1.2 V Version
Figure 14. Supply Current vs. Input Voltage,
1.8 V Version
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3.6
NCP4686
60
60
50
50
40
40
IGND (mA)
IGND (mA)
TYPICAL CHARACTERISTICS
30
20
20
10
10
0
−40
−20
0
20
40
60
0
−40
80
20
40
60
80
TJ, JUNCTION TEMPERATURE (°C)
Figure 16. Supply Current vs. Temperature,
1.2 V Version
0.9
0.8
0.7
40
0.6
VOUT (V)
IGND (mA)
0
TJ, JUNCTION TEMPERATURE (°C)
50
30
20
1 mA
0.5
30 mA
0.4
0.3
IOUT = 50 mA
0.2
10
0.1
0
−40
−20
0
20
40
60
0
80
0
0.6
1.2
1.8
2.4
3
TJ, JUNCTION TEMPERATURE (°C)
VIN, INPUT VOLTAGE (V)
Figure 17. Supply Current vs. Temperature,
1.8 V Version
Figure 18. Output Voltage vs. Input Voltage,
0.8 V Version
3.6
2.0
1.4
1.8
1.2
1.6
1.0
VOUT (V)
1.4
0.8
1 mA
0.6
30 mA
0.4
1.2
1.0
1 mA
0.8
30 mA
0.6
0.4
0.2
0
−20
Figure 15. Supply Current vs. Temperature,
0.8 V Version
60
VOUT (V)
30
0.2
IOUT = 50 mA
0
0.6
1.2
1.8
2.4
VIN, INPUT VOLTAGE (V)
3
0
3.6
IOUT = 50 mA
0
Figure 19. Output Voltage vs. Input Voltage,
1.2 V Version
0.6
1.2
1.8
2.4
VIN, INPUT VOLTAGE (V)
3
Figure 20. Output Voltage vs. Input Voltage,
1.8 V Version
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3.6
NCP4686
100
100
90
90
80
80
70
70
60
PSRR (dB)
PSRR (dB)
TYPICAL CHARACTERISTICS
IOUT = 1 mA
50
40
30 mA
30
20
0
0.1
1
10
150 mA
10
100
1000
0
0.1
1
10
100
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 21. PSRR, 0.8 V Version, VIN = 1.8 V
Figure 22. PSRR, 1.2 V Version, VIN = 2.2 V
1000
1.2
100
90
1.0
80
60
VN (mVrms/√Hz)
70
PSRR (dB)
30 mA
40
20
150 mA
IOUT = 1 mA
50
30
10
IOUT = 1 mA
50
40
30 mA
30
20
0
0.1
1
10
0.8
0.6
0.4
0.2
150 mA
10
100
1000
0
0.01
0.1
1
10
100
1000
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 23. PSRR, 1.8 V Version, VIN = 2.8 V
Figure 24. Output Voltage Noise, 0.8 V Version,
VIN = 1.8 V, IOUT = 30 mA
1.6
1.8
1.4
1.6
1.4
VN (mVrms/√Hz)
1.2
VN (mVrms/√Hz)
60
1.0
0.8
0.6
1.2
1.0
0.8
0.6
0.4
0.4
0.2
0.2
0
0.01
0.1
1
10
100
1000
0
0.01
0.1
1
10
100
1000
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 25. Output Voltage Noise, 1.2 V Version,
VIN = 2.2 V, IOUT = 30 mA
Figure 26. Output Voltage Noise, 1.8 V Version,
VIN = 2.8 V, IOUT = 30 mA
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NCP4686
TYPICAL CHARACTERISTICS
3.3
2.8
2.3
VIN (V)
VOUT (V)
1.8
0.815
0.810
0.805
0.800
0.795
0.790
0.785
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 27. Line Transients, 0.8 V Version,
tR = tF = 5 ms, IOUT = 30 mA
3.7
3.2
2.7
VIN (V)
VOUT (V)
2.2
1.215
1.210
1.205
1.200
1.195
1.190
1.185
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 28. Line Transients, 1.2 V Version,
tR = tF = 5 ms, IOUT = 30 mA
4.3
3.8
3.3
1.815
VIN (V)
VOUT (V)
2.8
1.810
1.805
1.800
1.795
1.790
1.785
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 29. Line Transients, 1.8 V Version,
tR = tF = 5 ms, IOUT = 30 mA
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NCP4686
TYPICAL CHARACTERISTICS
150
100
50
IOUT (mA)
VOUT (V)
0
0.82
0.81
0.80
0.79
0.78
0.77
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 30. Load Transients, 0.8 V Version,
IOUT = 50 – 100 mA, tR = tF = 0.5 ms, VIN = 1.8 V
150
100
50
IOUT (mA)
VOUT (V)
0
1.24
1.22
1.20
1.18
1.16
1.14
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 31. Load Transients, 1.2 V Version,
IOUT = 50 – 100 mA, tR = tF = 0.5 ms, VIN = 2.2 V
150
100
50
IOUT (mA)
VOUT (V)
0
1.84
1.82
1.80
1.78
1.76
1.74
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 32. Load Transients, 1.8 V Version,
IOUT = 50 – 100 mA, tR = tF = 0.5 ms, VIN = 2.8 V
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NCP4686
TYPICAL CHARACTERISTICS
600
400
200
IOUT (mA)
VOUT (V)
0
0.90
0.85
0.80
0.75
0.70
0.65
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 33. Load Transients, 0.8 V Version,
IOUT = 1 – 400 mA, tR = tF = 0.5 ms, VIN = 1.8 V
600
400
200
IOUT (mA)
VOUT (V)
0
1.90
1.85
1.80
1.75
1.70
1.65
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 34. Load Transients, 1.8 V Version,
IOUT = 1 – 400 mA, tR = tF = 0.5 ms, VIN = 2.8 V
600
400
200
IOUT (mA)
VOUT (V)
0
1.30
1.25
1.20
1.15
1.10
1.05
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 35. Load transients, 1.2 V version,
IOUT = 1 – 400 mA, tR = tF = 0.5 ms, VIN = 2.2 V
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NCP4686
TYPICAL CHARACTERISTICS
45
30
15
IOUT (mA)
VOUT (V)
0
0.84
0.82
0.80
0.78
0.76
0.74
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 36. Load Transients, 0.8 V Version,
IOUT = 1 – 30 mA, tR = tF = 0.5 ms, VIN = 1.8 V
45
30
15
IOUT (mA)
VOUT (V)
0
1.24
1.22
1.20
1.18
1.16
1.14
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 37. Load Transients, 1.2 V Version,
IOUT = 1 – 30 mA, tR = tF = 0.5 ms, VIN = 2.2 V
45
30
15
IOUT (mA)
VOUT (V)
0
1.84
1.82
1.80
1.78
1.76
1.74
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 38. Load Transients, 1.8 V Version,
IOUT = 1 – 30 mA, tR = tF = 0.5 ms, VIN = 2.8 V
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NCP4686
TYPICAL CHARACTERISTICS
Chip Enable
2.7
1.8
0.9
VCE (V)
VOUT (V)
0
0.8
IOUT = 30 mA
0.6
0.4
IOUT = 1 mA
IOUT = 400 mA
0.2
0
−0.2
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 39. Start−Up, 0.8 V Version, VIN = 1.8 V
3.3
Chip Enable
2.2
1.1
VCE (V)
VOUT (V)
0
2.0
1.5
1.0
IOUT = 1 mA
0.5
IOUT = 30 mA
IOUT = 400 mA
0
−0.5
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 40. Start−Up, 1.2 V Version, VIN = 2.2 V
3.3
Chip Enable
2.2
1.1
VCE (V)
VOUT (V)
0
2.0
1.5
IOUT = 1 mA
1.0
IOUT = 30 mA
0.5
IOUT = 400 mA
0
−0.5
0
20
40
60
80
100 120 140 160 180 200
t (ms)
Figure 41. Start−up, 1.8 V Version, VIN = 2.8 V
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NCP4686
TYPICAL CHARACTERISTICS
2.7
1.8
0.9
0.8
0
VCE (V)
VOUT (V)
Chip Enable
IOUT = 400 mA
0.6
IOUT = 30 mA
0.4
IOUT = 1 mA
0.2
0
−0.2
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 42. Shutdown, 0.8 V Version, VIN = 1.8 V
3.3
2.2
1.1
0
VCE (V)
VOUT (V)
Chip Enable
2.0
1.5
IOUT = 400 mA
1.0
IOUT = 30 mA
0.5
IOUT = 1 mA
0
−0.5
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 43. Shutdown, 1.2 V Version, VIN = 2.2 V
3.3
2.2
1.1
0
VCE (V)
VOUT (V)
Chip Enable
2.0
1.5
IOUT = 400 mA
1.0
IOUT = 30 mA
0.5
IOUT = 1 mA
0
−0.5
0
40
80
120 160 200 240 280 320 360 400
t (ms)
Figure 44. Shutdown, 1.8 V Version, VIN = 2.8 V
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13
NCP4686
APPLICATION INFORMATION
A typical application circuits for NCP4686 series is
shown in Figure 45.
NCP4686x
VIN
VIN
VOUT
VOUT
CE
C1
1m
also prevents overshoot of the output voltage at start up. The
Constant slope circuit is fully built in and no external
component is needed. Since the Start up time and output
voltage slope is defined internally, there is no way to change
it. Starting up into bigger output capacitors doesn’t cause
problems due to the combination of the constant slope and
current limit circuits.
C2
1m
GND
Current Limit
This regulator includes fold−back type current limit
circuit. This type of protection doesn’t limit current up to
current capability in normal operation, but when over
current occurs, the output voltage and current decrease until
the over current condition ends. Typical characteristics of
this protection type can be observed in the Output Voltage
versus Output Current graphs shown in the typical
characteristics chapter of this datasheet.
Figure 45. Typical Application Schematics
Input Decoupling Capacitor (C1)
A 1 mF ceramic input decoupling capacitor should be
connected as close as possible to the input and ground pin of
the NCP4686. Higher values and lower ESR improves line
transient response.
Output Discharger
The NCP4686D version includes a transistor between
VOUT and GND that is used for faster discharging of the
output capacitor. This function is activated when the IC goes
into disable mode.
Output Decoupling Capacitor (C2)
A 1 mF ceramic output decoupling capacitor is enough to
achieve stable operation of the IC. If a tantalum capacitor is
used, and its ESR is high, loop oscillation may result. The
capacitors should be connected as close as possible to the
output and ground pins. Larger values and lower ESR
improves dynamic parameters.
Thermal
As power across the IC increase, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and also the ambient
temperature affect the rate of temperature increase for the
part. When the device has good thermal conductivity
through the PCB the junction temperature will be relatively
low in high power dissipation applications.
Enable Operation
The enable pin CE may be used for turning the regulator
on and off. The IC is switched on when a high level voltage
is applied to the CE pin. The enable pin has an internal pull
down current source. If the enable function is not needed
connect CE pin to VIN.
PCB Layout
Make the VIN and GND line as large as practical. If their
impedance is high, noise pickup or unstable operation may
result. Connect capacitors C1 and C2 as close as possible to
the IC, and make wiring as short as possible.
Constant Slope Circuit
The constant slope circuit is used as a soft start circuit that
allows the output voltage to start up slowly with a defined
slope. This circuit minimizes inrush current at start up and
ORDERING INFORMATION
Device
Nominal Output
Voltage
Description
Marking
Package
Shipping†
NCP4686DSN08T1G
0.8 V
Auto discharge
CAB
SOT23−5
(Pb−Free)
3000 / Tape & Reel
NCP4686DSN10T1G
1.0 V
Auto discharge
CAD
SOT23−5
(Pb−Free)
3000 / Tape & Reel
NCP4686DSN12T1G
1.2 V
Auto discharge
CAF
SOT23−5
(Pb−Free)
3000 / Tape & Reel
NCP4686DSN18T1G
1.8 V
Auto discharge
CAM
SOT23−5
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*To order other package and voltage variants, please contact your ON Semiconductor sales representative.
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14
NCP4686
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE K
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
G
5
4
−B−
S
1
2
DIM
A
B
C
D
G
H
J
K
N
S
3
D 5 PL
0.2 (0.008)
M
B
M
N
J
C
H
K
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15
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
--0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
--0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
NCP4686
PACKAGE DIMENSIONS
SOT−23 5−LEAD
CASE 1212−01
ISSUE A
A
5
E
1
L1
A1
4
2
L
3
5X
e
A2
0.05 S
B
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSIONS: MILLIMETERS.
3. DATUM C IS THE SEATING PLANE.
A
E1
b
0.10
C
M
C B
S
A
S
C
RECOMMENDED
SOLDERING FOOTPRINT*
3.30
DIM
A
A1
A2
b
c
D
E
E1
e
L
L1
5X
0.85
5X
0.95
PITCH
0.56
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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16
MILLIMETERS
MIN
MAX
--1.45
0.00
0.10
1.00
1.30
0.30
0.50
0.10
0.25
2.70
3.10
2.50
3.10
1.50
1.80
0.95 BSC
0.20
--0.45
0.75
NCP4686
PACKAGE DIMENSIONS
XDFN6 1.2x1.2, 0.4P
CASE 711AA−01
ISSUE O
PIN ONE
REFERENCE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.25mm FROM TERMINAL TIPS.
4. COPLANARITY APPLIES TO ALL OF THE
TERMINALS.
A
B
D
ÍÍÍ
ÍÍÍ
ÍÍÍ
E
DIM
A
A1
b
C
D
E
e
L
0.05 C
2X
2X
0.05 C
TOP VIEW
A
0.05 C
0.05 C
A1
SIDE VIEW
NOTE 4
C
MILLIMETERS
MIN
MAX
--0.40
0.00
0.05
0.13
0.23
0.20
0.30
1.20 BSC
1.20 BSC
0.40 BSC
0.37
0.48
RECOMMENDED
MOUNTING FOOTPRINT*
SEATING
PLANE
6X
6X
0.22
0.66
PACKAGE
OUTLINE
e
1
3
1.50
C
6X
L
0.40
PITCH
DIMENSIONS: MILLIMETERS
6
4
6X
b
0.05
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
M
C A B
NOTE 3
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCP4686/D
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