NCP500SN18T1

NCP500, NCV500 Voltage Regulator - CMOS, Low Noise, Low-Dropout 150 mA The NCP500 series of fixed output low dropout linear regulators are designed for portable battery powered applications which require low noise operation, fast enable response time, and low dropout. The device achieves its low noise performance without the need of an external noise bypass capacitor. Each device contains a voltage reference unit, an error amplifier, a PMOS power transistor, and resistors for setting output voltage, and current limit and temperature limit protection circuits. The NCP500 has been designed to be used with low cost ceramic capacitors and requires a minimum output capacitor of 1.0 mF. www.onsemi.com 6 5 1 1 DFN 2x2.2 MM SQL SUFFIX CASE 506BA TSOP−5 SN SUFFIX CASE 483 Features • • • Ultra−Low Dropout Voltage of 170 mV at 150 mA Fast Enable Turn−On Time of 20 msec Wide Operating Voltage Range of 1.8 V to 6.0 V Excellent Line and Load Regulation High Accuracy Output Voltage of 2.5% Enable Can Be Driven Directly by 1.0 V Logic Typical RMS Noise Voltage 50 mV with No Bypass Capacitor (BW = 10 Hz to 100 kHz) Very Small DFN 2x2.2 Package NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable These are Pb−Free Devices Typical Applications • • • • Noise Sensitive Circuits − VCO’s, RF Stages, etc. SMPS Post−Regulation Hand−Held Instrumentation Camcorders and Cameras Vin 1 (3) TSOP−5 Vin 1 GND 2 Enable 3 5 Vout 4 N/C (Top View) xxx = Specific Device Code A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) DFN 2x2.2 mm Vout 5 (4) Thermal Shutdown PIN CONNECTIONS AND MARKING DIAGRAMS xxxAYWG G • • • • • • • Enable 1 GND 2 Vin 3 xxM 6 N/C 5 GND 4 Vout (Top View) Driver w/ Current Limit xx M = Specific Device Code = Date Code Enable ORDERING INFORMATION ON 3 (1) See detailed ordering and shipping information in the package dimensions section on page 16 of this data sheet. OFF GND 2 (2, 5) NOTE: Pin numbers in parenthesis indicate DFN package. Figure 1. Simplified Block Diagram © Semiconductor Components Industries, LLC, 2015 October, 2019 − Rev. 22 1 Publication Order Number: NCP500/D NCP500, NCV500 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PIN FUNCTION DESCRIPTION TSOP−5 Pin No. DFN 2x2 Pin No. Pin Name 1 3 Vin 2 2, 5 GND 3 1 Enable 4 6 N/C No internal connection. 5 4 Vout Regulated output voltage. Description Positive power supply input voltage. Power supply ground. This input is used to place the device into low−power standby. When this input is pulled to a logic low, the device is disabled. If this function is not used, Enable should be connected to Vin. MAXIMUM RATINGS ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Rating Symbol Value Unit Vin 0 to 6.0 V Enable Voltage Von/off −0.3 to Vin +0.3 V Output Voltage Vout −0.3 to Vin +0.3 V − Infinite − Input Voltage Output Short Circuit Duration Thermal Resistance, Junction−to−Ambient TSOP−5 DFN (Note 3) RqJA °C/W 250 225 Operating Junction Temperature TJ +125 °C Storage Temperature Tstg −65 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL−STD−883, Method 3015 Machine Model Method 200 V Latch up capability (85°C) "100 mA. 2. Device is internally limited to 160°C by thermal shutdown. 3. For more information, refer to application note, AND8080/D. ELECTRICAL CHARACTERISTICS (Vin = 2.35 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted) Symbol Min Typ Max Unit Vout 1.755 1.8 1.845 V Line Regulation (Vin = 2.3 V to 6.0 V, Iout = 1.0 mA) Regline − 1.0 10 mV Load Regulation (Iout = 1.0 mA to 150 mA) Regload − 15 45 mV Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Vin−Vout − − − 2.0 140 270 10 200 350 Output Short Circuit Current Iout(max) 200 540 700 mA RR − 62 − dB − − − 0.01 175 175 1.0 300 300 0.9 − − − − 0.15 Characteristic −1.8 V Output Voltage (TA = −40°C to 85°C, Iout = 1.0 mA to 150 mA) Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) IQ mV mA Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Vth(EN) Enable Input Bias Current IIB(EN) − 3.0 100 nA − − 20 100 ms Output Turn On Time (Enable Input = 0 V to Vin) www.onsemi.com 2 V NCP500, NCV500 ELECTRICAL CHARACTERISTICS (continued) (Vin = 2.35 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted) Symbol Min Typ Max Unit Vout 1.804 1.85 1.896 V Regline − 1.0 10 mV Load Regulation (Iout = 1.0 mA to 150 mA) Regload − 15 45 mV Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Vin−Vout − − − 2.0 − − 10 − − Output Short Circuit Current Iout(max) 200 540 700 mA RR − 62 − dB − − − 0.01 175 175 1.0 300 300 0.9 − − − − 0.15 Characteristic −1.85 V Output Voltage (TA = −40°C to 85°C, Iout = 1.0 mA to 150 mA) Line Regulation (Vin = 2.3 V to 6.0 V, Iout = 1.0 mA) Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) IQ mV mA Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Vth(EN) Enable Input Bias Current IIB(EN) − 3.0 100 nA − − 20 100 ms Output Turn On Time (Enable Input = 0 V to Vin) V ELECTRICAL CHARACTERISTICS (Vin = 3.0 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted) Symbol Characteristic Min Typ Max 2.438 2.5 2.563 Unit −2.5 V Vout Output Voltage (TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA) V Line Regulation (Vin = 3.0 V to 6.0 V, Iout = 1.0 mA) Regline − 1.0 10 mV Load Regulation (Iout = 1.0 mA to 150 mA) Regload − 15 45 mV Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Vin−Vout − − − 2.0 100 190 10 170 270 Output Short Circuit Current Iout(max) 200 540 700 mA RR − 62 − dB − − − 0.01 180 180 1.0 300 300 0.9 − − − − 0.15 Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) IQ mV mA Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Vth(EN) Enable Input Bias Current IIB(EN) − 3.0 100 nA − − 20 100 ms Output Turn On Time (Enable Input = 0 V to Vin) www.onsemi.com 3 V NCP500, NCV500 ELECTRICAL CHARACTERISTICS (Vin = 3.1 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted) Symbol Characteristic Min Typ Max 2.535 2.6 2.665 Unit −2.6 V Vout Output Voltage (TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA) V Line Regulation (Vin = 3.0 V to 6.0 V, Iout = 1.0 mA) Regline − 1.0 10 mV Load Regulation (Iout = 1.0 mA to 150 mA) Regload − 15 45 mV Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Vin−Vout − − − 2.0 − − 10 − − Output Short Circuit Current Iout(max) 200 540 700 mA RR − 62 − dB − − − 0.01 180 180 1.0 300 300 0.9 − − − − 0.15 Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) IQ mV mA Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Vth(EN) Enable Input Bias Current IIB(EN) − 3.0 100 nA − − 20 100 ms Output Turn On Time (Enable Input = 0 V to Vin) V ELECTRICAL CHARACTERISTICS (Vin = 3.2 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted) Symbol Characteristic Min Typ Max 2.633 2.7 2.768 Unit −2.7 V Vout Output Voltage (TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA) V Line Regulation (Vin = 3.2 V to 6.0 V, Iout = 1.0 mA) Regline − 1.0 10 mV Load Regulation (Iout = 1.0 mA to 150 mA) Regload − 15 45 mV Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Vin−Vout − − − 2.0 90 180 10 160 260 Output Short Circuit Current Iout(max) 200 540 700 mA RR − 62 − dB − − − 0.01 185 185 1.0 300 300 0.9 − − − − 0.15 Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) IQ mV mA Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Vth(EN) Enable Input Bias Current IIB(EN) − 3.0 100 nA − − 20 100 ms Output Turn On Time (Enable Input = 0 V to Vin) www.onsemi.com 4 V NCP500, NCV500 ELECTRICAL CHARACTERISTICS (Vin = 3.3 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted) Symbol Characteristic Min Typ Max 2.730 2.8 2.870 Unit −2.8 V Vout Output Voltage (TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA) V Line Regulation (Vin = 3.3 V to 6.0 V, Iout = 1.0 mA) Regline − 1.0 10 mV Load Regulation (Iout = 1.0 mA to 150 mA) Regload − 15 45 mV Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Vin−Vout − − − 2.0 90 170 10 150 250 Output Short Circuit Current Iout(max) 200 540 700 mA RR − 62 − dB − − − 0.01 185 185 1.0 300 300 0.9 − − − − 0.15 Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) IQ mV mA Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Vth(EN) Enable Input Bias Current IIB(EN) − 3.0 100 nA − − 20 100 ms Output Turn On Time (Enable Input = 0 V to Vin) V ELECTRICAL CHARACTERISTICS (Vin = 3.5 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted) Symbol Characteristic Min Typ Max 2.925 3.0 3.075 Unit −3.0 V Vout Output Voltage (TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA) V Line Regulation (Vin = 3.5 V to 6.0 V, Iout = 1.0 mA) Regline − 1.0 10 mV Load Regulation (Iout = 1.0 mA to 150 mA) Regload − 15 45 mV Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Vin−Vout − − − 2.0 85 165 10 130 240 Output Short Circuit Current Iout(max) 200 540 700 mA RR − 62 − dB − − − 0.01 190 190 1.0 300 300 0.9 − − − − 0.15 Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) IQ mV mA Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Vth(EN) Enable Input Bias Current IIB(EN) − 3.0 100 nA − − 20 100 ms Output Turn On Time (Enable Input = 0 V to Vin) www.onsemi.com 5 V NCP500, NCV500 ELECTRICAL CHARACTERISTICS (Vin = 3.8 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted) Symbol Min Typ Max 3.218 3.3 3.383 Regline − 1.0 10 mV Load Regulation (Iout = 1.0 mA to 150 mA) Regload − 15 45 mV Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Vin−Vout − − − 2.0 80 150 10 110 230 Output Short Circuit Current Iout(max) 200 540 700 mA RR − 62 − dB − − − 0.01 195 195 1.0 300 300 0.9 − − − − 0.15 Characteristic Unit −3.3 V Vout Output Voltage (TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA) Line Regulation (Vin = 3.8 V to 6.0 V, Iout = 1.0 mA) Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) IQ V mV mA Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Vth(EN) Enable Input Bias Current IIB(EN) − 3.0 100 nA − − 20 100 ms Output Turn On Time (Enable Input = 0 V to Vin) V ELECTRICAL CHARACTERISTICS (Vin = 5.5 V, Cin = 1.0 mF, Cout = 1.0 mF, for typical value TA = 25°C, for min and max values TA = −40°C to 85°C, Tjmax = 125°C, unless otherwise noted) Characteristic Symbol Min Typ Max Unit 4.875 5.0 5.125 Regline − 1.0 10 mV Load Regulation (Iout = 1.0 mA to 150 mA) Regload − 15 45 mV Dropout Voltage (Measured at Vout −2.0%, TA = −40°C to 85°C) (Iout = 1.0 mA) (Iout = 75 mA) (Iout = 150 mA) Vin−Vout − − − 2.0 60 120 10 100 180 Output Short Circuit Current Iout(max) 200 540 700 mA RR − 62 − dB − − − 0.01 210 210 1.0 300 300 0.9 − − − − 0.15 −5.0 V Vout Output Voltage (TA =−40°C to 85°C, Iout = 1.0 mA to 150 mA) Line Regulation (Vin = 5.5 V to 6.0 V, Iout = 1.0 mA) Ripple Rejection (Vin = Vout (nom.) + 1.0 V + 0.5 Vpp, f = 1.0 kHz, Io = 60 mA) Quiescent Current (Enable Input = 0 V) (Enable Input = 0.9 V, Iout = 1.0 mA) (Enable Input = 0.9 V, Iout = 150 mA) IQ V mV mA Enable Input Threshold Voltage (Voltage Increasing, Output Turns On, Logic High) (Voltage Decreasing, Output Turns Off, Logic Low) Vth(EN) Enable Input Bias Current IIB(EN) − 3.0 100 nA − − 20 100 ms Output Turn On Time (Enable Input = 0 V to Vin) V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Maximum package power dissipation limits must be observed. T *TA PD + J(max) RqJA 5. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. www.onsemi.com 6 NCP500, NCV500 200 50 50 mA Load 40 30 20 10 mA Load 10 0 −50 80 Vin − Vout, Dropout Voltage (mV) Vin − Vout, Dropout Voltage (mV) 60 Vout(nom.) = 3.3 V 70 1.0 mA Load −25 0 25 50 75 100 120 mA Load 120 100 mA Load 100 −25 0 25 50 75 100 Figure 3. Dropout Voltage vs. Temperature 50 mA Load 30 20 10 mA Load 10 1.0 mA Load −25 25 0 125 220 Vout(nom.) = 2.8 V 50 75 100 200 Vout(nom.) = 2.8 V 180 150 mA Load 160 140 120 mA Load 120 100 mA Load 100 80 −50 125 −25 0 25 50 75 100 Temperature (°C) Temperature (°C) Figure 4. Dropout Voltage vs. Temperature Figure 5. Dropout Voltage vs. Temperature 125 350 120 Vout(nom.) = 1.8 V Vin − Vout, Dropout Voltage (mV) Vin − Vout, Dropout Voltage (mV) 150 mA Load 140 Figure 2. Dropout Voltage vs. Temperature 40 50 mA Load 80 60 40 10 mA Load 20 1.0 mA Load 0 −50 160 Temperature (°C) 50 100 180 Temperature (°C) 60 0 −50 Vout(nom.) = 3.3 V 80 −50 125 Vin − Vout, Dropout Voltage (mV) Vin − Vout, Dropout Voltage (mV) 70 −25 0 25 50 75 100 330 290 150 mA Load 270 250 230 120 mA Load 210 190 170 150 −50 125 Vout(nom.) = 1.8 V 310 100 mA Load −25 0 25 50 75 100 Temperature (°C) Temperature (°C) Figure 6. Dropout Voltage vs. Temperature Figure 7. Dropout Voltage vs. Temperature www.onsemi.com 7 125 NCP500, NCV500 2.804 3.308 Vin = Vout(nom.) +0.5 V Vout(nom.) = 3.3 V IO = 1.0 mA 3.304 3.302 3.300 3.298 3.296 2.8 2.798 2.796 2.794 2.792 3.294 3.292 −50 −25 0 25 50 75 100 2.790 −50 125 25 50 75 100 Figure 8. Output Voltage vs. Temperature Figure 9. Output Voltage vs. Temperature 125 210 IQ, Quiescent Current (mA) 1.803 1.8025 1.802 Vin = Vout(nom.) + 0.5 V Vout(nom.) = 1.8 V IO = 1.0 mA 1.8015 1.801 1.8005 −50 −25 0 25 50 75 100 125 Vout(nom.) = 3.3 V 190 180 Vout(nom.) = 1.8 V 170 160 150 −50 −25 0 25 50 75 100 125 Temperature (°C) Figure 10. Output Voltage vs. Temperature Figure 11. Quiescent Current vs. Temperature 225 225 200 200 175 150 125 100 75 50 Vout(nom.) = 1.8 V Iout = 0 mA TA = 25°C 25 0 Vin = Vout(nom.) = + 0.5 V IO = 0 mA 200 Temperature (°C) IQ, Quiescent Current (mA) Vout, Output Voltage (V) 0 Temperature (°C) 1.8035 IQ, Quiescent Current (mA) −25 Temperature (°C) 1.804 0 Vin = Vout(nom.) + 0.5 V Vout(nom.) = 2.8 V IO = 1.0 mA 2.802 Vout, Output Voltage (V) Vout, Output Voltage (V) 3.306 1.0 2.0 3.0 4.0 5.0 175 150 125 100 75 Vout(nom.) = 3.3 V Iout = 0 mA TA = 25°C 50 25 6.0 0 0 1.0 2.0 3.0 4.0 5.0 6.0 Input Voltage (V) Input Voltage (V) Figure 12. Quiescent Current vs. Input Voltage Figure 13. Quiescent Current vs. Input Voltage www.onsemi.com 8 225 225 200 200 175 175 Ground Pin Current (mA) Ground Pin Current (mA) NCP500, NCV500 150 125 100 75 50 Vout(nom.) = 1.8 V Iout = 50 mA TA = 25°C 25 1.0 2.0 3.0 4.0 5.0 100 75 50 Vout(nom.) = 3.3 V Iout = 50 mA TA = 25°C 0 0 6.0 1.0 2.0 3.0 4.0 5.0 6.0 Input Voltage (V) Input Voltage (V) Figure 14. Ground Pin Current vs. Input Voltage Figure 15. Ground Pin Current vs. Input Voltage 600 100 500 80 400 300 200 100 Vout(nom.) = 3.3 V 1.0 2.0 3.0 4.0 5.0 10 mA 60 mA 60 10 mA 40 Vout = 1.8 V Vin = 2.8 VDC + 0.5 Vp−p Cout = 1 mF 20 0 0.1 6.0 1.0 10 f, Frequency (kHz) Figure 16. Current Limit vs. Input Voltage Figure 17. Ripple Rejection vs. Frequency 1000 Vout = 1.8 V Vin = 2.8 V Iout = 1 mA Cout = 1 mF 800 600 5.0 4.0 3.0 200 Vin = 3.8 V to 4.8 V Vout = 3.3 V Cout = 1.0 mF Iout = 1.0 mA 150 Output Voltage Deviation (mV) 400 200 0 0.01 100 Input Voltage (V) Vin, Input Voltage (V) 0 0 Vout, Output Voltage Noise (nV/ǠHZ) 125 25 RR, Ripple Rejection (dB) Current Limit (mA) 0 0 150 0.1 1.0 10 100 1000 100 50 0 −50 0 20 40 60 80 100 120 140 f, Frequency (kHz) Time (ms) Figure 18. Output Noise Density Figure 19. Line Transient Response www.onsemi.com 9 160 Iout, Output Current (mA) 5.0 3.0 Output Voltage Deviation (mV) 200 Vin = 3.8 V to 4.8 V Vout = 3.3 V Cout = 1.0 mF Iout = 10 mA 150 100 50 0 −50 0 20 40 60 80 100 120 140 Iout, Output Current (mA) 75 0 100 0 −100 −200 0 10 20 30 40 50 Time (ms) Time (ms) Figure 20. Line Transient Response Figure 21. Load Transient Response Vin = 3.8 V Vout = 3.3 V Cout = 10 mF Cin = 1 mF 150 75 0 50 3.0 60 Vin = 3.8 V Vout = 3.3 V TA = 25°C RL = 3.3 kW Cin = 1 mF 2.0 1.0 0 4.0 Output Voltage (V) Output Voltage Deviation (mV) Vin = 3.8 V Vout = 3.3 V Cout = 1.0 mF Cin = 1 mF 150 −300 160 225 25 0 −25 −50 225 200 Output Voltage Deviation (mV) 4.0 Enable Voltage (V) Vin, Input Voltage (V) NCP500, NCV500 0 10 20 30 40 50 60 70 80 90 3.0 2.0 Cout = 10 mF 1.0 0 Cout = 1.0 mF 0 20 40 60 80 100 Time (ms) Time (ms) Figure 22. Load Transient Response Figure 23. Turn−off Response www.onsemi.com 10 120 NCP500, NCV500 2 Vout, Output Voltage (V) 1.8 1.6 1.4 1.2 1 0.8 Cin = 1 mF Cout = 1 mF TA = 25°C VEnable = Vin 0.6 0.4 0.2 0 0 1 2 3 4 5 6 Vin, Input Voltage (V) Figure 24. Output Voltage vs. Input Voltage 3 Vout, Output Voltage (V) 2.5 2 1.5 1 Cin = 1 mF Cout = 1 mF TA = 25°C VEnable = Vin 0.5 0 0 1 2 3 4 5 6 Vin, Input Voltage (V) Figure 25. Output Voltage vs. Input Voltage 3.5 Vout, Output Voltage (V) 3 2.5 2 1.5 Cin = 1 mF Cout = 1 mF TA = 25°C VEnable = Vin 1 0.5 0 0 1 2 3 4 5 6 Vin, Input Voltage (V) Figure 26. Output Voltage vs. Input Voltage www.onsemi.com 11 7 NCP500, NCV500 DEFINITIONS Load Regulation Line Regulation The change in output voltage for a change in output load current at a constant temperature. The change in output voltage for a change in input voltage. The measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected. Dropout Voltage The input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the output drops 2% below its nominal. The junction temperature, load current, and minimum input supply requirements affect the dropout level. Line Transient Response Typical over and undershoot response when input voltage is excited with a given slope. Thermal Protection are expressed in mVRMS or nV ǸHz. Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 160°C, the regulator turns off. This feature is provided to prevent failures from accidental overheating. Quiescent Current Maximum Package Power Dissipation Output Noise Voltage This is the integrated value of the output noise over a specified frequency range. Input voltage and output load current are kept constant during the measurement. Results The power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125°C. The current which flows through the ground pin when the regulator operates without a load on its output: internal IC operation, bias, etc. When the LDO becomes loaded, this term is called the Ground current. It is actually the difference between the input current (measured through the LDO input pin) and the output current. APPLICATIONS INFORMATION The NCP500 series regulators are protected with internal thermal shutdown and internal current limit. A typical application circuit is shown in Figure 27. classical bypass capacitor impacts the start up phase of standard LDOs. However, thanks to its low noise architecture, the NCP500 operates without a bypass element and thus offers a typical 20 ms start up phase. Input Decoupling (C1) A 1.0 mF capacitor either ceramic or tantalum is recommended and should be connected close to the NCP500 package. Higher values and lower ESR will improve the overall line transient response. Enable Operation The enable pin will turn on or off the regulator. These limits of threshold are covered in the electrical specification section of this data sheet. The turn−on/turn−off transient voltage being supplied to the enable pin should exceed a slew rate of 10 mV/ms to ensure correct operation. If the enable is not to be used then the pin should be connected to Vin. Output Decoupling (C2) The NCP500 is a stable component and does not require a minimum Equivalent Series Resistance (ESR) or a minimum output current. The minimum decoupling value is 1.0 mF and can be augmented to fulfill stringent load transient requirements. The regulator accepts ceramic chip capacitors as well as tantalum devices. Larger values improve noise rejection and load regulation transient response. Figure 29 shows the stability region for a range of operating conditions and ESR values. Thermal As power across the NCP500 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and the ambient temperature effect the rate of junction temperature rise for the part. This is stating that when the NCP500 has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power dissipation applications. Noise Decoupling The NCP500 is a low noise regulator without the need of an external bypass capacitor. It typically reaches a noise level of 50 mVRMS overall noise between 10 Hz and 100 kHz. The www.onsemi.com 12 NCP500, NCV500 Component pick and place systems are composed of a vision system that recognizes and positions the component and a mechanical system which physically performs the pick and place operation. Two commonly used types of vision systems are: (1) a vision system that locates a package silhouette and (2) a vision system that locates individual bumps on the interconnect pattern. The latter type renders more accurate place but tends to be more expensive and time consuming. Both methods are acceptable since the parts align due to a self−centering feature of the DFN solder joint during solder re−flow. The maximum dissipation the package can handle is given by: T *TA PD + J(max) RqJA If TJ is not recommended to exceed 125°C, then the NCP500 can dissipate up to 400 mW @ 25°C. The power dissipated by the NCP500 can be calculated from the following equation: Ptot + ƪVin * Ignd (Iout)ƫ ) [Vin * Vout] * Iout or P ) Vout * Iout VinMAX + tot Ignd ) Iout Solder Paste Type 3 or Type 4 solder paste is acceptable. If a 150 mA output current is needed the ground current is extracted from the data sheet curves: 200 mA @ 150 mA. For a NCP500SN18T1 (1.8 V), the maximum input voltage will then be 4.4 V, good for a 1 Cell Li−ion battery. Re−flow and Cleaning The DFN may be assembled using standard IR/IR convection SMT re−flow processes without any special considerations. As with other packages, the thermal profile for specific board locations must be determined. Nitrogen purge is recommended during solder for no−clean fluxes. The DFN is qualified for up to three re−flow cycles at 235°C peak (J−STD−020). The actual temperature of the DFN is a function of: • Component density • Component location on the board • Size of surrounding components Hints Please be sure the Vin and GND lines are sufficiently wide. When the impedance of these lines is high, there is a chance to pick up noise or cause the regulator to malfunction. Set external components, especially the output capacitor, as close as possible to the circuit, and make leads as short as possible. Package Placement DFN packages can be placed using standard pick and place equipment with an accuracy of "0.05 mm. ON Battery or Unregulated Voltage OFF C1 + 1 5 + 2 ON 3 Vout Battery or Unregulated Voltage C2 4 1 6 2 5 3 4 + C1 OFF Figure 27. Typical Application Circuit Figure 28. Typical Application Circuit www.onsemi.com 13 Vout + C2 NCP500, NCV500 10 Cout = 1 mF to 10 mF TA = 40°C to 125°C Vin = up to 6.0 V Output Capacitor ESR (W) UNSTABLE 1 STABLE 0.1 0.01 0 25 50 75 100 125 150 IO, Output Current (mA) Figure 29. Stability Input Q1 R Output 5 1 1.0 mF 1.0 mF 2 3 4 Figure 30. Current Boost Regulator The NCP500 series can be current boosted with a PNP transistor. Resistor R in conjunction with VBE of the PNP determines when the pass transistor begins conducting; this circuit is not short circuit proof. Input/Output differential voltage minimum is increased by VBE of the pass resistor. R1 Input Q2 R2 Q1 R3 Output 1 1.0 mF 5 1.0 mF 2 3 4 Figure 31. Current Boost Regulator with Short Circuit Limit Short circuit current limit is essentially set by the VBE of Q2 and R1. ISC = ((VBEQ2 − ib * R2) / R1) + IO(max) Regulator www.onsemi.com 14 NCP500, NCV500 Input Output 1 5 1.0 mF 1.0 mF 2 Enable 3 4 1 5 Output 1.0 mF 1.0 mF 2 3 R 4 C Figure 32. Delayed Turn−on Vout, Output Voltage (V) Enable Voltage (V) If a delayed turn−on is needed during power up of several voltages then the above schematic can be used. Resistor R, and capacitor C, will delay the turn−on of the bottom regulator. A few values were chosen and the resulting delay can be seen in Figure 33. 4 3 TA = 25°C Vin = 3.4 V Vout = 2.8 V 2 1 0 3 2.5 No Delay 2 1.5 R = 1.0 MW C = 1.0 mF R = 1.0 MW C = 0.1 mF 1 0.5 0 0 10 20 30 40 50 60 70 80 90 100 110 Time (ms) Figure 33. Delayed Turn−on The graph shows the delay between the enable signal and output turn−on for various resistor and capacitor values. Input Output Q1 R 1 5 1.0 mF 2 1.0 mF 3 5.6 V 4 Figure 34. Input Voltages Greater than 6.0 V A regulated output can be achieved with input voltages that exceed the 6.0 V maximum rating of the NCP500 series with the addition of a simple pre−regulator circuit. Care must be taken to prevent Q1 from overheating when the regulated output (Vout) is shorted to Gnd. www.onsemi.com 15 NCP500, NCV500 ORDERING INFORMATION Nominal Output Voltage Marking NCP500SN18T1G 1.8 LCS NCP500SN185T1G 1.85 LFL NCP500SN25T1G 2.5 LCT NCP500SN26T1G 2.6 LFM NCP500SN27T1G 2.7 LCU NCP500SN28T1G 2.8 LCV NCP500SN30T1G 3.0 LCW NCP500SN30T2G 3.0 LCW NCP500SN33T1G 3.3 LCX NCP500SN50T1G 5.0 LCY NCV500SN185T1G* 1.85 LFL NCV500SN18T1G* 1.8 LCS NCV500SN28T1G* 2.8 LCV NCV500SN33T1G* 3.3 LCX NCP500SQL18T1G 1.8 LD NCP500SQL25T1G 2.5 LE NCP500SQL27T1G 2.7 LF NCP500SQL28T1G 2.8 LG NCP500SQL30T1G 3.0 LH NCP500SQL33T1G 3.3 LJ NCP500SQL50T1G 5.0 LK Device Package Shipping† TSOP−5 (Pb−Free) 3000 Units/ 7″ Tape & Reel DFN6 2x2.2 (Pb−Free) 3000 Units/ 7″ Tape & Reel For availability of other output voltages, please contact your local ON Semiconductor Sales Representative. †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. www.onsemi.com 16 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSOP−5 CASE 483 ISSUE N 5 1 SCALE 2:1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSION A. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. D 5X NOTE 5 2X DATE 12 AUG 2020 0.20 C A B 0.10 T M 2X 0.20 T 5 B 1 4 2 B S 3 K DETAIL Z G A A TOP VIEW DIM A B C D G H J K M S DETAIL Z J C 0.05 H C SIDE VIEW SEATING PLANE END VIEW GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT* 0.95 0.037 MILLIMETERS MIN MAX 2.85 3.15 1.35 1.65 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 0_ 10 _ 2.50 3.00 1.9 0.074 5 5 XXXAYWG G 1 1 Analog 2.4 0.094 XXX = Specific Device Code A = Assembly Location Y = Year W = Work Week G = Pb−Free Package 1.0 0.039 XXX MG G Discrete/Logic XXX = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) 0.7 0.028 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98ARB18753C TSOP−5 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2018 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DFN6, 2x2.2, 0.65P CASE 506BA−01 ISSUE A 6 DATE 07 JUL 2008 1 SCALE 4:1 A B D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. L L L1 ÉÉÉ ÉÉÉ PIN ONE REFERENCE 2X 0.10 C DETAIL A E ALTERNATE TERMINAL CONSTRUCTIONS TOP VIEW ÉÉ ÉÉ ÉÉ EXPOSED Cu 2X 0.10 C A 0.10 C DIM A A1 b D D2 E E2 e K L L1 A3 MOLD CMPD A1 ÇÇ ÉÉ DETAIL B DETAIL B ALTERNATE CONSTRUCTIONS 7X 0.08 C SIDE VIEW C A1 L SEATING PLANE e 6X 3 1 1 L1 6 4 6X BOTTOM VIEW XX MG G XX = Specific Device Code M = Date Code G = Pb−Free Device E2 K GENERIC MARKING DIAGRAM* D2 DETAIL A 6X MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 0.30 2.00 BSC 1.10 1.30 2.20 BSC 0.70 0.90 0.65 BSC 0.20 −−− 0.25 0.35 0.00 0.10 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. b 0.10 C A B 0.05 C SOLDERING FOOTPRINT* NOTE 3 1.36 PACKAGE OUTLINE 6X 0.58 2.50 0.96 1 6X 0.35 0.65 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON23023D 6 PIN DFN, 2.0X2.2, 0.65P Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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