NCP511, NCV511
Voltage Regulator - CMOS,
Low Iq, Low-Dropout
150 mA
The NCP511 series of fixed output low dropout linear regulators are
designed for handheld communication equipment and portable battery
powered applications which require low quiescent current. The
NCP511 series features an ultra−low quiescent current of 40 A. Each
device contains a voltage reference unit, an error amplifier, a PMOS
power transistor, resistors for setting output voltage, current limit, and
temperature limit protection circuits.
The NCP511 has been designed to be used with low cost ceramic
capacitors and requires a minimum output capacitor of 1.0 F. The
device is housed in the micro−miniature TSOP−5 surface mount
package. Standard voltage versions are 1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V,
3.0 V, 3.3 V, and 5.0 V. Other voltages are available in 100 mV steps.
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TSOP−5
SN SUFFIX
CASE 483
PIN CONNECTIONS AND
MARKING DIAGRAM
Features
•
Low Quiescent Current of 40 A Typical
Low Dropout Voltage of 100 mV at 100 mA
Excellent Line and Load Regulation
Maximum Operating Voltage of 6.0 V
Low Output Voltage Option
High Accuracy Output Voltage of 2.0%
Industrial Temperature Range of −40°C to 85°C
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These are Pb−Free Devices
Vin
1
GND
2
Enable
3
xxxAYWG
G
•
•
•
•
•
•
•
•
5
Vout
4
N/C
(Top View)
xxx
A
Y
W
G
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
Typical Applications
•
•
•
•
ORDERING INFORMATION
Cellular Phones
Battery Powered Instruments
Hand−Held Instruments
Camcorders and Cameras
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
Vin
1
5
Thermal
Shutdown
Vout
Driver w/
Current
Limit
Enable
ON
3
OFF
GND
2
This device contains 82 active transistors
Figure 1. Representative Block Diagram
© Semiconductor Components Industries, LLC, 2015
October, 2019 − Rev. 13
1
Publication Order Number:
NCP511/D
NCP511, NCV511
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PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
1
Vin
Description
2
GND
3
Enable
4
N/C
No internal connection.
5
Vout
Regulated output voltage.
Positive power supply input voltage.
Power supply ground.
This input is used to place the device into low−power standby. When this input is pulled low, the device
is disabled. If this function is not used, Enable should be connected to Vin.
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Vin
0 to 6.0
V
Enable Voltage
Enable
−0.3 to Vin +0.3
V
Output Voltage
Vout
−0.3 to Vin +0.3
V
Power Dissipation and Thermal Characteristics
Power Dissipation
Thermal Resistance, Junction to Ambient
PD
RJA
Internally Limited
250
W
°C/W
Operating Junction Temperature
TJ
+150
°C
Operating Ambient Temperature
TA
−40 to +85
°C
Storage Temperature
Tstg
−55 to +150
°C
Input Voltage
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL−STD−883, Method 3015
Machine Model Method 200 V
2. Latch up capability (85°C) ±100 mA DC with trigger voltage.
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2
NCP511, NCV511
ELECTRICAL CHARACTERISTICS
(Vin = Vout(nom.) + 1.0 V, Venable = Vin, Cin = 1.0 F, Cout = 1.0 F, TJ = 25°C, unless otherwise noted.)
Symbol
Characteristic
Output Voltage (TA = 25°C, Iout = 1.0 mA)
1.5 V
1.8 V
2.5 V
2.7 V
2.8 V
3.0 V
3.3 V
5.0 V
Vout
Output Voltage (TA = −40°C to 85°C, Iout = 1.0 mA)
1.5 V
1.8 V
2.5 V
2.7 V
2.8 V
3.0 V
3.3 V
5.0 V
Vout
Line Regulation (Iout = 10 mA)
1.5 V−4.4 V (Vin = Vout(nom.) + 1.0 V to 6.0 V)
4.5 V−5.0 V (Vin = 5.5 V to 6.0 V)
Regline
Load Regulation (Iout = 1.0 mA to 150 mA)
Regload
Output Current (Vout = (Vout at Iout = 150 mA) −3%)
1.5 V−1.8 V (Vin = 4.0 V)
1.9 V−3.0 V (Vin = 5.0 V)
3.1 V−5.0 V (Vin = 6.0 V)
Iout(nom.)
Dropout Voltage (Iout = 100 mA, Measured at Vout −3.0%)
1.5 V
1.8 V
2.5 V
2.7 V
2.8 V
3.0 V
3.3 V
5.0 V
Vin−Vout
Quiescent Current
(Enable Input = 0 V)
(Enable Input = Vin, Iout = 1.0 mA to Io(nom.))
IQ
Output Voltage Temperature Coefficient
TC
Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
Vth(en)
Output Short Circuit Current (Vout = 0 V)
1.5 V−1.8 V (Vin = 4.0 V)
1.9 V−3.0 V (Vin = 5.0 V)
3.1 V−5.0 V (Vin = 6.0 V)
Iout(max)
Min
Typ
Max
1.455
1.746
2.425
2.646
2.744
2.94
3.234
4.900
1.5
1.8
2.5
2.7
2.8
3.0
3.3
5.0
1.545
1.854
2.575
2.754
2.856
3.06
3.366
5.100
1.455
1.746
2.425
2.619
2.716
2.910
3.201
4.900
1.5
1.8
2.5
2.7
2.8
3.0
3.3
5.0
1.545
1.854
2.575
2.781
2.884
3.09
3.399
5.100
−
−
1.0
1.0
3.5
3.5
−
0.3
0.8
150
150
150
−
−
−
−
−
−
−
−
−
−
−
−
−
−
245
160
110
100
100
100
90
75
350
200
200
200
200
200
200
200
−
−
0.1
40
1.0
100
−
"100
−
1.3
−
−
−
−
0.3
200
200
200
400
400
400
800
800
800
Unit
V
V
mV/V
mV/mA
mA
mV
A
ppm/°C
V
mA
Ripple Rejection (f = 1.0 kHz, Io = 60 mA)
RR
−
50
−
dB
Output Noise Voltage (f = 20 Hz to 100 kHz, Iout = 60 mA)
Vn
−
110
−
VRMS
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Maximum package power dissipation limits must be observed.
T
*TA
PD + J(max)
RJA
4. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
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3
NCP511, NCV511
TYPICAL CHARACTERISTICS
200
Vout, OUTPUT VOLTAGE (V)
180
DROPOUT VOLTAGE (mV)
3.5
Vout(nom.) = 3.0 V
Iout = 150 mA
160
140
120
Iout = 100 mA
100
80
Iout = 50 mA
60
40
Iout = 1 mA
Iout = 10 mA
20
0
−60 −40 −20
0
20
40
60
80
2.5
2.0
Vout(nom.) = 3.0 V
IO = 0 mA
Cin = 1.0 F
Cout = 1.0 F
TA = 25°C
Venable = Vin
1.5
1.0
0.5
0
100 120 140
0
1
2
5
6
Figure 2. Dropout Voltage vs. Temperature
Figure 3. Output Voltage vs. Input Voltage
7
GROUND PIN CURRENT (A)
45
40
35
30
Vin = Vout(nom.) + 0.5 V
Vout(nom.) = 3.0 V
IO = 0 mA
25
20
−50
−25
0
25
75
50
100
43
41
39
37
35
33
31
27
25
125
Vout(nom.) = 3.0 V
Vin = 5.0 V
TA = 25°C
29
0
25
TEMPERATURE (°C)
40
400
35
350
CURRENT LIMIT (mA)
450
30
25
20
15
Vout(nom.) = 3.0 V
Iout = 50 mA
TA = 25°C
5
0
1
2
3
4
75
100
125
150
Figure 5. Ground Pin Current vs. Output Current
45
10
50
Iout, OUTPUT CURRENT (mA)
Figure 4. Quiescent Current vs. Temperature
GROUND PIN CURRENT (A)
4
Vin, INPUT VOLTAGE (V)
45
0
3
TEMPERATURE (°C)
50
IQ, QUIESCENT CURRENT (A)
3.0
5
300
250
200
150
100
Vout(nom.) = 3.0 V
Cin = 1.0 F
50
0
6
0
1
2
3
4
5
Vin, INPUT VOLTAGE (V)
Vin, INPUT VOLTAGE (V)
Figure 6. Ground Pin Current vs. Input Voltage
Figure 7. Current Limit vs. Input Voltage
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4
6
Vin, INPUT
VOLTAGE (V)
5
4
3
60
Vin = 3.5 V to 4.5 V
Vout = 3.0 V
Cout = 1 F
Iout = 1 mA
40
20
OUTPUT VOLTAGE
DEVIATION (mV)
OUTPUT VOLTAGE
DEVIATION (mV)
Vin, INPUT
VOLTAGE (V)
NCP511, NCV511
0
−20
−40
5
4
3
100
50
0
−50
−100
Vin = 3.5 V to 4.5 V
Vout = 3.0 V
20
100 200 300 400 500 600 700 800 900
40
60
Figure 9. Line Transient Response
Figure 8. Line Transient Response
Vin, INPUT
VOLTAGE (V)
100 120 140 160 180
TIME (s)
TIME (s)
5
4
3
150
100
OUTPUT VOLTAGE
DEVIATION (mV)
80
Cout = 1 F
Iout = 100 mA
Cout = 1 F
Iout = 150 mA
50
0
−50
−100
−150
−200
Vin = 3.5 V to 4.5 V
Vout = 3.0 V
20
40
60
80 100 120 140 160 180
TIME (s)
150
Vin = 3.5 V
Vout = 3.0 V
Cin = 1 F
Cout = 10 F
Iout = 1 mA to 150 mA
OUTPUT VOLTAGE
DEVIATION (mV)
OUTPUT VOLTAGE
DEVIATION (mV)
0
20
10
0
−10
Iout, OUTPUT
CURRENT (mA)
Iout, OUTPUT
CURRENT (mA)
Figure 10. Line Transient Response
200 400 600
800 1000 1200 1400 1600 1800
150
Vin = 3.5 V
Vout = 3.0 V
0
200
100
Cin = 1 F
Cout = 1 F
IO = 1 mA to 150 mA
0
−100
−200
200 400 600 800 1000 1200 1400 1600 1800
TIME (s)
TIME (s)
Figure 11. Load Transient Response
Figure 12. Load Transient Response
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5
ENABLE
VOLTAGE (V)
NCP511, NCV511
2
1
0
Vin = 3.5 V
Vout = 3.0 V
TA = 25°C
Iout = 1 mA
Cin = 1 F
Vout, OUTPUT
VOLTAGE (V)
4
3
2
Cout = 10 F
Cout = 1 F
1
0
20
40
60
80
100 120 140 160 180
TIME (s)
Figure 13. Turn−On Response
OUTPUT NOISE DENSITY (V/ǠHZ)
1.6
Vout = 1.5 V
Vin = 2.5 V
Iout = 60 mA
Cout = 2.2 F
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0.01
0.1
1.0
10
100
1000
f, FREQUENCY (kHz)
Figure 14. Output Noise Density
RR, RIPPLE REJECTION (dB)
70
Vout = 3.0 V
Vin = 3.5 VDC 0.25 V
Iout = 60 mA
Cout = 1.0 F
60
50
40
30
20
10
0
100
1k
10 k
100 k
f, FREQUENCY (Hz)
Figure 15. Ripple Rejection vs. Frequency
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6
1M
NCP511, NCV511
DEFINITIONS
Load Regulation
Line Regulation
The change in output voltage for a change in output
current at a constant temperature.
The change in output voltage for a change in input voltage.
The measurement is made under conditions of low
dissipation or by using pulse technique such that the average
chip temperature is not significantly affected.
Dropout Voltage
The input/output differential at which the regulator output
no longer maintains regulation against further reductions in
input voltage. Measured when the output drops 3.0% below
its nominal. The junction temperature, load current, and
minimum input supply requirements affect the dropout level.
Line Transient Response
Typical over and undershoot response when input voltage
is excited with a given slope.
Thermal Protection
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 160°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
Maximum Power Dissipation
The maximum total dissipation for which the regulator
will operate within its specifications.
Quiescent Current
The quiescent current is the current which flows through
the ground when the LDO operates without a load on its
output: internal IC operation, bias, etc. When the LDO
becomes loaded, this term is called the Ground current. It is
actually the difference between the input current (measured
through the LDO input pin) and the output current.
Maximum Package Power Dissipation
The maximum power package dissipation is the power
dissipation level at which the junction temperature reaches
its maximum operating value, i.e. 125°C. Depending on the
ambient power dissipation and thus the maximum available
output current.
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NCP511, NCV511
APPLICATIONS INFORMATION
Thermal
A typical application circuit for the NCP511 series is
shown in Figure 16.
As power across the NCP511 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material and also the ambient
temperature effect the rate of temperature rise for the part.
This is stating that when the NCP511 has good thermal
conductivity through the PCB, the junction temperature will
be relatively low with high power dissipation applications.
The maximum dissipation the package can handle is
given by:
Input Decoupling (C1)
A 1.0 F capacitor either ceramic or tantalum is
recommended and should be connected close to the NCP511
package. Higher values and lower ESR will improve the
overall line transient response.
Output Decoupling (C2)
The NCP511 is a stable Regulator and does not require any
specific Equivalent Series Resistance (ESR) or a minimum
output current. Capacitors exhibiting ESRs ranging from a
few m up to 3.0 can thus safely be used. The minimum
decoupling value is 1.0 F and can be augmented to fulfill
stringent load transient requirements. The regulator accepts
ceramic chip capacitors as well as tantalum devices. Larger
values improve noise rejection and load regulation transient
response.
T
*TA
PD + J(max)
RJA
If junction temperature is not allowed above the
maximum 125°C, then the NCP511 can dissipate up to
400 mW @ 25°C.
The power dissipated by the NCP511 can be calculated
from the following equation:
Enable Operation
Ptot + ƪVin * Ignd (Iout)ƫ ) [Vin * Vout] * Iout
The enable pin will turn on or off the regulator. These
limits of threshold are covered in the electrical specification
section of this data sheet. If the enable is not used then the
pin should be connected to Vin.
or
P ) Vout * Iout
VinMAX + tot
Ignd ) Iout
Hints
If a 150 mA output current is needed then the ground
current from the data sheet is 40 A. For an NCP511SN30T1
(3.0 V), the maximum input voltage will then be 5.6 V.
Please be sure the Vin and GND lines are sufficiently wide.
When the impedance of these lines is high, there is a chance
to pick up noise or cause the regulator to malfunction.
Set external components, especially the output capacitor,
as close as possible to the circuit, and make leads a short as
possible.
Battery or
Unregulated
Voltage
C1
+
1
ON
3
Vout
5
+
2
ESR, OUTPUT CAPACITOR ()
100
C2
UNSTABLE
10
0.1
0.01
4
OFF
Cout = 1 F to 10 F
TA = 25°C to 125°C
Vin = up to 6.0 V
1
STABLE
0
25
50
75
100
125
150
IO, OUTPUT CURRENT (mA)
Figure 16. Typical Application Circuit
Figure 17. Output Capacitor vs. Output Current
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NCP511, NCV511
APPLICATION CIRCUITS
Input
R1
Input
Q1
R
Output
R2
Q2
Output
1.0 F
3
1.0 F
3
Figure 18. Current Boost Regulator
Short circuit current limit is essentially set by the VBE of Q2 and
R1. ISC = ((VBEQ2 − ib * R2) / R1) + IO(max) Regulator
Enable Voltage (V)
Input
Output
5
1.0 F
1.0 F
2
Enable
Output
5
1
1.0 F
2
3
4
3
4
C
TA = 25°C
Vin = 3.5 V
Vout = 3.0 V
2
1
0
Vout, Output Voltage (V)
4
1.0 F
4
Figure 19. Current Boost Regulator
with Short Circuit Limit
The NCP511 series can be current boosted with a PNP transistor. Resistor R in conjunction with VBE of the PNP determines
when the pass transistor begins conducting; this circuit is not
short circuit proof. Input/Output differential voltage minimum is
increased by VBE of the pass resistor.
3
1.0 F
2
4
1
5
1
2
R
R3
5
1
1.0 F
Q1
3
R = 1.0 M
mW
C = 0.1 F
1
0
R = 1.0 M
C = 1.0 F
No Delay
2
20
0
60
40
80
100
120
140
160
Time (ms)
Figure 20. Delayed Turn−on
Figure 21. Delayed Turn−on
The graph shows the delay between the enable signal and
output turn−on for various resistor and capacitor values.
If a delayed turn−on is needed during power up of several voltages then the above schematic can be used. Resistor R, and
capacitor C, will delay the turn−on of the bottom regulator. A
few values were chosen and the resulting delay can be seen in
Figure 21.
Input
Output
Q1
R
1
5
1.0 F
2
1.0 F
3
5.6 V
4
Figure 22. Input Voltages Greater than 6.0 V
A regulated output can be achieved with input voltages that
exceed the 6.0 V maximum rating of the NCP511 series with
the addition of a simple pre−regulator circuit. Care must be
taken to prevent Q1 from overheating when the regulated
output (Vout) is shorted to GND.
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NCP511, NCV511
ORDERING INFORMATION
Nominal
Output Voltage
Marking
NCP511SN15T1G
1.5
LBU
NCP511SN18T1G
1.8
LBV
NCP511SN25T1G
2.5
LBW
NCP511SN27T1G
2.7
LBX
NCP511SN28T1G
2.8
LBY
NCP511SN30T1G
3.0
LBZ
NCP511SN33T1G
3.3
LCA
NCP511SN50T1G
5.0
LCB
NCV511SN15T1G
1.5
LBU
NCV511SN25T1G
2.5
LBW
Device
Package
Shipping†
TSOP−5
3000 Units/
7″ Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NOTE: Additional voltages in 100 mV steps are available upon request by contacting your ON Semiconductor representative.
www.onsemi.com
10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOP−5
CASE 483
ISSUE N
5
1
SCALE 2:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
D 5X
NOTE 5
2X
DATE 12 AUG 2020
0.20 C A B
0.10 T
M
2X
0.20 T
5
B
1
4
2
B
S
3
K
DETAIL Z
G
A
A
TOP VIEW
DIM
A
B
C
D
G
H
J
K
M
S
DETAIL Z
J
C
0.05
H
C
SIDE VIEW
SEATING
PLANE
END VIEW
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
0.95
0.037
MILLIMETERS
MIN
MAX
2.85
3.15
1.35
1.65
0.90
1.10
0.25
0.50
0.95 BSC
0.01
0.10
0.10
0.26
0.20
0.60
0_
10 _
2.50
3.00
1.9
0.074
5
5
XXXAYWG
G
1
1
Analog
2.4
0.094
XXX = Specific Device Code
A
= Assembly Location
Y
= Year
W = Work Week
G
= Pb−Free Package
1.0
0.039
XXX MG
G
Discrete/Logic
XXX = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
0.7
0.028
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ARB18753C
TSOP−5
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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