NCP5222GEVB

NCP5222 Synchronous Buck Controller, 2-Channel, 2-Phase The NCP5222, a fast−transient−response and high−efficiency dual −channel / two−phase buck controller with built−in gate drivers, provides multifunctional power solutions for notebook power system. 180° interleaved operation between the two channels / phases has a capability of reducing cost of the common input capacitors and improving noise immunity. The interleaved operation also can reduce cost of the output capacitors with the two−phase configuration. Input supply voltage feedforward control is employed to deal with wide input voltage range. On−line programmable and automatic power−saving control ensures high efficiency over entire load range. Fast transient response reduces requirement on the output filters. In the dual−channel operation mode, the two output power rails are regulated individually. In the two−phase operation mode, the two output power rails are connected together by an external switch and current−sharing control is enabled to balance power delivery between phases. http://onsemi.com MARKING DIAGRAM QFN28 CASE 485AR A L Y W G Features (Note: Microdot may be in either location) Wide Input Voltage Range: 4.5 V to 27 V Adjustable Output Voltage Range: 0.8 V to 3.3 V Option for Dual−Channel and Two−Phase Modes Fixed Nominal Switching Frequency: 300 kHz 180° Interleaved Operation Between the Two Channels in Continue−Conduction−Mode (CCM) Adaptive Power Control Input Supply Voltage Feedforward Control Transient−Response−Enhancement (TRE) Control Resistive or Inductor’s DCR Current Sensing 0.8% Internal 0.8 V Reference Internal 1 ms Soft−Start Output Discharge Operation Built−in Adaptive Gate Drivers Input Supplies Undervoltage Lockout (UVLO) Output Overvoltage and Undervoltage Protections Accurate Over Current Protection Thermal Shutdown Protection QFN−28 Package This is a Pb−Free Device 7 6 5 4 3 2 1 FB2 COMP2 VIN COMP1 FB1 ICS1 PIN CONNECTIONS ICS2 8 CS2−/ Vo2 CS1−/ 28 Vo1 9 CS2+ CS1+ 27 10 EN2/ SKIP2 NCP5222 11 BST2 AGND 29 EN1/ 26 S KIP1 BST1 25 12 DH2 DH1 24 13 SWN2 SWN1 23 DRV S / 2CH V CCP P GOOD1 P GND1 DL1 22 V CC 14 DL2 P GOOD2 • • • • • • • • • • • • • • = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package P GND2 • • • • • N5222 ALYWG G 1 15 16 17 18 19 20 21 (Top View) ORDERING INFORMATION Device Typical Applications • CPU Chipsets Power Supplies • Notebook Applications NCP5222MNR2G Package Shipping† QFN28 (Pb−Free) 4000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2010 November, 2010 − Rev. 1 1 Publication Order Number: NCP5222/D Vo1 NCP5222 Vin CS1− / Vo1 5V 2 FB1 PGO OD1 20 6 FB2 AGND 5 CO MP2 PGOO D1 DRVS / 18 2CH VCC 17 29 4 VIN VCCP 19 AGND NCP5222 3 CO MP1 PGOO D2 14 DL2 13 SWN2 12 DN2 10 EN2/ SKIP2 11 BST2 PGND2 15 EN2/Ski p2 CS2+ CS2− / Vo2 8 CS2−/ Vo2 9 CS2+ PGO OD2 16 7 ICS2 Vin CS2+ Vo2 CS2− / Vo2 Figure 1. Typical Application Diagram for A Dual−Channel Application http://onsemi.com 2 PGND PGND1 21 1 ICS1 Vi n DL1 22 SWN1 23 DH1 24 CS1− / Vo1 CS1− / 28 Vo1 CS1+ CS1+ 27 EN1/Skip1 EN1/ 26 SKIP1 25 BST1 CS1+ Vo1 NCP5222 Vin CS1− / Vo1 5V 2 FB1 PGOO D1 20 AGND 5 CO MP2 PG OO D1 DRVS/ 18 2CH 29 4 VIN VCCP 19 AGND NCP5222 3 CO MP1 VCC 17 PGOO D2 16 PG OO D2 14 DL2 12 DH2 11 BST2 10 EN2/ SKIP2 9 CS2+ CS2+ PGND2 15 EN2/Ski p2 8 CS2−/ Vo2 7 ICS2 13 SWN2 6 FB2 CS2− / Vo2 PGND PGND1 21 1 ICS1 Vi n DL1 22 SWN1 23 DH1 24 CS1− / Vo1 CS1−/ 28 Vo1 CS1+ 27 CS1+ EN1/Skip1 EN1/ 26 SKIP1 25 BST1 CS1+ Vin CS2+ Vo2 CS2− / Vo2 Figure 2. An Application Diagram for A Two−Phase Application http://onsemi.com 3 NCP5222 28 CS1+ CS1−/Vo1 Gi 20 PGOOD1 27 EN1/SKIP1 26 OC1 BST1 DISCHG1 DH_Pre1 DH1 OV1 18 DRVS / 2CH Driver for Sharing−FET SWN1 Share PWM Control 1 2 3 VCCP 2PH DL_Pre1 DL1 FB1 P GND1 Skip1 SS1 CLK_H ICS1 20k 20k 8 I CS2 1.25V Reference Generator Divider & 180° Phase Shifter OSC Digital Soft−Start 800mV 21 4 SS2 CLK2 POR VCC 17 CS2+ CS2−/Vo2 Gi OC2 BST2 DH_Pre2 DH2 OV2 SWN2 CS1− CS2− 2PH PGOOD1 Sharing Control PWM Control 2 Share 11 12 13 Gate Driver 2 UV2 VCCP DL_Pre2 PGOOD2 FB2 Skip2 SS2 DL2 P GND2 14 15 10 Figure 3. Functional Block Diagram http://onsemi.com 4 PGOOD2 COMP2 EN2/SKIP2 5 22 Thermal Shut Down DISCHG2 6 19 SS1 640mV 9 VIN CLK1 920mV Gm 7 23 COMP1 30mV 1 24 Gate Driver 1 UV1 Configur ation Detection 25 16 AGND 29 NCP5222 PIN DESCRIPTION Pin No. Symbol 1 ICS1 Current−Sense Output 1. Output of the current−sense amplifier of channel 1. 2 FB1 Feedback 1. Output voltage feedback of channel 1. 3 COMP1 COMP1. Output of the error amplifier of channel 1. Descriptions 4 VIN 5 COMP2 Vin. Input supply voltage monitor input. COMP2. Output of the error amplifier of channel 2. 6 FB2 Feedback 2. Output voltage feedback of channel 2. 7 ICS2 Current−Sense Output 2. Output of the current−sense amplifier of channel 2. 8 CS2−/ Vo2 Current Sense 2−. Inductor current differential sense inverting input of Channel 2. Output Voltage 2. Connection to output of Channel 2. 9 CS2+ Current Sense 2+. Inductor current differential sense non−inverting input of Channel 2. 10 EN2 / Skip2 Enable 2. Enable logic input of Channel 2. Skip 2. Power−saving operation (FPWM and Skip) programming pin of Channel 2. 11 BST2 BOOTSTRAP Connection 2.Channel 2 high−side gate driver input supply, a bootstrap capacitor connection between SWN2 and this pin. 12 DH2 High−Side Gate Drive 2. Gate driver output of the high−side N−Channel MOSFET for channel 2. 13 SWN2 14 DL2 15 PGND2 16 PGOOD2 Switch Node 2. Switch node between the high−side MOSFET and low−side MOSFET of Channel 2. Low−Side Gate Drive 2. Gate driver output of the low−side N−Channel MOSFET for channel 2. Power Ground 2. Ground reference and high−current return path for the low−side gate driver of channel 2. Power GOOD 2. Power good indicator of the output voltage of channel 2. (Open drained) 17 VCC 18 DRVS / 2CH VCC. This pin powers the control section of IC. Gate Driver for Switch. Gate driver output for the external switch in dual−phase configuration. Dual−Channel. Dual−channel configuration programming pin. 19 VCCP VCC Power. This pin powers internal gate drivers. 20 PGOOD1 21 PGND1 22 DL1 23 SWN1 24 DH1 High−Side Gate Drive 1. Gate driver output of the high−side N−Channel MOSFET for channel 1. 25 BST1 BOOTSTRAP Connection 1. Channel 1 high−side gate driver input supply, a bootstrap capacitor connection between SWN1 and this pin. 26 EN1 / Skip1 Enable 1. Enable logic input of Channel 1. Skip 1. Power−saving operation (FPWM and Skip) programming pin of Channel 1. 27 CS1+ Current Sense 1+. Inductor current differential sense non−inverting input of Channel 1. 28 CS1−/ Vo1 Current Sense 1−. Inductor current differential sense inverting input of Channel 1. Output Voltage 1. Connection to output of Channel 1. 29 AGND Analog Ground. Low noise ground for control section of IC. Power GOOD 1. Power good indicator of the output voltage of channel 1. (Open drained) Power Ground 1. Ground reference and high−current return path for the low−side gate driver of channel 1. Low−Side Gate Drive 1. Gate driver output of the low−side N−Channel MOSFET for channel 1. Switch Node 1. Switch node between the high−side MOSFET and low−side MOSFET of Channel 1. http://onsemi.com 5 NCP5222 MAXIMUM RATINGS Value Symbol MIN MAX Unit VCC, VCCP −0.3 6.0 V VBST1 −VSWN1, VBST2 −VSWN2, VDH1 −VSWN1, VDH2 −VSWN2 −0.3 6.0 V VIN −0.3 30 V VSWN1, VSWN2 −0.3, 30 V Rating Power Supply Voltages to AGND High−Side Gate Driver Supplies: BST1 to SWN1, BST2 to SWN2 High−Side Gate Driver Voltages: DH1 to SWN1, DH2 to SWN2 Input Supply Voltage Sense Input to AGND Switch Nodes −5(