NCP5222MNR2G

NCP5222 High Performance Dual-Channel / Two-Phase Synchronous Buck Controller for Notebook Power System The NCP5222, a fast−transient−response and high−efficiency dual−channel / two−phase buck controller with built−in gate drivers, provides multifunctional power solutions for notebook power system. 180° interleaved operation between the two channels / phases has a capability of reducing cost of the common input capacitors and improving noise immunity. The interleaved operation also can reduce cost of the output capacitors with the two−phase configuration. Input supply voltage feedforward control is employed to deal with wide input voltage range. On −line programmable and automatic power−saving control ensures high efficiency over entire load range. Fast transient response reduces requirement on the output filters. In the dual−channel operation mode, the two output power rails are regulated individually. In the two−phase operation mode, the two output power rails are connected together by an external switch and current−sharing control is enabled to balance power delivery between phases. Features http://onsemi.com MARKING DIAGRAM 1 QFN28 CASE 485AR N5222 ALYWG G A L Y W G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) • • • • • • • • • • • • • • • • • • • Wide Input Voltage Range: 4.5 V to 27 V Adjustable Output Voltage Range: 0.8 V to 3.3 V Option for Dual−Channel and Two−Phase Modes Fixed Nominal Switching Frequency: 300 kHz 180° Interleaved Operation Between the Two Channels in Continue−Conduction−Mode (CCM) Adaptive Power Control Input Supply Voltage Feedforward Control Transient−Response−Enhancement (TRE) Control Resistive or Inductor’s DCR Current Sensing 0.8% Internal 0.8 V Reference Internal 1 ms Soft−Start Output Discharge Operation Built−in Adaptive Gate Drivers Input Supplies Undervoltage Lockout (UVLO) Output Overvoltage and Undervoltage Protections Accurate Over Current Protection Thermal Shutdown Protection QFN−28 Package This is a Pb−Free Device PIN CONNECTIONS 7 ICS2 6 FB2 5 COMP2 4 VIN 3 COMP1 2 FB1 1 ICS1 CS1−/ 28 Vo1 CS1+ 27 NCP5222 AGND 29 EN1/ 26 S KIP1 BST1 25 DH1 24 SWN1 23 P GOOD2 P GOOD1 DL1 22 P GND1 21 8 9 CS2−/ Vo2 CS2+ 10 EN2/ SKIP2 11 BST2 12 DH2 13 SWN2 14 DL2 P GND2 DRV S / 2CH 18 15 16 17 V CCP 19 V CC 20 (Top View) ORDERING INFORMATION Device NCP5222MNR2G Package QFN28 (Pb−Free) Shipping† 4000 / Tape & Reel Typical Applications • CPU Chipsets Power Supplies • Notebook Applications © Semiconductor Components Industries, LLC, 2010 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. February, 2010 − Rev. 0 1 Publication Order Number: NCP5222/D NCP5222 Vo1 CS1− / Vo1 Vin CS1+ CS1− / Vo1 CS1− / 28 Vo1 CS1+ CS1+ 27 EN1/Skip1 EN1/ 26 SKIP1 25 BST1 DH1 24 SWN1 23 DL1 22 1 ICS1 2 FB1 NCP5222 3 CO MP1 Vi n 4 VIN 5 CO MP2 6 FB2 13 SWN2 10 EN2/ SKIP2 11 BST2 8 CS2−/ Vo2 9 CS2+ 7 ICS2 PGND1 21 PGOO D1 PGND AGND PGOO D2 PGO OD1 20 VCCP 19 AGND DRVS / 18 2CH VCC 17 PGO OD2 16 PGND2 15 14 DL2 CS2− / Vo2 EN2/Ski p2 CS2+ 12 DN2 29 CS2+ Vin CS2− / Vo2 Figure 1. Typical Application Diagram for A Dual−Channel Application http://onsemi.com 2 Vo2 5V NCP5222 Vo1 CS1− / Vo1 Vin CS1+ CS1− / Vo1 CS1−/ 28 Vo1 CS1+ 27 CS1+ EN1/Skip1 EN1/ 26 SKIP1 25 BST1 DH1 24 SWN1 23 DL1 22 1 ICS1 2 FB1 NCP5222 3 CO MP1 Vi n 4 VIN 5 CO MP2 6 FB2 13 SWN2 7 ICS2 10 EN2/ SKIP2 8 CS2−/ Vo2 9 CS2+ 11 BST2 12 DH2 PGND1 21 PGND AGND PG OO D2 PGOO D1 20 VCCP 19 AGND DRVS/ 18 2CH VCC 17 PGOO D2 16 PGND2 15 14 DL2 29 PG OO D1 CS2− / Vo2 EN2/Ski p2 CS2+ CS2+ Vin CS2− / Vo2 Figure 2. An Application Diagram for A Two−Phase Application http://onsemi.com 3 Vo2 5V NCP5222 26 EN1/SKIP1 20 PGOOD1 27 28 CS1+ CS1−/Vo1 Gi DISCHG1 OC1 BST1 DH_Pre1 OV1 DH1 SWN1 25 24 23 18 DRVS / 2CH Driver for Sharing−FET Share PWM Control 1 UV1 Gate Driver 1 VCCP DL_Pre1 DL1 P GND1 Configur ation Detection FB1 2PH 19 22 21 2 SS1 Skip1 3 COMP1 30mV 1 ICS1 20k Gm 20k CLK_H 920mV 1.25V 800mV 640mV Reference Generator CLK1 SS1 Divider & 180° Phase Shifter Digital Soft−Start SS2 CLK2 POR Thermal Shut Down VIN 4 OSC 7 I CS2 VCC 17 9 8 CS2+ CS2−/Vo2 Gi OC2 BST2 DH_Pre2 OV2 CS1− CS2− 2PH PGOOD1 PGOOD2 FB2 SS2 Skip2 Sharing Control Share UV2 DL_Pre2 PWM Control 2 Gate Driver 2 VCCP DL2 P GND2 DH2 SWN2 DISCHG2 11 12 13 14 15 6 EN2/SKIP2 5 COMP2 PGOOD2 AGND 29 10 16 Figure 3. Functional Block Diagram http://onsemi.com 4 NCP5222 PIN DESCRIPTION Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 Symbol ICS1 FB1 COMP1 VIN COMP2 FB2 ICS2 CS2−/ Vo2 CS2+ EN2 / Skip2 BST2 DH2 SWN2 DL2 PGND2 PGOOD2 VCC DRVS / 2CH VCCP PGOOD1 PGND1 DL1 SWN1 DH1 BST1 EN1 / Skip1 CS1+ CS1−/ Vo1 AGND Descriptions Current−Sense Output 1. Output of the current−sense amplifier of channel 1. Feedback 1. Output voltage feedback of channel 1. COMP1. Output of the error amplifier of channel 1. Vin. Input supply voltage monitor input. COMP2. Output of the error amplifier of channel 2. Feedback 2. Output voltage feedback of channel 2. Current−Sense Output 2. Output of the current−sense amplifier of channel 2. Current Sense 2−. Inductor current differential sense inverting input of Channel 2. Output Voltage 2. Connection to output of Channel 2. Current Sense 2+. Inductor current differential sense non−inverting input of Channel 2. Enable 2. Enable logic input of Channel 2. Skip 2. Power−saving operation (FPWM and Skip) programming pin of Channel 2. BOOTSTRAP Connection 2.Channel 2 high−side gate driver input supply, a bootstrap capacitor connection between SWN2 and this pin. High−Side Gate Drive 2. Gate driver output of the high−side N−Channel MOSFET for channel 2. Switch Node 2. Switch node between the high−side MOSFET and low−side MOSFET of Channel 2. Low−Side Gate Drive 2. Gate driver output of the low−side N−Channel MOSFET for channel 2. Power Ground 2. Ground reference and high−current return path for the low−side gate driver of channel 2. Power GOOD 2. Power good indicator of the output voltage of channel 2. (Open drained) VCC. This pin powers the control section of IC. Gate Driver for Switch. Gate driver output for the external switch in dual−phase configuration. Dual−Channel. Dual−channel configuration programming pin. VCC Power. This pin powers internal gate drivers. Power GOOD 1. Power good indicator of the output voltage of channel 1. (Open drained) Power Ground 1. Ground reference and high−current return path for the low−side gate driver of channel 1. Low−Side Gate Drive 1. Gate driver output of the low−side N−Channel MOSFET for channel 1. Switch Node 1. Switch node between the high−side MOSFET and low−side MOSFET of Channel 1. High−Side Gate Drive 1. Gate driver output of the high−side N−Channel MOSFET for channel 1. BOOTSTRAP Connection 1. Channel 1 high−side gate driver input supply, a bootstrap capacitor connection between SWN1 and this pin. Enable 1. Enable logic input of Channel 1. Skip 1. Power−saving operation (FPWM and Skip) programming pin of Channel 1. Current Sense 1+. Inductor current differential sense non−inverting input of Channel 1. Current Sense 1−. Inductor current differential sense inverting input of Channel 1. Output Voltage 1. Connection to output of Channel 1. Analog Ground. Low noise ground for control section of IC. http://onsemi.com 5 NCP5222 MAXIMUM RATINGS Value Rating Power Supply Voltages to AGND High−Side Gate Driver Supplies: BST1 to SWN1, BST2 to SWN2 High−Side Gate Driver Voltages: DH1 to SWN1, DH2 to SWN2 Symbol VCC, VCCP VBST1 −VSWN1, VBST2 −VSWN2, VDH1 −VSWN1, VDH2 −VSWN2 VIN VSWN1, VSWN2 VDH1, VDH2 VDL1, VDL2 VFB1, VFB2 VCOMP1, VCOMP2 VICS1, VICS2 VCS1+, VCS1−, VCS2+, VCS2− VDRVS VEN1, VEN2 VPGOOD1, VPGOOD2 VGND TJ TA TSTG RqJA MSL MIN −0.3 −0.3 MAX 6.0 6.0 Unit V V Input Supply Voltage Sense Input to AGND Switch Nodes High−Side Gate Drive Outputs Low−Side Gate Drive Outputs Feedback Input to AGND Error Amplifier Output to AGND Current Sharing Output to AGND Current Sense Input to AGND Mode Program I/O to PGND1 Enable Input to AGND Power Good Output to AGND PGND1, PGND2 to AGND Operating Junction Temperature Range Operating Ambient Temperature Range Storage Temperature Range Thermal Characteristics Thermal Resistance Junction to Air (Pad soldered to PCB) Moisture Sensitivity Level −0.3 −5(