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NCP5398MNR2G

NCP5398MNR2G

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    VFQFN40_EP

  • 描述:

    IC CTLR BUCK 40-QFN

  • 数据手册
  • 价格&库存
NCP5398MNR2G 数据手册
NCP5398 2/3/4 Phase Controller for CPU Applications The NCP5398 is a two-, three-, or four-phase buck controller which combines differential voltage and current sensing, and adaptive voltage positioning to power both AMD and Intel processors. Dual-edge pulse-width modulation (PWM) combined with inductor current sensing reduces system cost by providing the fastest initial response to transient load events. Dual-edge multi-phase modulation reduces total bulk and ceramic output capacitance required to satisfy transient load-line regulation. A high performance operational error amplifier is provided, which allows easy compensation of the system. The proprietary method of Dynamic Reference Injection (Patented) makes the error amplifier compensation virtually independent of the system response to VID changes, eliminating tradeoffs between overshoot and dynamic VID performance. Features •Meets Intel's VR 10.0 and 11.0 and AMD Specifications •Dual-Edge PWM for Fastest Initial Response to Transient Loading •High Performance Operational Error Amplifier •Supports both VR11 and Legacy Soft-Start Modes •Dynamic Reference Injection (Patented) •DAC Range from 0.5 V to 1.6 V •1.0% System Voltage Accuracy from 1.0 V to 1.6 V •True Differential Remote Voltage Sensing Amplifier •Phase-to-Phase Current Balancing •“Lossless” Differential Inductor Current Sensing •Differential Current Sense Amplifiers for each Phase •Adaptive Voltage Positioning (AVP) •Frequency Range: 100 kHz – 1.0 MHz •Overvoltage, Undervoltage and Overcurrent Protection •Threshold Sensitive Enable Pin for VTT Sensing •Power Good Output with Internal Delays •Programmable Soft-Start Time •This is a Pb-Free Device* http://onsemi.com MARKING DIAGRAM 1 1 40 NCP5398 AWLYYWW G 40 PIN QFN, 6x6 MN SUFFIX CASE 488AR NCP5398 = Specific Device Code A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb-Free Package *Pin 41 is the thermal pad on the bottom of the device. ORDERING INFORMATION Device NCP5398MNR2G* Package Shipping† QFN-40 2500 / Tape & Reel (Pb-Free) *Temperature Range: 0°C to 85°C †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Applications •Desktop Processors *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2007 September, 2007 - Rev. 2 1 Publication Order Number: NCP5398/D NCP5398 31 G2 33 32 G3 12VMON G4 34 35 36 VCC 37 VR_RDY 38 NTC 39 VR_FAN VREF CS3 NCP5398 CS2N VID7 CS1 (Top View) http://onsemi.com 2 20 19 18 17 VS16 DACMODE VDRP VID6 VFB CS2 COMP VID5 DIFFOUT CS3N VS+ VID4 15 9 10 VID3 NC 8 CS4N 14 7 VID2 ILIM 6 CS4 13 5 VID1 ROSC 4 DRVON 12 3 G1 VID0 SS 2 EN 11 1 VR_HOT 40 PIN CONNECTIONS CS1N 30 29 28 27 26 25 24 23 22 21 NCP5398 12 V_FILTER +5 V VTT 680  PULLUPS 12 V_FILTER D1 BAT54HT1 C4 RVCC C3 CVCC1 NCP3418B 4 41 RT1 36 2 VID0 3 VID1 4 VID2 5 VID3 6 VID4 7 VID5 8 VID6 9 VID7 10 VID_SEL 1 VR_EN 37 VR_RDY 40 VR_HOT 39 VR_FAN 16 15 3 VCC VID0 GND 12VMON VID1 VID2 VID3 VREF VID4 NTC VID5 34 RISO2 RT2 CFB1 VID7 G2 EN VR_RDY 2 IN PGND 5 6 RS1 NTD85N02RT4 38 CS1 12 V_FILTER 31 12 V_FILTER VR_FAN VS- G3 VS+ 4 32 26 CS3 CS3N 25 G4 DIFFOUT VCC BST DRVH OD SW DRVL 2 IN PGND 1 8 7 5 6 33 28 CS4 CS4N 27 VFB 12 V_FILTER CD1 RD1 CF RF 18 R2 C2 C1 RDRP 20 L1 7 24 CS2 CS2N 23 VR_HOT RFB CH SW 8 RNTC1 VR10/11 RFB1 19 OD NTD60N02RT4 1 30 G1 22 CS1 CS1N 21 VID6 NCP5398 17 BST DRVH DRVL RNTC2 35 3 RISO1 VCC VDRP DRVON 12 V_FILTER 29 COMP ILIM ROSC SS 13 12 4 11 3 RLIM1 VCC OD CSS RVFB BST DRVH SW DRVL 2 IN PGND 1 8 7 5 6 RLIM2 12 V_FILTER 4 3 VCC 12 V_FILTER BST DRVH OD SW DRVL 2 IN PGND 1 8 7 5 6 RT2 LOCATED NEAR OUTPUT INDUCTORS VCCP + VSSP CPU GND Figure 1. Application Schematic for Four Phases http://onsemi.com 3 NCP5398 12 V_FILTER +5 V 12 V_FILTER D1 BAT54HT1 VTT 680  PULLUPS C4 RVCC C3 CVCC1 NCP3418B 4 41 36 2 VID0 3 VID1 4 VID2 5 VID3 6 VID4 7 VID5 8 VID6 9 VID7 10 VID_SEL 1 VR_EN 37 VR_RDY 40 VR_HOT 39 VR_FAN 16 15 RT1 VCC 3 GND RISO2 RT2 CFB1 VID2 VID3 VREF VID4 NTC VID5 VID7 35 2 RNTC2 34 RNTC1 IN PGND C1 8 5 6 RS1 G2 EN VR_RDY 12 V_FILTER 31 RD1 CF RF 18 C2 12 V_FILTER 24 CS2 CS2N 23 VR_HOT VR_FAN VS- G3 VS+ 4 32 26 CS3 CS3N 25 G4 DIFFOUT VCC BST DRVH OD SW DRVL 2 IN PGND 1 8 7 5 6 33 28 CS4 CS4N 27 VFB 12 V_FILTER CD1 R2 CS1 RDRP 20 L1 7 NTD85N02RT4 38 VR10/11 RFB CH SW NTD60N02RT4 1 30 G1 22 CS1 CS1N 21 VID6 RFB1 19 OD DRVL 12VMON VID1 NCP5398 17 BST DRVH VID0 3 RISO1 VCC VDRP DRVON 12 V_FILTER 29 COMP ILIM ROSC SS 13 12 RLIM1 RVFB 4 11 3 VCC BST DRVH OD CSS SW DRVL 2 IN PGND 1 8 7 5 6 RLIM2 RT2 LOCATED NEAR OUTPUT INDUCTORS VCCP + VSSP CPU GND Figure 2. Application Schematic for Three Phases http://onsemi.com 4 NCP5398 12 V_FILTER +5 V 12 V_FILTER D1 BAT54HT1 VTT C4 680  PULLUPS RVCC C3 CVCC1 NCP3418B 4 41 36 2 VID0 3 VID1 4 VID2 5 VID3 6 VID4 7 VID5 8 VID6 9 VID7 10 VID_SEL 1 VR_EN 37 VR_RDY 40 VR_HOT 39 VR_FAN 16 15 RT1 VCC 3 GND VID0 12VMON VID1 VID2 VID3 VREF VID4 NTC VID5 34 2 RISO2 RT2 CFB1 VID7 19 IN PGND C1 L1 7 5 6 R2 RS1 NTD85N02RT4 38 C2 CS1 VR10/11 G2 EN VR_RDY 12 V_FILTER 31 12 V_FILTER 24 CS2 CS2N 23 VR_HOT VR_FAN VS- G3 VS+ 4 32 26 CS3 CS3N 25 RFB1 RFB SW 8 30 G1 22 CS1 CS1N 21 VID6 NCP5398 17 OD NTD60N02RT4 1 RNTC1 3 RISO1 BST DRVH DRVL RNTC2 35 VCC G4 DIFFOUT VCC BST DRVH OD SW DRVL 2 IN PGND 1 8 7 5 6 33 28 CS4 CS4N 27 VFB RDRP 20 CD1 RD1 CF RF 18 CH VDRP DRVON 29 COMP ILIM ROSC SS 13 12 11 RLIM1 CSS RVFB RLIM2 RT2 LOCATED NEAR OUTPUT INDUCTORS VCCP + VSSP CPU GND Figure 3. Application Schematic for Two Phases http://onsemi.com 5 NCP5398 VREF DACMODE VID0 VID1 VID2 VID3 VID4 VID5 VID6 VID7 NTC NCP5398 VR_FAN VR10/11/AMD DAC NTC + - SS VR_HOT DAC + VS- - VS+ + - Diff Amp DIFFOUT Fault 1.3 V + VFB GND Error Amp COMP VDRP Droop Amplifier +- 1.3 V CS1 CS1N + - + - ENB + - ENB + - ENB G1 Gain = 6 CS2 CS2N + - G2 Gain = 6 CS3 CS3N + - G3 Gain = 6 CS4 CS4N + - + - ENB OVER Oscillator ROSC ILIM - ILimit + VCC UVLO 12VMON Fault DIFFOUT + EN VCC G4 4OFF Gain = 6 + 12VMON UVLO Figure 4. Simplified Block Diagram http://onsemi.com 6 Fault Logic 3 Phase Detect and Monitor Circuits DRVON VR_RDY NCP5398 PIN DESCRIPTIONS Pin No. Symbol Description 1 EN 2–9 VID0–VID7 Voltage ID DAC inputs 10 DACMODE VRM select bit 11 SS 12 ROSC 13 ILIM Over-current shutdown threshold. To program the shutdown threshold, connect this pin to the ROSC pin via a resistor divider as shown in the Applications Schematics. To disable the over-current feature, connect this pin directly to the ROSC pin. To guarantee correct operation, this pin should only be connected to the voltage generated by the ROSC pin; do not connect this pin to any externally generated voltages. 14 NC Do not connect anything to this pin. 15 VS+ Non-inverting input to the internal differential remote sense amplifier 16 VS- Inverting input to the internal differential remote sense amplifier 17 DIFFOUT 18 COMP 19 VFB Error amplifier inverting input. Connect a resistor from this pin to DIFFOUT. The value of this resistor and the amount of current from the droop resistor (RDRP) will set the amount of output voltage droop (AVP) during load. 20 VDRP Current signal output for Adaptive Voltage Positioning (AVP). The voltage of this pin above the 1.3 V internal offset voltage is proportional to the output current. Connect a resistor from this pin to VFB to set the amount of AVP current into the feedback resistor (RFB) to produce an output voltage droop. Leave this pin open for no AVP. 21, 23, 25, 27 CSxN Inverting input to current sense amplifier #x, x = 1, 2, 3, 4. 22, 24, 26, 28 CSx 29 DRVON Output to enable Gate Drivers 30 – 33 G1 – G4 PWM output pulses to gate drivers 34 VREF 35 12VMON 36 VCC 37 VR_RDY Voltage Regulator Ready (Power Good) output. Open drain output that is high when the output is regulating. 38 NTC Remote temperature sense connection. Connect an NTC thermistor from this pin to GND and a resistor from this pin to VREF. As the NTC's temperature increases, the voltage on this pin will decrease. 39 VR_FAN Open drain output that will be low impedance when the voltage at the NTC pin is above the specified threshold. This pin will transition to a high impedance state when the voltage at the NTC pin decreases below the specified threshold. This pin requires an external pull-up resistor. 40 VR_HOT Open drain output that will be low impedance when the voltage at the NTC pin is above the specified threshold. This pin will transition to a high impedance state when the voltage at the NTC pin decreases below the specified threshold. This pin requires an external pull-up resistor. 41 GND Pull this pin high to enable controller. Pull this pin low to disable controller. Either an open-collector output (with a pull-up resistor) or a logic gate (CMOS or totem-pole output) may be used to drive this pin. A Low-to-High transition on this pin will initiate a soft start. Connect this pin directly to VREF if the Enable function is not required. 20 MHz filtering at this pin is required. A capacitor from this pin to ground programs the soft-start time. A resistance from this pin to ground programs the oscillator frequency. Also, this pin supplies an output voltage of 2 V which may be used to form a voltage divider to the ILIM pin to set the over-current shutdown threshold as shown in the Applications Schematics. Output of the differential remote sense amplifier Output of the error amplifier, and the non-inverting input of the PWM comparators Non-inverting input to current sense amplifier #x, x = 1, 2, 3, 4. Voltage reference output. This pin is used for remote temperature sensing as shown in the Applications Schematic. Second UVLO monitor for monitoring the power stage supply rail Power for the internal control circuits. Power supply return (QFN Flag) http://onsemi.com 7 NCP5398 MAXIMUM RATINGS Electrical Information Pin Symbol VMAX (V) VMIN (V) ISOURCE (mA) ISINK (mA) COMP 5.5 -0.3 10 10 VDRP 5.5 -0.3 5 5 VS+ 2.0 GND - 300 mV 1 1 VS- 2.0 GND - 300 mV 1 1 DIFFOUT 5.5 -0.3 20 20 VR_RDY, VR_HOT, VR_FAN 5.5 -0.3 N/A 20 VCC 7.0 -0.3 N/A 10 ROSC 5.5 -0.3 1 N/A DACMODE, EN 3.5 -0.3 0 0 VREF 5.5 -0.3 0.5 N/A All Other Pins 5.5 -0.3 - - *All signals reference to GND unless otherwise noted. Thermal Information Rating Symbol Value Unit RJA 34 °C/W Operating Junction Temperature Range (Note 2) TJ 0 to 125 °C Operating Ambient Temperature Range TA 0 to 85 °C Maximum Storage Temperature Range TSTG -55 to +150 °C Moisture Sensitivity Level, QFN Package MSL 3 Thermal Characteristic, QFN Package (Note 1) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. *The maximum package power dissipation must be observed. 1. JESD 51-5 (1S2P Direct-Attach Method) with 0 Airflow. 2. JESD 51-7 (1S2P Direct-Attach Method) with 0 Airflow. http://onsemi.com 8 NCP5398 ELECTRICAL CHARACTERISTICS (Unless otherwise stated: 0°C < TA < 85°C; 4.75 V < VCC < 5.25 V; All DAC Codes; CVCC = 0.1 F) Parameter Test Conditions Min Typ Max Units Input Bias Current -200 - 200 nA Input Offset Voltage (Note 3) -1.0 - 1.0 mV Error Amplifier Open Loop DC Gain (Note 3) CL = 60 pF to GND, RL = 10 k to GND - 100 - dB Open Loop Unity Gain Bandwidth (Note 3) CL = 60 pF to GND, RL = 10 k to GND - 15 - MHz Open Loop Phase Margin (Note 3) CL = 60 pF to GND, RL = 10 k to GND - 70 - ° Slew Rate (Note 3) Vin = 100 mV, G = -10 V/V, 1.5 V < COMP < 2.5 V, CL = 60 pF, DC Load = ±125 A - 5 - V/s Maximum Output Voltage 10 mV of Overdrive ISOURCE = 2.0 mA 2.20 VCC-20 mV - V Minimum Output Voltage 10 mV of Overdrive ISINK = 2.0 mA - 0.01 0.5 V Output Source Current (Note 3) 10 mV Input Overdrive COMP = 2.0 V 2.0 - - mA Output Sink Current (Note 3) 10 mV Input Overdrive COMP = 1.0 V 2.0 - - mA Differential Summing Amplifier VS+ Input Resistance DRVON = Low DRVON = High - 1.5 17 - k VS+ Input Bias Voltage DRVON = Low DRVON = High - 0.05 0.65 - V VS- Bias Current VS- = 0 V - 33 - A VS+ Input Voltage Range 0.95  DIFFOUT / VS-  1.05 0.5 V  DIFFOUT  2.0 V -0.3 - 2.0 V VS- Input Voltage Range 0.95  DIFFOUT / VS-  1.05 0.5 V  DIFFOUT  2.0 V -0.3 - 0.3 V DC Gain VS+ to DIFFOUT 0 V  DAC - VS+  0.3 V 0.98 1.0 1.025 V/V DAC Accuracy (measured at VS+) Closed loop measurement including error amplifier. (See Figure 25) 1.0  DAC  1.6 0.5  DAC  1.0 -1.0 -10 - 1.0 10 % mV -3dB Bandwidth (Note 3) CL = 80 pF to GND, RL = 10 k to GND - 10 - MHz Slew Rate (Note 3) Vin = 100 mV, DIFFOUT = 1.3 V to 1.2 V - 5 - V/s Maximum Output Voltage VS+ - DAC = 1.0 V ISOURCE = 2.0 mA 2.0 3.0 - V Minimum Output Voltage VS+ - DAC = -0.8 V ISINK = 2.0 mA - 0.01 0.5 V Output Source Current (Note 3) VS+ - DAC = 1.0 V DIFFOUT = 1.0 V 2.0 - - mA Output Sink Current (Note 3) VS+ - DAC = -0.8 V DIFFOUT = 1.0 V 2.0 - - mA 3. Guaranteed by design. Not tested in production. http://onsemi.com 9 NCP5398 ELECTRICAL CHARACTERISTICS (Unless otherwise stated: 0°C < TA < 85°C; 4.75 V < VCC < 5.25 V; All DAC Codes; CVCC = 0.1 F) Parameter Test Conditions Min Typ Max Units - 1.30 5.64 5.79 5.95 V/V - 4 - MHz Internal Offset Voltage VDRP pin offset voltage AND Error Amp input voltage V VDRP Adaptive Voltage-Positioning Amplifier Current Sense Input to VDRP Gain -60 mV < (CSx-CSxN) < +60 mV (Each CS Input Independently) Current Sense Input to VDRP -3dB Bandwidth (Note 3) CL = 30 pF to GND, RL = 10 k to GND VDRP Output Slew Rate (Note 3) Vin = 25 mV 1.3 V < VDRP < 1.9 V, CL = 330 pF to GND, RL = 1 k to 10 k connected to 1.3 V 2.5 - - V/s VDRP Output Voltage Offset from Internal Offset Voltage CSx= CSxN = 1.3 V -15 - +15 mV Maximum VDRP Output Voltage CSx - CSxN = 0.1 V (all phases), ISOURCE = 1.0 mA 2.6 3.0 - V Minimum VDRP Output Voltage CSx - CSxN = -0.033 V (all phases), ISINK = 1.0 mA - 0.1 0.5 V Output Source Current (Note 3) VDRP = 2.0 V - 1.3 - mA Output Sink Current (Note 3) VDRP = 1.0 V - 25 - mA Current Sense Amplifiers Input Bias Current -200 - 200 nA Common Mode Input Voltage Range CSx = CSxN = 1.4 V -0.3 - 2.0 V Differential Mode Input Voltage Range (Note 3) -120 - 120 mV -1.0 - 1.0 mV - 6.0 - V/V 100 - 1000 kHz Input Referred Offset Voltage (Note 3) CSx = CSxN = 1.0 V Current Sense Input to PWM Gain 0 V < (CSx - CSxN) < 0.1 V Oscillator Switching Frequency Range (Note 3) Switching Frequency Accuracy, 2- or 4-phase ROSC = 50 k 25 k 10 k 196 380 803 - 226 420 981 kHz Switching Frequency Accuracy, 3-phase ROSC = 50 k 25 k 10 k 196 370 757 - 230 430 963 kHz Switching Frequency Tolerance, 2 and 4 Phase Operation (Note 3) 200 kHz < FSW < 600 kHz 100 kHz < FSW
NCP5398MNR2G 价格&库存

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