NCP5602

NCP5602 High Efficiency Ultra Small Thinnest White LED Driver The NCP5602 product is a dual output LED driver dedicated to the LCD display backlighting. The built−in DC−DC converter is based on a high efficient charge pump structure with operating mode 1x and 1.5x. It provides a peak 87% efficiency together with a 0.2% LED to LED matching. Features http://onsemi.com MARKING DIAGRAM LLGA12 (2x2 mm) MU SUFFIX CASE 513AA ZA M G G • • • • • • • • • 2.7 to 5.5 V Input Voltage Range 87% Peak Efficiency with 1x and 1.5x Mode ICON Function Implemented Built−in Short Circuit Protection Provides Two Independent LED Drives Support I2C Protocol Smallest Available Package on the Market Tight 0.2% LED to LED Matching This is a Pb−Free Device 1 ZA = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) Typical Applications PIN CONNECTIONS GND C1N 12 11 Vbat 10 C1P 9 8 7 (Top View) C2N C2P VOUT • Portable Back Light • Digital Cellular Phone Camera Photo Flash • LCD and Key Board Simultaneously Drive 220 nF/10 V Vbat 12 10 9 8 C4 1 mF/10 V GND 220 nF/10 V LED1 LED2 IREF SDA SCL 2 3 4 5 6 1 C1N C1P GND 1 mF/6.3 V 11 6 5 R1 10 k 1 4 C2N C2P 7 D1 C3 Vbat U1 NCP5602 Vout ORDERING INFORMATION Device NCP5602MUTBG Package LLGA12 (Pb−Free) Shipping† 3000 Tape & Reel I2C−SCL I2C−SDA SCL SDA IREF LED1 2 LWY87SG D2 LWY87SG 3 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. GND LED/ICON GND Figure 1. Typical Multiple White LED Driver © Semiconductor Components Industries, LLC, 2006 1 July, 2006 − Rev. 1 Publication Order Number: NCP5602/D NCP5602 C2 220 nF 12 10 9 C1 220 nF 8 C4 GND 1 mF/6.3 V Vbat C3 GND 1 mF/6.3 V 11 CHARGE PUMP DC−DC CONVERTER 7 Vout LWT67C OVERVOLTAGE SCL SDA 6 5 Q1 CURRENT CONTROL Vbat 2 DIGITAL CONTROL Vbat D1 D2 R1 GND 100 k GND 1 4 Q2 3 ANALOG CONTROL GND OVERTEMPERATURE ICON Figure 2. Simplified Block Diagram http://onsemi.com 2 LWT67C NCP5602 PIN FUNCTION DESCRIPTION Pin No. 1 Symbol GND Function POWER Description This pin is the GROUND signal for the analog and digital blocks and must be connected to the system ground. This pin is the GROUND reference for the DC−DC converter and the output current control. The pin must be connected to the system ground, a ground plane being strongly recommended. This pin sinks to ground and monitors the current flowing into the first LED, intended to be used in backlight application. The current is limited to 30 mA maximum (see Note 2). When the ICON bit of the LED−REG register is High, the LED2 fulfills the ICON function. In this case, LED1 is deactivated. This pin sinks to ground and monitors the current flowing into the second LED, intended to be used in backlight application. The current is limited to 30 mA maximum (see Note 2). When the ICON bit of the LED−REG register is High, the LED2 fulfills the ICON function. In this case, LED1 is deactivated. The ICON current is 600 mA typical. This pin provides the reference current, based on the internal bandgap voltage reference, to control the output current flowing in the LED. A 1% tolerance, or better, resistor shall be used to get the highest accuracy of the LED biases. An external current source can be used to bias this pin to dim the light coming out of the LED. In no case shall the voltage at pin 4 be forced either higher or lower than the 600 mV provided by the internal reference. 5 SDA INPUT, DIGITAL This pin carries the data provided by the I2C protocol. The content of the SDA byte is used to program the mode of operation and to set up the output current (see Table 2). This pin carries the I2C clock to control the DC−DC converter and to set up the output current. The SCL clock is associated with the SDA signal. This pin provides the output voltage supplied by the DC−DC converter. The Vout pin must be bypassed by 1.0 mF ceramic capacitor located as close as possible to the pin to properly bypass the output voltage to ground. The circuit shall not operate without such bypass capacitor properly connected to the Vout pin. The output voltage is internally clamped to 5.5 V maximum in the event of no load situation. On the other hand, the output current is limited to 40 mA (typical) in the event of a short circuit to ground. 8 9 10 11 12 C2P C2N C1P VBAT C1N POWER POWER POWER INPUT, POWER POWER One side of the external charge pump capacitor (CFLY ) is connected to this pin, associated with C2N (see Note 1). One side of the external charge pump capacitor (CFLY ) is connected to this pin, associated with C2P (see Note 1). One side of the external charge pump capacitor (CFLY ) is connected to this pin, associated with C1N, pin 11 (see Note 1). Input Battery voltage to supply the analog and digital blocks. The pin must be decoupled to ground by a 1.0 mF ceramic capacitor. One side of the external charge pump capacitor (CFLY ) is connected to this pin, associated with C1P, pin 10 (see Note 1). 2 LED1 INPUT, POWER 3 LED2 INPUT, POWER 4 IREF INPUT, ANALOG 6 7 SCL VOUT INPUT, DIGITAL OUTPUT, POWER 1. Using low ESR ceramic capacitor is mandatory to optimize the Charge Pump efficiency. 2. Total DC−DC output current is limited to 60 mA. http://onsemi.com 3 NCP5602 MAXIMUM RATINGS Rating Power Supply Output Power Supply Digital Input Voltage Digital Input Current Human Body Model: R = 1500 W, C = 100 pF (Note 3) Machine Model LLGA12 Package Power Dissipation @ TA = +85°C (Note 4) Thermal Resistance, Junction−to−Case Thermal Resistance, Junction−to−Air Operating Ambient Temperature Range Operating Junction Temperature Range Maximum Junction Temperature Storage Temperature Range Latchup Current Maximum Rating per JEDEC Standard: JESD78 Symbol VBAT Vout SCL, SDA ESD Value −0.3