NCP5662, NCV5662
Linear Regulator - Low
Output Voltage, Ultra-Fast,
Low Dropout, Enable
2.0 A
The NCP5662/NCV5662 is a high performance, low dropout linear
regulator designed for high power applications that require up to 2.0 A
current. It is offered in both fixed and adjustable output versions. With
output voltages as low as 0.9 V and ultra−fast response times for load
transients, the NCP5662/NCV5662 also provides additional features
such as Enable and Error Flag (for the fixed output version),
increasing the utility of these devices. A thermally robust, 5 pin
D2PAK or DFN8 package, combined with an architecture that offers
low ground current (independent of load), provides for a superior
high−current LDO solution.
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MARKING DIAGRAMS AND
PIN ASSIGNMENTS
NC
x5662DSy
AWLYWWG
1
5
D2PAK
DS SUFFIX
1
CASE 936A−02
Tab = GND
Pin 1 = EN
2 = Vin
3 = GND
4 = Vout
5 = ADJ/EF
Features
•
•
•
•
•
•
•
•
•
•
•
•
Ultra−Fast Transient Response (Settling Time: 1−3 ms)
Low Noise Without Bypass Capacitor (26 mVrms)
Low Ground Current Independent of Load (3.0 mA Maximum)
Fixed/Adjustable Output Voltage Versions
Enable Function
Error Flag (Fixed Output Version)
Current Limit Protection
Thermal Shutdown Protection (160°C)
0.9 V Reference Voltage for Ultra−Low Output Operation
Power Supply Rejection Ratio > 65 dB
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These are Pb−Free Devices
Applications
•
•
•
•
•
•
Servers
ASIC Power Supplies
Post Regulation for Power Supplies
Constant Current Source
Networking Equipment
Gaming and STB Modules
1
DFN8
MN SUFFIX
CASE 488AF
Fixed Version
Pin 1 = EF
2 = GND
3 = N/C
4 = EN
5, 6 = Vin
7, 8 = Vout
NCP5
662y
ALYW G
G
Adjustable Version
Pin 1 = ADJ
2 = GND
3 = N/C
4 = EN
5, 6 = Vin
7 = Vout
8 = N/C
x
y
= P or V
= A for Adjustable Version
B for Fixed 1.5 V Version
C for Fixed 3.3 V Version
D for Fixed 1.2 V Version
E for Fixed 1.8 V Version
F for Fixed 2.5 V Version
G for Fixed 2.8 V Version
H for Fixed 3.0 V Version
A
= Assembly Location
L
= Wafer Lot
Y
= Year
WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
October, 2019 − Rev. 16
1
Publication Order Number:
NCP5662/D
NCP5662, NCV5662
REF
Vin
Vin
NCP5662
NCV5662
EN
Vout
Vin
Error Flag
EF
GND
Cin
Vout
Cin
Vin
NCP5662
NCV5662
R1
GND
Enable
Enable
OFF ON
OFF ON
Figure 1. Typical Application Schematic, Fixed
Output
Cout
ADJ
EN
Cout
Vout
Vout
R2
Figure 2. Typical Application Schematic,
Adjustable Output
PIN FUNCTION DESCRIPTION
Pin
Adj/Fixed
D2PAK
Pin
Adj/Fixed
DFN8
Pin Name
Description
1
4
EN
Enable. This pin allows for on/off control of the regulator. To disable
the device, connect to Ground. If this function is not in use, connect
to Vin.
2
5, 6*
Vin
Positive Power Supply Input Voltage
3, TAB
2
GND
Power Supply Ground
4
7, 8
Vout
Regulated Output Voltage
5
1
ADJ
(Adjustable Version)
5
1
EF
(Fixed Version)
−
3, 8
Pin 3 N/C on Fixed & ADJ Version
while Pin 8 N/C on ADJ Version only
No connection. True no connect. PCB runs allowable.
−
EPAD
EPAD
Exposed thermal pad should be connected to ground.
This pin is connected to the resistor divider network and programs
the output voltage.
An Error Flag is triggered when the output voltage is out of regulation
excluding transient signals that may occur. Requires a pullup resistor
f 100 kW.
*Pins 5 and 6 must be connected together externally for output current full range operation.
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2
NCP5662, NCV5662
Vin
Voltage
Reference
Block
Vref = 0.9 V
R3
EN
Enable
Block
Vout
Output
Stage
Cc
R1
R4
R2
Error
Flag
EF
GND
Figure 3. Block Diagram, Fixed Output
Vin
Enable
Block
Voltage
Reference
Block
EN
Vref = 0.9 V
R3
Output
Stage
Vout
ADJ
R4
GND
Figure 4. Block Diagram, Adjustable Output
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3
NCP5662, NCV5662
ABSOLUTE MAXIMUM RATINGS
Symbol
Value
Unit
Input Voltage (Note 1)
Rating
Vin
18
V
Output Pin Voltage
Vout
−0.3 to (Vin +0.3)
V
Adjust Pin Voltage
VADJ
−0.3 to (Vin +0.3)
V
Enable Pin Voltage
VEN
−0.3 to (Vin +0.3)
V
Error Flag Voltage
VEF
−0.3 to (Vin +0.3)
V
IEF
3.0
mA
TJ(max)
150
°C
Error Flag Current
Maximum Junction Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
NOTE: This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM), Class 3A, 2000 V
Machine Model (MM), Class C, 200 V
Charge Device Model (CDM), Class IV, 2000 V.
1. Refer to Electrical Characteristics and Application Information for Safe Operating Area.
THERMAL CHARACTERISTICS
Rating
Symbol
Value
RqJA
RqJC
RYJL
45
5.0
7.0
RqJA
RYJL
78
14
D2PAK
Thermal Characteristics,
(Notes 1 and 2)
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case
Thermal Reference, Junction−to−Lead
Unit
°C/W
Thermal Characteristics, DFN8 (Notes 1 and 2)
Thermal Resistance, Junction−to−Ambient
Thermal Reference, Junction−to−Lead (Note 3)
°C/W
2. As measured using a copper heat spreading area of 1 sq in copper, 1 oz copper thickness.
3. Lead 6.
OPERATING RANGES
Rating
Operating Input Voltage (Note 1)
Operating Ambient Temperature Range
NCP5662
NCV5662
Storage Temperature Range
4. Minimum Vin = (Vout + VDO) or 2 V, whichever is higher.
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4
Symbol
Value
Unit
Vin
(Vout+VDO), 2 to 9 (Note 4)
V
TA
−40 to +85
−40 to +125
°C
Tstg
−55 to +150
°C
NCP5662, NCV5662
ELECTRICAL CHARACTERISTICS (Vin = Vout + 1.5 V, for typical values TA = 25°C, for min/max values TA = −40°C to 85°C (NCP
version), TA = −40°C to 125°C (NCV version), Cin = Cout = 150 mF unless otherwise noted. (Note 5))
Characteristic
Symbol
Min
Typ
Max
Unit
Vn
−
26
−
mVrms
(−1%)
(−1.5%)
(−2%)
−
0.9
−
(+1%)
(+1.5%)
(+2%)
ADJUSTABLE OUTPUT VERSION
Output Noise Voltage
Output Voltage
TA = 25°C (Vin = Vout +1.5 V to 7.0 V, Iout = 10 mA to 2.0 A)
TA = −20 to +125°C (Vin = Vout +1.5 V to 7.0 V, Iout = 10 mA to 2.0 A)
TA = −40 to +150°C (Vin = Vout +1.5 V to 7.0 V, Iout = 10 mA to 2.0 A)
Adjustable Pin Input Current
Vout
V
IADJ
−
40
−
nA
Line Regulation (Iout = 10 mA, Vout+1.5 V < Vin < 7.0 V)
REGline
−
0.03
−
%
Load Regulation (10 mA < Iout < 2.0 A)
REGload
−
0.03
−
%
VDO
−
1.0
1.3
V
Peak Output Current Limit
Iout(peak)
2.0
−
−
A
Internal Current Limitation
ILIM
−
3.0
−
A
Ripple Rejection (120 Hz)
Ripple Rejection (1 kHz)
RR
−
−
70
65
−
−
dB
IGND
IGND(DIS)
−
−
1.3
10
3.0
300
mA
mA
1.3
−
−
−
−
0.3
−
−
0.5
0.5
−
−
Dropout Voltage (Iout = 2.0 A)
Ground Current
Iout = 2.0 A
Disabled State
Enable Input Threshold Voltage
VEN
Voltage Increasing, On state, Logic High
Voltage Decreasing, Off state, Logic Low
Enable Input Current
V
IEN
Enable Pin Voltage = 0.3 Vmax
Enable Pin Voltage = 1.3 Vmin
mA
5. Performance guaranteed over specified operating conditions by design, guard banded test limits, and/or characterization, production tested at
TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
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5
NCP5662, NCV5662
ELECTRICAL CHARACTERISTICS (Vin = Vout + 1.5 V, for typical values TA = 25°C, for min/max values TA = −40°C to 85°C (NCP
version), TA = −40°C to 125°C (NCV version), Cin = Cout = 150 mF unless otherwise noted. (Note 6))
Characteristic
Symbol
Min
Typ
Max
Unit
Vn
−
26
−
mVrms
(−1%)
(−1.5%)
(−2%)
−
Vout(nom)
−
(+1%)
(+1.5%)
(+2%)
FIXED OUTPUT VOLTAGE
Output Noise Voltage (Vout = 0.9 V)
Output Voltage (Note 7)
TA = 25°C (Vin = Vout +1.5 V to 7.0 V, Iout = 10 mA to 2.0 A)
TA = −20 to +125°C (Vin = Vout +1.5 V to 7.0 V, Iout = 10 mA to 2.0 A)
TA = −40 to +150°C (Vin = Vout +1.5 V to 7.0 V, Iout = 10 mA to 2.0 A)
Vout
V
Line Regulation (Iout = 10 mA, Vout+1.5 V < Vin < 7.0 V)
REGline
−
0.03
−
%
Load Regulation (10 mA < Iout < 2.0 A)
REGload
−
0.2
−
%
VDO
−
1.0
1.3
V
Peak Output Current Limit
Iout(peak)
2.0
−
−
A
Internal Current Limitation
ILIM
−
3.0
−
A
Ripple Rejection (120 Hz)
Ripple Rejection (1 kHz)
RR
−
−
70
65
−
−
dB
IGND
IGND(DIS)
−
−
1.3
30
3.0
300
mA
mA
1.3
−
−
−
−
0.3
−
−
0.5
0.5
−
−
mA
Dropout Voltage (Iout = 2.0 A)
Ground Current
Iout = 2.0 A
Disabled State
Enable Input Threshold Voltage
VEN
Voltage Increasing, On state, Logic High
Voltage Decreasing, Off state, Logic Low
Enable Input Current
V
IEN
Enable Pin Voltage = 0.3 Vmax
Enable Pin Voltage = 1.3 Vmin
Error Flag Voltage Threshold (Fixed Output)
VEF(VT)
91
94
97
% of Vout
Error Flag Output Low Voltage Saturation (IEF = 1.0 mA)
VEF(SAT)
−
200
−
mV
IEF(leakage)
−
1.0
−
mA
tEF
−
50
−
ms
Error Flag Leakage
Error Flag Blanking Time (Note 8)
6. Performance guaranteed over specified operating conditions by design, guard banded test limits, and/or characterization, production tested at
TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
7. Fixed output voltage available at 0.9 V per request.
8. Can be disabled per customer request.
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6
NCP5662, NCV5662
TYPICAL CHARACTERISTICS
(Typical characteristics were measured with the same conditions as electrical characteristics, unless otherwise noted)
VDO, DROPOUT VOLTAGE (V)
1.2
1.0
0.8
0.6
0.4
0.2
0
−50
−25
0
25
50
75
100
125
150
TA, AMBIENT TEMPERATURE (°C)
Figure 5. Dropout Voltage vs. Temperature
1.3
Vout = 1.5 V Fixed
Cin = 150 mF
Cout = 10 to 150 mF
TA = 25°C
1.2
1.1
VDO, DROPOUT VOLTAGE (V)
VDO, DROPOUT VOLTAGE (V)
1.3
1.0
0.9
0.8
0.7
0
0.5
1.0
1.5
1.1
1.0
0.9
0.8
0
0.5
1.0
1.5
2.0
Iout, OUTPUT CURRENT (A)
Iout, OUTPUT CURRENT (A)
Figure 6. 1.5 V Dropout Voltage vs. Output Current
Figure 7. 3.3 V Dropout Voltage vs. Output Current
3.5
ISC, SHORT CIRCUIT LIMIT (A)
3.5
IGND, GROUND CURRENT (mA)
1.2
0.7
2.0
Vout = 3.3 V Fixed
Cin = 150 mF
Cout = 10 to 150 mF
TA = 25°C
3.0
2.5
2.0
1.5
1.0
0.5
0
−50
−25
0
25
50
75
100
125
3.25
3
2.75
2.5
2.25
2
−50
150
−25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 8. Ground Current vs. Temperature
Figure 9. Short Circuit Current Limit vs.
Temperature
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7
150
NCP5662, NCV5662
1.6
3.4
1.4
3.0
Vout, OUTPUT VOLTAGE (V)
Vout, OUTPUT VOLTAGE (V)
TYPICAL CHARACTERISTICS
1.2
1.0
0.8
0.6
0.4
0.2
0
1.0
Iout = 10 mA
Cin = 150 mF
Cout = 1.0 to 150 mF
TA = 25°C
2.0
3.0
4.0
5.0
6.0
7.0
8.0
2.2
1.8
1.4
9.0
Iout = 10 mA
Cin = 150 mF
Cout = 1.0 to 150 mF
TA = 25°C
1.0
0.6
0.2
0
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
Vin, INPUT VOLTAGE (V)
Vin, INPUT VOLTAGE (V)
Figure 10. 1.5 V Output Voltage vs. Input Voltage
Figure 11. 3.3 V Output Voltage vs. Input Voltage
1.55
3.35
Vin = 3.3 V
Iout = 2.0 A maximum
Cin = 150 mF
Cout = 1.0 to 150 mF
TA = 25°C
1.53
1.51
Vin = 5.1 V
Iout = 2.0 A maximum
Cin = 150 mF
Cout = 1.0 to 150 mF
TA = 25°C
3.34
Vout, OUTPUT VOLTAGE (V)
Vout, OUTPUT VOLTAGE (V)
2.6
1.49
1.47
3.33
3.32
3.31
3.30
3.29
3.28
3.27
3.26
1.45
0
0.5
1.0
1.5
3.25
2.0
1.0
1.5
2.0
Figure 12. 1.5 V Output Voltage vs. Output Load
Current
Figure 13. 3.3 V Output Voltage vs. Output Load
Current
100
RR, RIPPLE REJECTION (dB)
TA = 25°C
L = 25 mm Copper
1.0
OUTPUT CURRENT (A)
0.5
Iout, OUTPUT CURRENT (A)
1.2
0.8
0.6
0.4
0.2
0.0
0
Iout, OUTPUT CURRENT (A)
0
2
4
6
8
10
12
14
16
90
70
60
50
40
30
20
10
0
0
20
Iout = 10 mA
80
INPUT−OUTPUT VOLTAGE DIFFERENTIAL (V)
Figure 14. Output Current vs. Input−Output
Voltage Differential
Vin = 4.0 V
Vout = 0.9 V
Cin = 0 mF
Cout = 1.0 mF
TA = 25°C
1.0
Iout = 1.0 A
10
100
F, FREQUENCY (kHz)
1000
Figure 15. Ripple Rejection vs. Frequency
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NCP5662, NCV5662
100
100
90
90
NOISE DENSITY (nVrms/ǨHz)
NOISE DENSITY (nVrms/ǨHz)
TYPICAL CHARACTERISTICS
80
70
60
50
40
30
20
10
0
Vin = 12 V
Vout = 0.9 V
Iout = 10 mA
Cin = 150 mF
Cout = 150 mF
TA = 25°C
Start 1.0 kHz
F, FREQUENCY (kHz)
80
70
60
50
40
30
20
10
0
Stop 100 kHz
Vin = 3.3 V
Vout = 0.9 V
Iout = 2.36 A
Cin = 150 mF
Cout = 150 mF
TA = 25°C
Start 1.0 kHz
Figure 16. Noise Density vs. Frequency
F, FREQUENCY (kHz)
Stop 100 kHz
Figure 17. Noise Density vs. Frequency
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NCP5662, NCV5662
TYPICAL CHARACTERISTICS
Vout
50 mV/Div
Vout
20 mV/Div
Iout
1.0 A/Div
Iout
1.0 A/Div
Vin = 3.3 V
Vout = 1.5 V Fixed
Cin = 150 mF
Cout = 150 mF
TA = 25°C
Iout = 2.0 A to 10 mA
Iout = 10 mA to 2.0 A
TIME (1.0 ms/Div)
TIME (1.0 ms/Div)
Figure 18. Load Transient Response
Figure 19. Load Transient Response
Vin = 3.3 V
Vout = 1.5 V Fixed
Cin = 150 mF
Cout = 150 mF
TA = 25°C
Vout
50 mV/Div
Vout
20 mV/Div
Vin = 3.3 V
Vout = 1.5 V Fixed
Cin = 150 mF
Cout = 150 mF
TA = 25°C
Iout
1.0 A/Div
Iout
1.0 A/Div
Vin = 3.3 V
Vout = 1.5 V Fixed
Cin = 150 mF
Cout = 150 mF
TA = 25°C
Iout = 2.0 A to 10 mA
Iout = 10 mA to 2.0 A
TIME (100 ns/Div)
Figure 21. Load Transient Response
Vin = 4.0 V
Vout = 0.9 V
Cin = 150 mF
Cout = 10 mF
TA = 25°C
Iout = 10 mA to 2.0 A
Vin = 4.0 V
Vout = 0.9 V
Cin = 150 mF
Cout = 10 mF
TA = 25°C
Iout
1.0 A/Div
Iout
1.0 A/Div
Vout
50 mV/Div
Vout
20 mV/Div
TIME (100 ns/Div)
Figure 20. Load Transient Response
Iout = 2.0 A to 10 mA
TIME (200 ns/Div)
TIME (200 ns/Div)
Figure 22. Load Transient Response
Figure 23. Load Transient Response
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NCP5662, NCV5662
APPLICATION INFORMATION
Current Limit Operation
The NCP5662 is a high performance low dropout 2.0 A
linear regulator suitable for high power applications,
featuring an ultra−fast response time and low noise without
a bypass capacitor. It is offered in both fixed and adjustable
output versions with voltages as low as 0.9 V. Additional
features, such as Enable and Error Flag (fixed output
version) increase the utility of the NCP5662. It is thermally
robust and includes the safety features necessary during a
fault condition, which provide for an attractive high current
LDO solution for server, ASIC power supplies, networking
equipment applications, and many others.
As the peak output current increases beyond its limitation,
the device is internally clampled to 3.0 A, thus causing the
output voltage to decrease and go out of regulation. This
allows the device never to exceed the maximum power
dissipation.
Error Flag Operation
The Error Flag pin on the NCP5662 will produce a logic
Low when it drops below the nominal output voltage. Refer
to the electrical characteristics for the threshold values at
which point the Error Flag goes Low. When the NCP5662
is above the nominal output voltage, the Error Flag will
remain at logic High.
The external pullup resistor needs to be connected
between Vin and the Error Flag pin. A resistor of
approximately 100 kW is recommended to minimize the
current consumption. No pullup resistor is required if the
Error Flag output is not being used.
Input Capacitor
The recommended input capacitor value is a 150 mF
OSCON with an Equivalent Series Resistance (ESR) of
50 mW. It is especially required if the power source is
located more than a few inches from the NCP5662. This
capacitor will reduce device sensitivity and enhance the
output transient response time. The PCB layout is very
important and in order to obtain the optimal solution, the Vin
and GND traces should be sufficiently wide to minimize
noise and unstable operation.
Thermal Consideration
The maximum package power dissipation is:
T
Output Capacitor
P
Proper output capacitor selection is required to maintain
stability. The NCP5662 is guaranteed to be stable at an
output capacitance of, Cout > 10 mF with an ESR between
50 mW and 300 mW over the output current range of 10 mA
to 2.0 A. For PCB layout considerations, place the
recommended ceramic capacitor close to the output pin and
keep the leads short. This should help ensure ultra−fast
transient response times.
The application circuit for the adjustable output version is
shown in Figure 2. The reference voltage is 0.9 V and the
adjustable pin current is typically 40 nA. A resistor divider
network, R1 and R2, is calculated using the following
formula:
Input
Cin
ON
ǒVVout
* 1Ǔ
ref
Vout
Vin
NCP5662
EN
OFF
Enable
J(max)
R
*T
A
qJA
The bipolar process employed for this IC is fully
characterized and rated for reliable 18 V operation. To avoid
damaging the part or degrading it’s reliability, power
dissipation transients should be limited to under 30 W for
D2PAK. For open−circuit to short−circuit transient,
PDTransient = Vin(operating max) * ISC.
Adjustable Output Operation
R1 + R2
D
+
Vout = 0.9 V
Output
Cout
ADJ
GND
Figure 24. To achieve the minimum output voltage,
ADJ to Vout has to be connected together
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NCP5662, NCV5662
390
340
qJA (°C/W)
290
240
190
140
1 oz Copper
2 oz Copper
90
40
0
100
200
300
400
COPPER AREA
500
600
700
(mm2)
Figure 25. DFN8 Thermal Resistance vs. Copper Area
NCP5662 Evaluation Board
Figure 26. Test Board used for Evaluation
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12
NCP5662, NCV5662
ORDERING INFORMATION
Device
NCP5662DSADJR4G
Nominal Output Voltage
Shipping†
D2PAK
800 / Tape & Reel
DFN8
3000 / Tape & Reel
Adj
(Pb−Free)
NCP5662DS12R4G
Fixed, 1.2 V
(Pb−Free)
NCP5662DS15R4G
Fixed, 1.5 V
(Pb−Free)
NCP5662DS18R4G
Fixed, 1.8 V
(Pb−Free)
NCP5662DS25R4G
Fixed, 2.5 V
(Pb−Free)
NCP5662DS28R4G
Fixed, 2.8 V
(Pb−Free)
NCP5662DS30R4G
Fixed, 3.0 V
(Pb−Free)
NCP5662DS33R4G
Fixed, 3.3 V
(Pb−Free)
NCV5662DSADJR4G*
Package
Adj
(Pb−Free)
NCV5662DS15R4G*
Fixed, 1.5 V
(Pb−Free)
NCV5662DS33R4G*
Fixed, 3.3 V
(Pb−Free)
NCP5662MNADJR2G
Adj
(Pb−Free)
NCP5662MN15R2G
Fixed, 1.5 V
(Pb−Free)
NCP5662MN33R2G
Fixed, 3.3 V
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable
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13
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN8, 4x4
CASE 488AF−01
ISSUE C
1
SCALE 2:1
A
B
D
PIN ONE
REFERENCE
2X
0.15 C
2X
0.15 C
0.10 C
8X
ÉÉ
ÉÉ
ÉÉ
0.08 C
DETAIL A
E
OPTIONAL
CONSTRUCTIONS
EXPOSED Cu
DETAIL B
ÇÇÇÇ
(A3)
A
A1
C
D2
ÇÇÇÇ
e
8X
SEATING
PLANE
ÉÉÉ
ÉÉÉ
ÇÇÇ
A3
A1
ALTERNATE
CONSTRUCTIONS
8X
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.25
0.35
4.00 BSC
1.91
2.21
4.00 BSC
2.09
2.39
0.80 BSC
0.20
−−−
0.30
0.50
−−−
0.15
XXXXXX
XXXXXX
ALYWG
G
E2
5
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
GENERIC
MARKING DIAGRAM*
L
4
ÇÇÇÇ
8
MOLD CMPD
DETAIL B
SIDE VIEW
K
ÇÇÇ
ÇÇÇ
ÉÉÉ
TOP VIEW
1
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. DETAILS A AND B SHOW OPTIONAL CONSTRUCTIONS FOR TERMINALS.
L
L
L1
NOTE 4
DETAIL A
DATE 15 JAN 2009
b
XXXX = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
0.10 C A B
0.05 C
NOTE 3
BOTTOM VIEW
SOLDERING FOOTPRINT*
2.21
8X
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
0.63
4.30 2.39
PACKAGE
OUTLINE
8X
0.35
0.80
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON15232D
DFN8, 4X4, 0.8P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
D2PAK 5−LEAD
CASE 936A−02
ISSUE E
DATE 28 JUL 2021
SCALE 1:1
GENERIC
MARKING DIAGRAM*
xx
xxxxxxxxx
AWLYWWG
xxxxxx
A
WL
Y
WW
G
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98ASH01006A
D2PAK 5−LEAD
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
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