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liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws,
regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative
Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
LDO Regulator - Very Low
Dropout, CMOS, Bias Rail
1A
NCP59771
The NCP59771 is a 1 A VLDO equipped with NMOS pass
transistor and a separate bias supply voltage (VBIAS). The device
provides very stable, accurate output voltage with low noise suitable
for space constrained, noise sensitive applications. In order to
optimize performance for battery operated portable applications, the
NCP59771 features low IQ consumption. The WLCSP6 1.4 mm x
0.8 mm Chip Scale package is optimized for use in space constrained
applications.
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WLCSP6, 1.4x0.8x0.37
CASE 567YU
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
Input Voltage Range: VOUT to 5.5 V
Bias Voltage Range: 2.5 V to 5.5 V
Adjustable Voltage Version Available
Output Voltage Range: 0.4 V to 3.0 V
±1% Accuracy over Temperature, 0.5% VOUT @ 25°C
Ultra−Low Dropout: Typ. 50 mV at 1 A
Very Low Bias Input Current of Typ. 80 mA
Very Low Bias Input Current in Disable Mode: Typ. 0.5 mA
Logic Level Enable Input for ON/OFF Control
Output Active Discharge Option Available
Stable with a 4.7 mF Ceramic Capacitor
Available in WLCSP6 − 1.4 mm x 0.8 mm, 0.4 mm pitch Package
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MARKING DIAGRAM
XXMG
XX = Specific Device Code
M = Month Code
G
= Pb−Free Package
PIN CONNECTIONS
1
2
A
OUT
IN
B
FB
EN
C
GND
BIAS
Typical Applications
• Battery−powered Equipment
• Smartphones, Tablets
• Cameras, DVRs, STB and Camcorders
V BIAS
C BIAS
1 μF
BIAS
V IN
IN
C IN
4.7 μF
EN
VOUT
OUT
NCP59771
FB
Top View
R1
C FF
GND
ON
OFF
C OUT
4.7 μF
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 8 of this data sheet.
R2
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2020
September, 2020 − Rev. 0
1
Publication Order Number:
NCP59771/D
NCP59771
CURRENT
LIMIT
IN
EN
BIAS
OUT
ENABLE
BLOCK
150 W
*Active
DISCHARGE
UVLO
VOLTAGE
REFERENCE
+
−
THERMAL
LIMIT
FB
GND
*Active output discharge function is present only in NCP59771A option devices.
Figure 2. Simplified Schematic Block Diagram
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2
NCP59771
PIN FUNCTION DESCRIPTION
Pin No.
WLCSP6
Pin Name
A1
OUT
A2
IN
Input Voltage Supply pin
B1
FB
Feedback pin. Connect resistor divider to set requested output voltage.
B2
EN
Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into
shutdown mode.
C1
GND
Ground pin
C2
BIAS
Bias voltage supply for internal control circuits. This pin is monitored by internal Under-Voltage
Lockout Circuit.
Description
Regulated Output Voltage pin
ABSOLUTE MAXIMUM RATINGS
Rating
Input Voltage (Note 1)
Output Voltage
Chip Enable, Bias and SNS Input
Symbol
Value
Unit
VIN
−0.3 to 6
V
VOUT
−0.3 to (VIN+0.3) ≤ 6
V
VEN, VBIAS, VFB
−0.3 to 6
V
Output Short Circuit Duration
tSC
unlimited
s
Maximum Junction Temperature
TJ
150
°C
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection (except OUT pin) and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating
Thermal Characteristics, WLCSP6 1.4 mm x 0.8 mm
Thermal Resistance, Junction−to−Air (Note 3)
Symbol
Value
Unit
RqJA
69
°C/W
3. This junction−to−ambient thermal resistance under natural convection was derived by thermal simulations based on the JEDEC JESD51
series standards methodology. Only a single device mounted at the center of a high_K (2s2p) 80 mm x 80 mm multilayer board with 1−ounce
internal planes and 2−ounce copper on top and bottom. Top copper layer has a dedicated 1.6 sqmm copper area.
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3
NCP59771
ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 85°C; VBIAS = 2.7 V or (VOUT + 1.6 V), whichever is greater,
VIN = VOUT(NOM) + 0.3 V, IOUT = 1 mA, VEN = 1 V, CIN = 4.7 mF, COUT = 10 mF, CBIAS = 1 mF, unless otherwise noted.
Typical values are at TJ = +25°C. Min/Max values are for −40°C ≤ TJ ≤ 85°C unless otherwise noted. (Note 4)
Parameter
Symbol
Min
Max
Unit
Operating Input Voltage
Range
VIN
VOUT +
VDO
5.5
V
Operating Bias Voltage
Range
VBIAS
(VOUT +
1.50) ≥ 2.5
5.5
V
Undervoltage Lock−out
Test Conditions
VBIAS Rising
Hysteresis
Output Voltage Accuracy
Typ
UVLO
1.6
0.2
V
VOUT
±0.5
%
Reference voltage
TJ = 25°C
VREF
Output Voltage Accuracy
−40°C ≤ TJ ≤ 85°C, VOUT(NOM) + 0.1 V ≤ VIN ≤ VOUT(NOM)
+ 1.0 V, 2.7 V or (VOUT(NOM) + 1.6 V), whichever is
greater < VBIAS < 5.5 V, 1 mA < IOUT < 1 A
VOUT
VIN Line Regulation
VOUT(NOM) + 0.1 V ≤ VIN ≤ 5.0 V
LineReg
0.01
%/V
VBIAS Line Regulation
2.7 V or (VOUT(NOM) + 1.6 V), whichever is greater <
VBIAS < 5.5 V
LineReg
0.01
%/V
Load Regulation
IOUT = 1 mA to 1 A
LoadReg
1.5
VIN Dropout Voltage
IOUT = 1 A (Note 5)
VDO
50
80
VBIAS Dropout Voltage
IOUT = 1 A, VIN = VBIAS (Notes 5, 6)
VDO
1.1
1.5
Output Current Limit
VOUT = 90% VOUT(NOM)
ICL
FB Pin Operating Current
0.4
−1.0
1500
V
+1.0
%
mV
2000 2600
mV
V
mA
IFB
0.1
0.5
mA
IBIASQ
70
110
mA
VEN ≤ 0.4 V
IBIAS(DIS)
0.5
1
mA
Input Pin Disable Current
VEN ≤ 0.4 V
IVIN(DIS)
0.5
1
mA
EN Pin Threshold Voltage
EN Input Voltage “H”
VEN(H)
EN Input Voltage “L”
VEN(L)
Bias Pin Quiescent
Current
VBIAS = 2.7 V, IOUT = 0 mA
Bias Pin Disable Current
V
0.9
0.4
EN Pull Down Current
VEN = 5.5 V
IEN
0.3
Power Supply Rejection
Ratio
VIN to VOUT, f = 1 kHz, IOUT = 10 mA,
VIN ≥ VOUT +0.5 V, VOUT(NOM) = 1.2 V,
VBIAS = 3.0 V
PSRR(VIN)
75
dB
VBIAS to VOUT, f = 1 kHz, IOUT = 10 mA,
VIN ≥ VOUT +0.5 V, VOUT(NOM) = 1.2 V,
VBIAS = 3.0 V
PSRR(VBIAS)
80
dB
Output Noise Voltage
VIN = VOUT +0.5 V, f = 10 Hz to 100 kHz
VN
35 x
VOUT/
VREF
mVRMS
Thermal Shutdown
Threshold
Temperature increasing
160
°C
Temperature decreasing
140
Output Discharge
Pull−Down
VEN ≤ 0.4 V, VOUT = 0.5 V,
Only ‘A’ option
Delay time
From assertion of VEN to output voltage increase
Rise time
VOUT rise from 10% to 90% VOUT(NOM)
Turn−On Time
From assertion of VEN to VOUT = 98% VOUT(NOM)
1
mA
RDISCH
150
W
tDELAY
73
ms
tRISE
15
tON
98
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when VOUT falls 3% below VOUT(NOM).
6. For output voltages below 1.5 V, VBIAS dropout does not apply due to a minimum Bias operating voltage of 2.5 V.
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NCP59771
TYPICAL CHARACTERISTICS
90
100
80
90
IBIAS, BIAS PIN CURRENT (mA)
IBIAS, BIAS PIN CURRENT (mA)
At TJ = +25°C, VIN = VOUT(NOM) + 0.3 V, VBIAS = 2.8 V, VEN = VBIAS, VOUT(NOM) = 1.2 V, IOUT = 700 mA,
CIN = 4.7 mF, CBIAS = 1 mF, and COUT = 10 mF (effective capacitance), unless otherwise noted.
70
60
50
40
30
TJ = −40°C
TJ = 25°C
TJ = 85°C
20
10
80
70
60
50
40
30
10
0
0
0.1
1
10
100
TJ = −40°C
TJ = 25°C
TJ = 85°C
20
1000
2
40 mV/div
40 mV/div
3.5
4
4.5
5
Figure 4. BIAS Pin Current vs. VBIAS and TJ
Figure 3. BIAS Pin Current vs. IOUT and TJ
VOUT
VOUT
350 mA
200 mA/div
350 mA
200 mA/div
3
VBIAS, BIAS VOLTAGE (V)
IOUT, OUTPUT CURRENT (mA)
IOUT
1 mA
100 ms/div
IOUT
1 mA
100 ms/div
Figure 6. Load Transient Response,
IOUT = 1 mA to 350 mA in 1 ms, COUT = 10 mF
2 V/div
Figure 5. Load Transient Response,
IOUT = 1 mA to 350 mA in 1 ms, COUT = 4.7 mF
20 mV/div
2.5
VOUT
VEN
VOUT
200 mV/div
200 mA/div
IOUT
200 mA/div
350 mA
1 mA
IOUT
VIN = 1.4 V
VBIAS = 3 V
VOUT(NOM) = 1.2 V
20 ms/div
400 ms/div
Figure 7. Load Transient Response,
IOUT = 1 mA to 350 mA in 1 ms, COUT = 47 mF
Figure 8. Enable Transient Response, COUT = 10 mF, IOUT
= 700 mA − A Option (Normal)
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NCP59771
2 V/div
2 V/div
TYPICAL CHARACTERISTICS (continued)
At TJ = +25°C, VIN = VOUT(NOM) + 0.3 V, VBIAS = 2.8 V, VEN = VBIAS, VOUT(NOM) = 1.2 V, IOUT = 700 mA,
CIN = 4.7 mF, CBIAS = 1 mF, and COUT = 10 mF (effective capacitance), unless otherwise noted.
VEN
VEN
VOUT
200 mV/div
200 mA/div
200 mV/div
IOUT
VIN = 1.4 V
VBIAS = 3 V
VOUT(NOM) = 1.2 V
VOUT
20 ms/div
50 ms/div
Figure 10. Enable Transient Response,
COUT = 10 mF, IOUT = 700 mA − C Option (Slow)
Figure 9. Enable Transient Response, COUT = 10 mF,
IOUT = 0 mA − A Option (Normal)
1 V/div
VOUT
2.8 V
10 mV/div
200 mV/div
200 mA/div
2 V/div
3.8 V
VEN
VBIAS
VOUT
50 ms/div
10 ms/div
Figure 11. Enable Transient Response,
COUT = 10 mF, IOUT = 0 mA − C Option (Slow)
Figure 12. BIAS Line Transient Response,
VBIAS = 2.8 V to 3.8 V in 5 ms
10 mV/div
1 V/div
2.5 V
1.5 V
VIN
VOUT
10 ms/div
Figure 13. IN Line Transient Response,
VIN = 1.5 V to 2.5 V in 5 ms
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NCP59771
APPLICATIONS INFORMATION
The NCP59771 dual−rail very low dropout voltage
regulator is using NMOS pass transistor for output voltage
regulation from VIN voltage. All the low current internal
control circuitry is powered from the VBIAS voltage.
The use of an NMOS pass transistor offers several
advantages in applications. Unlike PMOS topology devices,
the output capacitor has reduced impact on loop stability.
Vin to Vout operating voltage difference can be very low
compared with standard PMOS regulators in very low Vin
applications.
The NCP59771 offers smooth monotonic start-up. The
controlled voltage rising limits the inrush current.
The Enable (EN) input is equipped with internal
hysteresis.
VBIAS
C BIAS
1 mF
VOUT
BIAS
V IN
C IN
4.7 mF
OUT
IN
NCP59771
EN
GND
R1
FB
ON
CFF
C OUT
10 mF
R2
OFF
Figure 14. Typical Application Schematic
Output Voltage Adjustment
effect on output voltage accuracy is negligible. In other
cases it should be consider especially when tight output
voltage accuracy is requested.
The required output voltage can be adjusted from 0.4 V to
1.8 V using two external resistors. Typical application
schematic is shown on Figure 14. Output voltage is
calculated according to Equation 1. When resistor’s value is
in kW range last term (IFB x R1) can be omitted because its
ǒ
V OUT + V FB @ 1 )
Ǔ
R1
) I FB @ R 1
R2
(eq. 1)
Voltage Calculation Example – VOUT = 0.8 V:
a) R 1 + R 2 + 5.1 kW, no ǒI FB
R 1Ǔ
ǒ
5.1 kW
+ 0.8 V
5.1 kW
ǒ
5.1 kW
) 100 nA @ 5.1 kW + 0.80051 V
5.1 kW
ǒ
5.1 kW
) 100 nA @ 51 kW + 0.8051 V
5.1 kW
V OUT + 0.4 @ 1 )
b) R 1 + R 2 + 5.1 kW
V OUT + 0.4 @ 1 )
b) R 1 + R 2 + 51 kW
V OUT + 0.4 @ 1 )
It is recommended to keep the total resistance of resistors
(R1 + R2) no greater than a few hundred kW. If total
resistance is too big the dynamic performance could get
worse due to PCB parasitic capacitance. Big resistors value
in combination with parasitic capacitance create low−pass
filter and virtually slow−down LDO control loop.
Ǔ
Error * 0%
Ǔ
Error * 0.06%
Ǔ
Error * 0.63%
OUTPUT VOLTAGE EXAMPLE
VOUT (V)
R1 (kW) (Note 7)
R2 (kW) (Note 7)
CFF (nF)
0.80
5.1
5.1
5.6
1.05
3.9
2.4
5.6
1.10
8.2
4.7
5.6
1.20
24
12
5.6
7. To increase power efficiency, current flows through resistor divider can be reduced by multiply all resistor values by 10.
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NCP59771
Feed Forward Capacitor CFF
Enable Operation
Feed forward capacitor is recommended to improve PSRR,
load transient and noise performance. Recommended value
for NCP59771 device is about 5.6 nF. The capacitor can also
improve LDO stability.
The enable pin will turn the regulator on or off. The
threshold limits are covered in the electrical characteristics
table in this data sheet. To get the full functionality of Soft
Start, it is recommended to turn on the VIN and VBIAS supply
voltages first and activate the Enable pin no sooner than VIN
and VBIAS are on their nominal levels. If the enable function
is not to be used then the pin should be connected to VIN or
VBIAS.
If the EN pin voltage is < 0.4 V the device is guaranteed
to be disabled. The pass transistor is turned off so that there
is virtually no current flow between the IN and OUT. The
active discharge transistor is active (devices with Output
Active Discharge feature only) so that the output voltage
VOUT is pulled down to GND through a 150 W resistor. In
the disable state the device consumes as low as typ. 0.5 mA
from the VIN and 0.5 mA from VBIAS. If the EN pin voltage
> 0.9 V the device is guaranteed to be enabled. The
NCP59771 regulates the output voltage and the active
discharge transistor is turned off. The EN pin has internal
pull−down current source with typ. value of 0.3 mA which
assures that the device is turned off when the EN pin is not
connected.
Dropout Voltage
Because of two power supply inputs VIN and VBIAS and
one VOUT regulator output, there are two Dropout voltages
specified.
The first, the VIN Dropout voltage is the voltage
difference (VIN – VOUT) when VOUT starts to decrease by
percent specified in the Electrical Characteristics table.
VBIAS is high enough; specific value is published in the
Electrical Characteristics table.
The second, VBIAS dropout voltage is the voltage
difference (VBIAS – VOUT) when VIN and VBIAS pins are
joined together and VOUT starts to decrease.
Input and Output Capacitors
The NCP59771 device is designed to be stable for ceramic
output capacitors with Effective capacitance in the range
from 4.7 mF to 47 mF. The device is also stable with multiple
capacitors in parallel, having the total effective capacitance
in the specified range.
In applications where no low input supplies impedance
available (PCB inductance in VIN and/or VBIAS inputs as
example), the recommended CIN = 1 mF and CBIAS = 0.1 mF
or greater. Ceramic capacitors are recommended. For the best
performance all the capacitors should be connected to the
NCP59771 respective pins directly in the device PCB
copper layer, not through vias having not negligible
impedance.
When using small ceramic capacitor, their capacitance is
not constant but varies with applied DC biasing voltage,
temperature and tolerance. The effective capacitance can be
much lower than their nominal capacitance value, most
importantly in negative temperatures and higher LDO
output voltages. That is why the recommended Output
capacitor capacitance value is specified as Effective value in
the specific application conditions.
Current Limitation
The internal Current Limitation circuitry allows the
device to supply the full nominal current and surges but
protects the device against Current Overload or Short.
Thermal Protection
Internal thermal shutdown (TSD) circuitry is provided to
protect the integrated circuit in the event that the maximum
junction temperature is exceeded. When TSD activated , the
regulator output turns off. When cooling down under the low
temperature threshold, device output is activated again. This
TSD feature is provided to prevent failures from accidental
overheating.
Activation of the thermal protection circuit indicates
excessive power dissipation or inadequate heatsinking. For
reliable operation, junction temperature should be limited to
+105°C maximum.
ORDERING INFORMATION
Device
NCP59771AFCRCADJT2G
Nominal Output
Voltage
Marking
Option
Package
Shipping†
Adjustable
2A
Output Active Discharge,
Back Side Coating
WLCSP6
Case 567YU
(Pb−Free)
5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
To order other package and voltage variants, please contact your ON Semiconductor sales representative.
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8
NCP59771
PACKAGE DIMENSIONS
WLCSP6 1.4x0.8x0.37
CASE 567YU
ISSUE O
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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◊
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