NCP700
200 mA, Ultra Low Noise,
High PSRR, BiCMOS RF LDO
Regulator
Noise sensitive RF applications such as Power Amplifiers in cell
phones and precision instrumentation require very clean power supplies.
The NCP700 is 200 mA LDO that provides the engineer with a very
stable, accurate voltage with ultra low noise and very high Power
Supply Rejection Ratio (PSRR) suitable for RF applications. In order
to optimize performance for battery operated portable applications,
the NCP700 employs an advanced BiCMOS process to combine the
benefits of low noise and superior dynamic performance of bipolar
elements with very low ground current consumption at full loads
offered by CMOS.
Furthermore, in order to provide a small footprint for
space−conscious applications, the NCP700 is stable with small, low
value capacitors and is available in a very small DFN6 2x2.2 package.
Features
• Output Voltage Options:
•
•
•
•
•
•
•
•
•
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MARKING
DIAGRAM
6
É
É
1
XXMG
G
6 PIN DFN, 2x2.2
MN SUFFIX
CASE 506BA
XX = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
− 1.8 V, 2.5 V, 2.75 V, 2.8 V, 3.0 V, 3.3 V
− Contact Factory for Other Voltage Options
Output Current Limit 200 mA
Ultra Low Noise (typ 15 mVrms)
Very High PSRR (typ 80 dB)
Stable with Ceramic Output Capacitors as low as 1 mF
Low Sleep Mode Current (max 1 mA)
Active Discharge Circuit
Current Limit Protection
Thermal Shutdown Protection
These are Pb−Free Devices
PIN ASSIGNMENT
CE
1
6
Cnoise
GND
2
5
GND
Vin
3
4
Vout
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
Typical Applications
•
•
•
•
•
Cellular Telephones (Power Amplifier)
Noise Sensitive Applications (Video, Audio)
Analog Power Supplies
PDAs / Palmtops / Organizers / GPS
Battery Supplied Devices
Vout
NCP700
CE
Cnoise
GND
Vin
Vout
Vin
Cin
Cnoise
Cout
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2008
September, 2008 − Rev. 4
1
Publication Order Number:
NCP700/D
NCP700
Vin
Vout
Current
Limit
−
+
Bandgap
Reference
Voltage
Cnoise
CE
Active
Discharge
GND
Figure 2. Simplified Block Diagram
PIN FUNCTION DESCRIPTION
DFN6 2x2.2
Pin No.
Pin Name
Description
1
CE
Chip Enable: This pin allows on/off control of the regulator. To disable the device, connect to
GND. If this function is not in use, connect to Vin. Internal 5 MW Pull Down resistor is connected
between CE and GND.
2, 5, EPAD
GND
3
Vin
Power Supply Input Voltage
4
Vout
Regulated Output Voltage
6
Cnoise
Power Supply Ground (Pins are fused for the DFN package)
Noise reduction pin. (Connect 100 nF or 10 nF capacitor to GND)
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Input Voltage (Note 1)
Vin
−0.3 V to 6 V
V
Chip Enable Voltage
VCE
−0.3 V to Vin +0.3 V
V
VCnoise
−0.3 V to Vin +0.3 V
V
Noise Reduction Voltage
Output Voltage
Maximum Junction Temperature (Note 1)
Storage Temperature Range
Vout
−0.3 V to Vin +0.3 V
V
TJ(max)
150
°C
TSTG
−55 to 150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL−STD−883, Method 3015
Machine Model Method 200 V
THERMAL CHARACTERISTICS
Rating
Symbol
Package Thermal Resistance, DFN6: (Note 1)
Junction−to−Lead (pin 2)
Junction−to−Ambient
RqJA
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area
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2
Value
37
120
Unit
°C/W
NCP700
ELECTRICAL CHARACTERISTICS
(Vin = Vout + 0.5 V, VCE = 1.2 V, Cin = 0.1 mF, Cout = 1 mF, Cnoise = 10 nF, TA = −40°C to 85°C, unless otherwise specified (Note 2))
Test Conditions
Characteristic
Symbol
Min
Typ
Max
Unit
Vin
2.5
−
5.5
V
REGULATOR OUTPUT
Input Voltage
Output Voltage (Note 3)
1.8 V
2.5 V
2.75 V
2.8 V
3.0 V
3.3 V
Vin = (Vout +0.5 V) to 5.5 V
Iout = 1 mA
Vout
1.764
2.450
2.695
2.744
2.940
3.234
(−2%)
−
−
−
−
−
−
1.836
2.550
2.805
2.856
3.060
3.366
(+2%)
V
Output Voltage (Note 3)
1.8 V
2.5 V
2.75 V
2.8 V
3.0 V
3.3 V
Vin = (Vout +0.5 V) to 5.5 V
Iout = 1 mA to 200 mA
Vout
1.746
2.425
2.6675
2.716
2.910
3.201
(−3%)
−
−
−
−
−
−
1.854
2.575
2.8325
2.884
3.090
3.399
(+3%)
V
−
−
−
80
80
65
−
−
−
Power Supply Ripple Rejection
Vin = Vout +1.0 V + 0.5 Vp−p
Iout = 1 mA to 150 mA
f = 120 Hz
Cnoise = 100nF
f = 1 kHz
f = 10 kHz
PSRR
dB
Line Regulation
Vin = (Vout +0.5 V) to 5.5 V, Iout = 1 mA
Regline
−0.2
−
0.2
Load Regulation
Iout = 1 mA to 200 mA
Regload
−
12
25
Output Noise Voltage
f = 10 Hz to 100 kHz
Iout = 1 mA to 150 mA Cnoise = 100 nF
Cnoise = 10 nF
Vn
Vout = Vout(nom) – 0.1 V
%/V
mV
mVrms
−
−
15
20
−
−
ILIM
200
310
470
mA
Vout = 0 V
ISC
210
320
490
mA
Iout = 200 mA
VDO
−
−
−
−
−
170
150
150
140
130
215
205
205
200
200
mV
Ground Current
Iout = 1 mA
Iout = 200 mA
IGND
−
−
70
110
90
220
mA
Disable Current
VCE = 0 V
Output Current Limit
Output Short Circuit Current
Dropout Voltage (Note 4)
2.5 V
2.75 V
2.8 V
3.0 V
3.3 V
GENERAL
IDIS
−
0.1
1
mA
Thermal Shutdown Threshold (Note 5)
TSD
−
150
−
°C
Thermal Shutdown Hysteresis (Note 5)
TSH
−
20
−
°C
Vth(CE)
−
1.2
−
−
0.4
−
V
RPD(CE)
2.5
5
10
MW
Cnoise = 10 nF
Cnoise = 100 nF
ton
−
−
0.4
4
−
−
ms
Iout = 1 mA
Iout = 10 mA
toff
−
−
800
200
−
−
ms
CHIP ENABLE
Input Threshold
Low
High
Internal Pull−Down Resistance (Note 6)
TIMING
Turn−on Time
Iout = 150 mA
Turn−off Time
Cnoise = 10 nF/100 nF
2. Performance guaranteed over the indicated operating temperature range by design and/or characterization, production tested at
TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
3. Contact factory for other voltage options.
4. Measured when output voltage falls 100 mV below the regulated voltage at Vin = Vout + 0.5 V if Vout < 2.5 V, then VDO = Vin − Vout at Vin = 2.5 V.
5. Guaranteed by design and characterization.
6. Expected to disable device when CE pin is floating.
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3
NCP700
TYPICAL CHARACTERISTICS
2.520
1.815
Vout, OUTPUT VOLTAGE (V)
Vout = 1.8 V
1.810
1.805
Iout = 1 mA
1.800
Iout = 150 mA
1.795
1.790
1.785
1.780
−40
−20
0
20
40
60
80
Vout, OUTPUT VOLTAGE (V)
1.820
100
2.505
Iout = 1 mA
2.500
Iout = 150 mA
2.495
2.490
2.485
2.480
−40
−20
0
20
40
60
80
Figure 3. Output Voltage vs. Temperature
(Vout = 1.8 V)
Figure 4. Output Voltage vs. Temperature
(Vout = 2.5 V)
100
2.820
Vout = 2.75 V
Vout, OUTPUT VOLTAGE (V)
Vout, OUTPUT VOLTAGE (V)
2.510
TA, AMBIENT TEMPERATURE (°C)
2.750
2.745
Iout = 1 mA
2.740
Iout = 150 mA
2.735
2.730
2.725
2.720
−40
−20
0
20
40
60
80
100
2.815
Vout = 2.8 V
2.810
2.805
Iout = 1 mA
2.800
Iout = 150 mA
2.795
2.790
2.785
2.780
−40
−20
0
20
40
60
80
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature
(Vout = 2.75 V)
Figure 6. Output Voltage vs. Temperature
(Vout = 2.8 V)
100
3.320
3.020
3.010
3.005
Iout = 1 mA
3.000
Iout = 150 mA
2.995
2.990
2.985
2.980
−40
−20
0
20
40
60
80
Vout, OUTPUT VOLTAGE (V)
Vout = 3.0 V
Vout, OUTPUT VOLTAGE (V)
3.015
Vout = 2.5 V
TA, AMBIENT TEMPERATURE (°C)
2.760
2.755
2.515
3.315
Vout = 3.3 V
3.310
3.305
Iout = 150 mA
3.295
3.290
3.285
3.280
−40
100
Iout = 1 mA
3.300
−20
0
20
40
60
80
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 7. Output Voltage vs. Temperature
(Vout = 3.0 V)
Figure 8. Output Voltage vs. Temperature
(Vout = 3.3 V)
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4
100
NCP700
TYPICAL CHARACTERISTICS
140
3.5
IGND, GROUND CURRENT (mA)
Vout, OUTPUT VOLTAGE (V)
4.0
3.3 V
3.0 V
2.8 V
2.5 V
3.0
2.5
2.0
1.8 V
1.5
1.0
TA = 25°C
Iout = 1 mA
0.5
0.0
0.0
1.0
2.0
3.0
4.0
5.0
90
80
Iout = 1 mA
70
60
50
−20
0
20
40
60
80
TA, AMBIENT TEMPERATURE (°C)
Figure 9. Output Voltage vs. Input Voltage
Figure 10. Ground Current vs. Temperature
100
135
180
Vout = 3.3 V
Vout = 2.8 V
160
Vout = 3.0 V
Vout = 2.5 V
140
VDO, DROPOUT VOLTAGE (mV)
IGND, GROUND CURRENT (mA)
100
Vin, INPUT VOLTAGE (V)
TA = 25°C
Iout = 150 mA
120
100
Vout = 1.8 V
80
Iout = 1 mA
60
40
20
0
0.0
1.0
2.0
3.0
4.0
5.0
130
Vout = 2.5 V
125
120
TA = 85°C
115
110
105
TA = 25°C
100
95
TA = −40°C
90
85
0
6.0
25
50
75
100
125
150
Vin, INPUT VOLTAGE (V)
Iout, OUTPUT CURRENT (mA)
Figure 11. Ground Current vs. Input Voltage
Figure 12. Dropout Voltage vs. Output Current
125
125
Vout = 2.8 V
120
TA = 85°C
VDO, DROPOUT VOLTAGE (mV)
VDO, DROPOUT VOLTAGE (mV)
Iout = 150 mA
110
40
−40
6.0
200
115
110
TA = 25°C
105
100
95
TA = −40°C
90
85
80
75
130
120
0
25
50
75
100
125
150
120
Vout = 3.0 V
TA = 85°C
115
110
105
TA = 25°C
100
95
TA = −40°C
90
85
80
75
0
25
50
75
100
125
150
Iout, OUTPUT CURRENT (mA)
Iout, OUTPUT CURRENT (mA)
Figure 13. Dropout Voltage vs. Output Current
Figure 14. Dropout Voltage vs. Output Current
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5
NCP700
TYPICAL CHARACTERISTICS
VDO, DROPOUT VOLTAGE (mV)
125
Vout = 3.3 V
120
TA = 85°C
115
110
105
TA = 25°C
100
95
TA = −40°C
90
85
80
75
0
25
50
75
100
125
150
Iout, OUTPUT CURRENT (mA)
ISC, SHORT CIRCUIT CURRENT LIMIT (mA)
Figure 15. Dropout Voltage vs. Output Current
ILIM, CURRENT LIMIT (mA)
340
330
320
310
300
290
280
−40
−20
0
20
40
60
80
100
320
310
300
290
−40
−20
0
20
40
60
80
Figure 16. Current Limit vs. Temperature
Figure 17. Short Circuit Current vs.
Temperature
100
700
−30
Vn, NOISE DENSITY (nV/√Hz)
TA = 25°C
Vout = 1.8 V
Iout = 150 mA
−20
PSRR (dB)
330
TA, AMBIENT TEMPERATURE (°C)
0
−40
−50
−60
Cnoise = 10 nF
−80
−90
−100
340
TA, AMBIENT TEMPERATURE (°C)
−10
−70
350
Cnoise = 100 nF
10
100
1,000
10,000
100,000
TA = 25°C
Vout = 1.8 V
Iout = 150 mA
Cnoise = 100 nF
600
500
400
300
200
100
0
10
100
1,000
10,000
100,000
f, FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 18. PSRR vs. Frequency
Figure 19. Noise Density vs. Frequency
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6
NCP700
TYPICAL CHARACTERISTICS
4.2 V
VCE
1 V/div
3.6 V
Vin
500 mV/div
TA = 25°C
Vout = 1.8 V
Iout = 150 mA
Cout = 1 mF
TA = 25°C
Vout
1 V/div
Vin = 4 V
Iout = 150 mA
Cnoise = 0 nF
Vout
10 mV/div
TIME (20 ms/div)
TIME (100 ms/div)
Figure 20. Enable Voltage and Output Voltage
vs. Time (Start−Up)
Figure 21. Line Transient
Iout
100 mA/div
Vout
50 mV/div
Vin = 2.8 V
Vout = 1.8 V
Cout = 1 mF
ESR of OUTPUT CAPACITOR (W)
10
TA = 25°C
Unstable Region
Vout = 3.0 V
1
Vout = 1.8 V
Stable Region
0.1
0.01
Cout = 1 mF to 10 mF
0
25
50
75
100
125
TIME (40 ms/div)
Iout, OUTPUT CURRENT (mA)
Figure 22. Load Transient
Figure 23. Output Capacitor ESR vs. Output
Current
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7
150
NCP700
APPLICATION INFORMATION
General
Output Noise
The NCP700 is a 200 mA (current limited) linear
regulator with a logic input for on/off control for the high
speed turn−off output voltage.
Access to the major contributor of noise within the
integrated circuit is provided as the focus for noise reduction
within the linear regulator system.
The main contributor for noise present on the output pin
Vout is the reference voltage node. This is because any noise
which is generated at this node will be subsequently
amplified through the error amplifier and the PMOS pass
device. Access to the reference voltage node is supplied
directly through the Cnoise pin. Noise can be reduced from
a typical value of 20 mVrms by using 10 nF to 15 mVrms by
using a 100 nF from the Cnoise pin to ground.
A bypass capacitor is recommended for good noise
performance and better load transient response.
Power Up/Down
During power up, the NCP700 maintains a high
impedance output (Vout) until sufficient voltage is present on
Vin to power the internal bandgap reference voltage. When
sufficient voltage is supplied (approx 1.2 V), Vout will start
to turn on (assume CE shorted to Vin), linearly increasing
until the output regulation voltage has been reached.
Active discharge circuitry has been implemented to insure
a fast turn off time. Then CE goes low, the active discharge
transistor turns on creating a fast discharge of the output
voltage. Power to drive this circuitry is drawn from the
output node. This is to maintain the lowest quiescent current
when in the sleep mode (VCE = 0.4 V). This circuitry
subsequently turns off when the output voltage discharges.
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
threshold, a Thermal Shutdown (TSD) event is detected and
the output (Vout) is turned off. There is no effect from the
active discharge circuitry. The IC will remain in this state
until the die temperature moves below the shutdown
threshold (150°C typical) minus the hysteresis factor (20°C
typical).
This feature provides protection from a catastrophic
device failure due to accidental overheating. It is not
intended to be used as a substitute for proper heat sinking.
The maximum device power dissipation can be calculated
by:
CE (chip enable)
The enable function is controller by the logic pin CE. The
voltage threshold of this pin is set between 0.4 V and 1.2 V.
A voltage lower than 0.4 V guarantees the device is off. A
voltage higher than 1.2 V guarantees the device is on. The
NCP700 enters a sleep mode when in the off state drawing
less than 1 mA of quiescent current.
The device can be used as a simple regulator without use
of the chip enable feature by tying the CE pin to the Vin pin.
PD +
TJ * TA
R qJA
Thermal resistance value versus copper area and package is
shown in Figure 24.
RqJA, THERMAL RESISTANCE
JUNCTION−TO−AMBIENT (°C/W)
380
Current Limit
Output Current is internally limited within the IC to a
minimum of 200 mA. The design is set to a higher value to
allow for variation in processing and the temperature
coefficient of the parameter. The NCP700 will source this
amount of current measured with a voltage 100 mV lower
than the typical operating output voltage.
The specification for short circuit current limit (@ Vout =
0 V) is specified at 320 mA (typ). There is no additional
circuitry to lower the current limit at low output voltages.
This number is provided for informational purposes only.
330
280
TSOP−5 (1 oz)
230
TSOP−5 (2 oz)
180
DFN6 2x2.2 (1 oz)
130
80
Output Capacitor
DFN6 2x2.2 (2 oz)
0
100
200
300
400
PCB COPPER AREA
The NCP700 has been designed to work with low ESR
ceramic capacitors. There is no ESR lower limit for stability
for the recommended 1 mF output capacitor. Stable region
for Output capacitor ESR vs Output Current is shown in
Figure 23.
Typical characteristics were measured with Murata
ceramic capacitors. GRM219R71E105K (1 mF, 25 V, X7R,
0805) and GRM21BR71A106K (10 mF, 10 V, X7R, 0805).
500
(mm2)
Figure 24. RqJA vs. PCB Copper Area
(TSOP−5 for comparison only)
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8
600
700
NCP700
ORDERING INFORMATION
Device
NCP700MN180R2G
Nominal Output
Voltage
Marking
1.8 V
LZ
NCP700MN250R2G
2.5 V
LT
NCP700MN275R2G
2.75 V
LU
NCP700MN280R2G
2.8 V
LX
NCP700MN300R2G
3.0 V
LY
NCP700MN330R2G
3.3 V
LV
Package
Shipping†
DFN6
2x2.2
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
The products described herein (NCP700), may be covered by one or more U.S. patents.
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9
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN6, 2x2.2, 0.65P
CASE 506BA−01
ISSUE A
6
DATE 07 JUL 2008
1
SCALE 4:1
A
B
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L
L
L1
ÉÉÉ
ÉÉÉ
PIN ONE
REFERENCE
2X
0.10 C
DETAIL A
E
ALTERNATE TERMINAL
CONSTRUCTIONS
TOP VIEW
ÉÉ
ÉÉ
ÉÉ
EXPOSED Cu
2X
0.10 C
A
0.10 C
DIM
A
A1
b
D
D2
E
E2
e
K
L
L1
A3
MOLD CMPD
A1
ÇÇ
ÉÉ
DETAIL B
DETAIL B
ALTERNATE
CONSTRUCTIONS
7X
0.08 C
SIDE VIEW
C
A1
L
SEATING
PLANE
e
6X
3
1
1
L1
6
4
6X
BOTTOM VIEW
XX MG
G
XX = Specific Device Code
M = Date Code
G
= Pb−Free Device
E2
K
GENERIC
MARKING DIAGRAM*
D2
DETAIL A
6X
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20
0.30
2.00 BSC
1.10
1.30
2.20 BSC
0.70
0.90
0.65 BSC
0.20
−−−
0.25
0.35
0.00
0.10
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
b
0.10 C A B
0.05 C
SOLDERING FOOTPRINT*
NOTE 3
1.36
PACKAGE
OUTLINE
6X
0.58
2.50
0.96
1
6X
0.35
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON23023D
6 PIN DFN, 2.0X2.2, 0.65P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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