NCP703MX30TCG

DATA SHEET www.onsemi.com 300 mA, Ultra-Low Quiescent Current, IQ 12 mA, Ultra-Low Noise, LDO Voltage Regulator 5 1 1 XDFN6 MX SUFFIX CASE 711AE TSOP−5 SN SUFFIX CASE 483 NCP703 Noise sensitive RF applications such as Power Amplifiers in satellite radios, infotainment equipment, and precision instrumentation require very clean power supplies. The NCP703 is 300 mA LDO that provides the engineer with a very stable, accurate voltage with ultra low noise and very high Power Supply Rejection Ratio (PSRR) suitable for RF applications. The device doesn’t require any additional noise bypass capacitor to achieve ultra−low noise performance. In order to optimize performance for battery operated portable applications, the NCP703 employs dynamic Iq management for ultra−low quiescent current consumption at light−load conditions and great dynamic performance. MARKING DIAGRAMS 5 1 XXXAYW G XM G 1 X, XXX = Specific Device Code M = Date Code A = Assembly Location Y = Year W = Work Week G = Pb−Free Package Features • Operating Input Voltage Range: 2.0 V to 5.5 V • Available in Fixed Voltage Options: 0.8 to 3.5 V • • • • • • • • • • • PIN CONNECTIONS Contact Factory for Other Voltage Options Ultra−Low Quiescent Current of Typ. 12 mA Ultra−Low Noise: 13 mVRMS from 100 Hz to 100 kHz Very Low Dropout: 180 mV Typical at 300 mA ±2% Accuracy Over Load/Line/Temperature High PSRR: 68 dB at 1 kHz Internal Soft−Start to Limit the Turn−On Inrush Current Thermal Shutdown and Current Limit Protections Stable with a 1 mF Ceramic Output Capacitor Available in TSOP−5 and XDFN 1.5 x 1.5 mm Package Active Output Discharge for Fast Turn−Off These are Pb−Free Devices EN CIN 1 OUT N/C GND ON IN N/C EN 6−Pin XDFN 1.5 x 1.5 mm (Top View) ORDERING INFORMATION IN 1 mF N/C 5−Pin TSOP−5 (Top View) See detailed ordering and shipping information in the package dimensions section on page 16 of this data sheet. PDAs, Mobile Phones, GPS, Smartphones Wireless Handsets, Wireless LAN, Bluetooth, Zigbee Portable Medical Equipment Other Battery Powered Applications VIN OUT GND Typical Applicaitons • • • • 1 IN EN NCP703 VOUT OUT GND COUT 1 mF Ceramic OFF Figure 1. Typical Application Schematic © Semiconductor Components Industries, LLC, 2016 September, 2022 − Rev. 4 1 Publication Order Number: NCP703/D NCP703 IN ENABLE LOGIC EN BANDGAP REFERENCE UVLO INTEGRATED SOFT−START THERMAL SHUTDOWN MOSFET DRIVER WITH CURRENT LIMIT OUT AUTO LOW POWER MODE ACTIVE DISCHARGE EN GND Figure 2. Simplified Schematic Block Diagram Table 1. PIN FUNCTION DESCRIPTION Pin No. XDFN6 Pin No. TSOP−5 Pin Name 1 5 OUT Regulated output voltage pin. A small 1 mF ceramic capacitor is needed from this pin to ground to assure stability. 2 4 N/C Not connected. 3 2 GND Power supply ground. Connected to the die through the lead frame. Soldered to the copper plane allows for effective heat dissipation. 4 3 EN Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown mode. N/C Not connected. This pin can be tied to ground to improve thermal dissipation. 5 6 1 IN Description Input pin. A small capacitor is needed from this pin to ground to assure stability. Table 2. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit VIN −0.3 V to 6 V V Output Voltage VOUT −0.3 V to VIN + 0.3 V V Enable Input VEN −0.3 V to VIN + 0.3 V V Output Short Circuit Duration tSC Indefinite s TJ(MAX) 150 °C Input Voltage (Note 1) Maximum Junction Temperature Storage Temperature TSTG −55 to 150 °C ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V ESD Capability, Machine Model (Note 2) ESDMM 200 V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114) ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115) Latchup Current Maximum Rating tested per JEDEC standard: JESD78. www.onsemi.com 2 NCP703 Table 3. THERMAL CHARACTERISTICS (Note 3) Symbol Value Thermal Characteristics, TSOP−5, Thermal Resistance, Junction−to−Air Thermal Characterization Parameter, Junction−to−Lead (Pin 2) qJA yJL 241 129 Thermal Characteristics, XDFN6 1.5 x 1.5 mm Thermal Resistance, Junction−to−Air Thermal Characterization Parameter, Junction−to−Board qJA yJB 146 77 Rating Unit °C/W °C/W 3. Single component mounted on 1 oz, FR4 PCB with 645 mm2 Cu area. Table 4. ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 125°C; VIN = VOUT(NOM) + 0.5 V or 2.0 V, whichever is greater; VEN = 0.9 V, IOUT = 10 mA, CIN = COUT = 1 mF unless otherwise noted. Typical values are at TJ = +25°C. (Note 4) Parameter Test Conditions Operating Input Voltage Symbol Min Typ Max Unit 5.5 V 1.9 V +2 % VIN 2.0 Undervoltage Lock−out VIN rising UVLO 1.2 Output Voltage Accuracy VOUT + 0.5 V ≤ VIN ≤ 5.5 V, IOUT = 0 − 300 mA VOUT −2 Line Regulation VOUT + 0.5 V ≤ VIN ≤ 4.5 V, IOUT = 10 mA RegLINE 450 mV/V VOUT + 0.5 V ≤ VIN ≤ 5.5 V, IOUT = 10 mA RegLINE 600 mV/V Load Regulation IOUT = 0 mA to 300 mA RegLOAD 20 mV/mA Load Transient IOUT = 1 mA to 300 mA or 300 mA to 1 mA in 1 ms, COUT = 1 mF TranLOAD −100/ +150 mV Dropout Voltage (Note 5) IOUT = 300 mA, VOUT(nom) = 2.5 V VDO 180 300 mV Output Current Limit VOUT = 90% VOUT(nom) ICL 450 750 mA Quiescent Current IOUT = 0 mA IQ 12 20 mA Ground Current IOUT = 300 mA IGND 200 mA Shutdown Current VEN ≤ 0.4 V, TJ = +25°C IDIS 0.12 mA VEN ≤ 0 V, VIN = 2.0 to 4.5 V, TJ = −40 to +85°C IDIS 0.55 310 1.6 2 mA EN Pin Threshold Voltage High Threshold Low Threshold VEN Voltage increasing VEN Voltage decreasing V EN Pin Input Current VEN = 5.5 V IEN 100 Turn−On Time COUT = 1.0 mF, from assertion EN pin to 98% VOUT(nom) tON 200 ms Power Supply Rejection Ratio VIN = 3 V, VOUT = 2.5 V IOUT = 300 mA PSRR 70 68 53 dB Output Noise Voltage VOUT = 2.5 V, VIN = 3 V, IOUT = 300 mA f = 100 Hz to 100 kHz VN 13 mVrms Thermal Shutdown Temperature Temperature increasing from TJ = +25°C TSD 160 °C Thermal Shutdown Hysteresis Temperature falling from TSD TSDH VEN_HI VEN_LO f = 100 Hz f = 1 kHz f = 10 kHz 0.9 0.4 − 20 500 − nA °C Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TJ = TA = 25_C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 5. Characterized when VOUT falls 100 mV below the regulated voltage at VIN = VOUT(NOM) + 0.5 V. www.onsemi.com 3 NCP703 OUTPUT VOLTAGE NOISE (mV/rtHz) TYPICAL CHARACTERISTICS 10 1 RMS Output Noise (mV) IOUT = 10 mA 0.1 0.01 0.001 VIN = 2.0 V VOUT = 0.8 V CIN = COUT = 1 mF MLCC, X7R, 1206 size 0.01 0.1 IOUT = 1 mA IOUT 10 Hz − 100 kHz 100 Hz − 100 kHz 1 mA 18.45 17.77 10 mA 17.18 16.43 300 mA 14.14 13.11 IOUT = 300 mA 1 10 100 1000 FREQUENCY (kHz) OUTPUT VOLTAGE NOISE (mV/rtHz) Figure 3. Output Voltage Noise Spectral Density for VOUT = 0.8 V, COUT = 1 mF 10 1 RMS Output Noise (mV) IOUT = 300 mA 0.1 0.01 0.001 VIN = 2.0 V VOUT = 0.8 V CIN = 1 mF COUT = 4.7 mF MLCC, X7R, 1206 size 0.01 IOUT = 10 mA IOUT 10 Hz − 100 kHz 100 Hz − 100 kHz 1 mA 14.07 13.14 10 mA 16.59 15.83 300 mA 15.46 14.53 IOUT = 1 mA 0.1 1 10 100 1000 FREQUENCY (kHz) OUTPUT VOLTAGE NOISE (mV/rtHz) Figure 4. Output Voltage Noise Spectral Density for VOUT = 0.8 V, COUT = 4.7 mF 10 1 RMS Output Noise (mV) IOUT = 10 mA 0.1 0.01 0.001 VIN = 3.8 V VOUT = 3.3 V CIN = COUT = 1 mF MLCC, X7R, 1206 size 0.01 0.1 IOUT 10 Hz − 100 kHz 100 Hz − 100 kHz 1 mA 20.29 17.06 10 mA 19.76 16.11 300 mA 18.74 15.46 IOUT = 1 mA IOUT = 300 mA 1 10 100 1000 FREQUENCY (kHz) Figure 5. Output Voltage Noise Spectral Density for VOUT = 3.3 V, COUT = 1 mF www.onsemi.com 4 NCP703 OUTPUT VOLTAGE NOISE (mV/rtHz) TYPICAL CHARACTERISTICS 10 1 RMS Output Noise (mV) IOUT = 300 mA 0.1 VIN = 3.8 V VOUT = 3.3 V CIN = 1 mF COUT = 4.7 mF MLCC, X7R, 1206 size 0.01 0.001 0.01 IOUT = 10 mA IOUT 10 Hz − 100 kHz 100 Hz − 100 kHz 13.52 1 mA 17.64 10 mA 19.54 15.96 300 mA 21.50 18.71 IOUT = 1 mA 0.1 1 10 100 1000 FREQUENCY (kHz) Figure 6. Output Voltage Noise Spectral Density for VOUT = 3.3 V, COUT = 4.7 mF 160 315 VOUT = 0.8 V 280 IGND, GROUND CURRENT (mA) IGND, GROUND CURRENT (mA) 350 VOUT = 3.3 V 245 VOUT = 2.5 V 210 175 140 VIN = VOUT + 0.5 V CIN = 1 mF COUT = 1 mF MLCC, X7R, 1206 size 105 70 35 0 0 50 100 150 200 250 VOUT = 2.5 V 100 VOUT = 0.8 V 80 VIN = VOUT + 0.5 V CIN = 1 mF COUT = 1 mF MLCC, X7R, 1206 size 60 40 20 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) Figure 7. Ground Current vs. Output Current Figure 8. Ground Current vs. Output Current from 0 mA to 2 mA 160 240 TJ = 25°C 210 TJ = 125°C IGND, GROUND CURRENT (mA) IGND, GROUND CURRENT (mA) VOUT = 3.3 V 120 0 300 270 TJ = −40°C 180 150 120 VIN = VOUT + 0.5 V CIN = 1 mF COUT = 1 mF MLCC, X7R, 1206 size 90 60 30 0 140 0 30 60 90 120 150 180 140 TJ = −40°C 100 TJ = 125°C 80 60 VIN = VOUT + 0.5 V CIN = 1 mF COUT = 1 mF MLCC, X7R, 1206 size 40 20 0 210 240 270 300 TJ = 25°C 120 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) Figure 9. Ground Current vs. Output Current at Temperatures Figure 10. Ground Current vs. Output Current 0 mA to 2 mA at Temperatures www.onsemi.com 5 NCP703 TYPICAL CHARACTERISTICS 40 13.5 VOUT = 0.8 V Iq, QUIESCENT CURRENT (mA) Iq, QUIESCENT CURRENT (mA) 14.0 13.0 12.5 VOUT = 3.3 V 12.0 VOUT = 2.5 V 11.5 11.0 VIN = VOUT + 0.5 V CIN = 1 mF COUT = 1 mF MLCC, X7R 1206 size 10.5 10.0 9.5 9.0 −40 −20 0 20 40 60 80 100 120 2 3 4 5 6 Figure 11. Quiescent Current vs. Temperature Figure 12. Quiescent Current vs. Input Voltage 0.805 CIN = 1 mF COUT = 1 mF MLCC, X7R 1206 size 3.0 2.5 VOUT = 3.3 V VOUT, OUTPUT VOLTAGE (V) VOUT, OUTPUT VOLTAGE (V) 10 VIN, INPUT VOLTAGE (V) VOUT = 2.5 V 2.0 1.5 VOUT = 0.8 V 1.0 0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0.804 0.803 0.802 VIN = 2 V VOUT = 0.8 V CIN = 1 mF COUT = 1 mF 0.801 0.800 0.799 0.798 0.797 0.796 0.795 −40 −20 0 20 40 60 80 100 120 140 VIN, INPUT VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C) Figure 13. Output Voltage vs. Input Voltage Figure 14. Output Voltage vs. Temperature – 0.8 V 3.3050 VIN = VOUT + 0.5 V VOUT = 2.5 V CIN = 1 mF COUT = 1 mF 2.5025 2.5015 2.5005 2.4995 2.4985 2.4975 2.4965 −40 −20 0 20 40 60 80 100 120 VOUT, OUTPUT VOLTAGE (V) 2.5035 VOUT, OUTPUT VOLTAGE (V) 20 TJ, JUNCTION TEMPERATURE (°C) 3.5 0 30 0 140 CIN = 1 mF COUT = 1 mF VOUT = 3.3 V MLCC, X7R 1206 size 140 3.3025 3.3000 3.2975 3.2950 3.2925 VIN = VOUT + 0.5 V VOUT = 3.3 V CIN = 1 mF COUT = 1 mF 3.2900 3.2875 3.2850 −40 −20 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 15. Output Voltage vs. Temperature – 2.5 V Figure 16. Output Voltage vs. Temperature – 3.3 V www.onsemi.com 6 NCP703 TYPICAL CHARACTERISTICS 1000 900 900 800 800 700 700 REGLINE (mV/V) REGLINE (mV/V) 1000 600 500 400 300 200 VOUT = 1.8 V VIN = 2.3 to 5.5 V CIN = 1 mF COUT = 1 mF IOUT = 10 mA 100 0 −40 −20 0 20 40 60 80 100 120 140 60 80 100 120 140 20 18 16 REGLOAD (mV) REGLINE (mV/V) VOUT = 3.3 V VIN = 3.8 to 5.5 V CIN = 1 mF COUT = 1 mF IOUT = 10 mA 0 20 14 12 VOUT = 1.8 V VIN = 2.3 V CIN = 1 mF COUT = 1 mF IOUT = 0 mA to 300 mA 10 8 6 4 40 60 80 100 120 2 0 −40 −20 140 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 19. Line Regulation vs. Temperature – 3.3 V Figure 20. Load Regulation vs. Temperature – 1.8 V 20 18 VOUT = 2.8 V VIN = 3.3 V CIN = 1 mF COUT = 1 mF IOUT = 0 mA to 300 mA 16 REGLOAD (mV) REGLOAD (mV) 40 Figure 18. Line Regulation vs. Temperature – 2.8 V 20 12 20 Figure 17. Line Regulation vs. Temperature − 1.8 V 0 −40 −20 14 0 TJ, JUNCTION TEMPERATURE (°C) 600 16 300 VOUT = 2.8 V VIN = 3.3 to 5.5 V CIN = 1 mF COUT = 1 mF IOUT = 10 mA TJ, JUNCTION TEMPERATURE (°C) 800 18 400 100 0 −40 −20 1000 200 500 200 1200 400 600 10 8 6 14 12 VOUT = 3.3 V VIN = 3.8 V CIN = 1 mF COUT = 1 mF IOUT = 0 mA to 300 mA 10 8 6 4 4 2 0 −40 −20 2 0 −40 −20 0 20 40 60 80 100 120 140 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 21. Load Regulation vs. Temperature – 2.8 V Figure 22. Load Regulation vs. Temperature – 3.3 V www.onsemi.com 7 NCP703 TYPICAL CHARACTERISTICS VOUT = 2.5 V CIN = 1 mF COUT = 1 mF 200 250 TJ = 25°C VDROP, DROPOUT VOLTAGE (mV) VDROP, DROPOUT VOLTAGE (mV) 250 TJ = 125°C 150 100 TJ = −40°C 50 0 0 50 100 150 200 250 300 IOUT = 300 mA 175 IOUT = 200 mA 150 125 100 IOUT = 100 mA 75 50 25 0 −40 −20 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) Figure 23. Dropout vs. Output Current – 2.5 V Figure 24. Dropout vs. Temperature – 2.5 V 750 VOUT = 3.3 V VIN = 3.8 V CIN = 1 mF COUT = 1 mF IOUT = 10 mA 725 700 675 VEN, ENABLE VOLTAGE (mV) VEN, ENABLE VOLTAGE (mV) 200 VOUT = 2.5 V CIN = 1 mF COUT = 1 mF IOUT, OUTPUT CURRENT (mA) 750 650 625 600 575 550 −40 −20 0 20 40 60 80 100 120 VOUT = 3.3 V VIN = 3.8 V CIN = 1 mF COUT = 1 mF IOUT = 10 mA 725 700 675 650 625 600 575 550 −40 −20 140 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 25. Enable Threshold − High Figure 26. Enable Threshold − Low ISHORT, SHORT CIRCUIT CURRENT (mA) 600 ICL, CURRENT LIMIT (mA) 225 550 500 450 VIN = 2.3 V VOUT = 1.8 V CIN = 1 mF COUT = 1 mF MLCC, X7R, size 1206 400 350 300 −40 −20 0 20 40 60 80 100 120 140 600 550 500 450 VIN = 2.3 V VOUT = 1.8 V CIN = 1 mF COUT = 1 mF MLCC, X7R, size 1206 400 350 300 −40 −20 0 20 40 60 80 100 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 27. Output Current Limit Figure 28. Short Circuit Limit www.onsemi.com 8 120 140 NCP703 TYPICAL CHARACTERISTICS 70 RR, RIPPLE REJECTION (dB) 80 60 50 VIN = 2.3 V VOUT = 1.8 V CIN = none COUT = 1 mF MLCC, X7R, 1206 size 40 30 20 10 0 0.01 0.1 1 10 100 1000 10,000 50 VIN = 3.8 V VOUT = 3.3 V CIN = none COUT = 1 mF MLCC, X7R, 1206 size 0.01 0.1 1 10 100 1000 10,000 30 20 10 0 0.01 0.1 1 10 100 1000 10,000 Cout = 1mF Cout = 4.7m Cout = 10m 90 80 70 60 50 40 VIN = 3.8 V VOUT = 3.3 V CIN = none MLCC, X7R, 1206 size 30 20 10 0 0.01 0.1 1 10 100 1000 10,000 F, FREQUENCY (kHz) F, FREQUENCY (kHz) Figure 31. Power Supply Rejection Ratio, VOUT = 3.3 V Figure 32. Power Supply Rejection Ratio, VOUT = 3.3 V, IOUT = 10 mA 10 100 Cout = 1mF Cout = 4.7m Cout = 10m 90 80 Unstable Region 70 60 ESR (W) RR, RIPPLE REJECTION (dB) VIN = 3.0 V VOUT = 2.5 V CIN = none COUT = 1 mF MLCC, X7R, 1206 size 40 100 Iout = 1 mA Iout = 10 mA Iout = 100 mA Iout = 200 mA Iout = 300 mA 60 10 0 50 Figure 30. Power Supply Rejection Ratio, VOUT = 2.5 V 70 20 60 Figure 29. Power Supply Rejection Ratio, VOUT = 1.8 V 80 30 80 70 F, FREQUENCY (kHz) 90 40 Iout = 1 mA Iout = 10 mA Iout = 100 mA Iout = 200 mA Iout = 300 mA 90 F, FREQUENCY (kHz) 100 RR, RIPPLE REJECTION (dB) 100 Iout = 1 mA Iout = 10 mA Iout = 100 mA Iout = 200 mA Iout = 300 mA 90 RR, RIPPLE REJECTION (dB) RR, RIPPLE REJECTION (dB) 100 50 40 30 20 10 0 VIN = 3.8 V VOUT = 3.3 V CIN = none MLCC, X7R, 1206 size 0.01 0.1 VOUT = 3.3 V 1 VOUT = 0.8 V Stable Region 1 10 100 1000 10,000 0.1 VIN = 5.5 V CIN = COUT = 1 mF MLCC, X7R, 1206 size 0 50 100 150 200 250 300 F, FREQUENCY (kHz) IOUT, OUTPUT CURRENT (mA) Figure 33. Power Supply Rejection Ratio, VOUT = 3.3 V, IOUT = 300 mA Figure 34. Output Capacitor ESR vs. Output Current www.onsemi.com 9 NCP703 VEN IINRUSH 1 V / div 1 V / div IINRUSH 600 mV / div VEN VOUT VOUT 100 ms / div 100 ms / div 600 mV / div VEN IOUT 1 V / div VOUT VOUT 1 ms / div 500 mV / div Figure 38. Enable Turn−off Response VIN = 3.8 V to 4.8 V VOUT = 3.3 V IOUT = 10 mA CIN = 1 mF COUT = 1 mF 20 mV / div 20 mV / div 500 mV / div Figure 37. Enable Turn−on Response – COUT = 10 mF trise = 1 ms COUT = 4.7 mF COUT = 1 mF 100 ms / div VIN VIN = 3.8 V VOUT = 3.3 V VEN = 0.9 V IOUT = 10 mA CIN = 1 mF VOUT VIN tFALL = 1 ms VIN = 3.8 V to 4.8 V VOUT = 3.3 V IOUT = 10 mA CIN = 1 mF COUT = 1 mF VOUT 2 ms / div 2 ms / div Figure 40. Line Transient Response – Falling Edge, VOUT = 3.3 V Figure 39. Line Transient Response – Rising Edge, VOUT = 3.3 V www.onsemi.com 10 100 mA / div VIN = 3.8 V VOUT = 3.3 V VEN = 0.9 V IOUT = 10 mA CIN = 1 mF COUT = 1 mF IINRUSH 1 V / div Figure 36. Enable Turn−on Response – COUT = 4.7 mF 100 mA / div 600 mV / div Figure 35. Enable Turn−on Response − COUT = 1 mF VEN VIN = 3.8 V VOUT = 3.3 V VEN = 0.9 V IOUT = 10 mA CIN = 1 mF COUT = 4.7 mF 100 mA / div VIN = 3.8 V VOUT = 3.3 V VEN = 0.9 V IOUT = 10 mA CIN = 1 mF COUT = 1 mF 100 mA / div 600 mV / div TYPICAL CHARACTERISTICS NCP703 VOUT 100 mA / div IOUT 40 mV / div VIN = 2 V VOUT = 0.8 V CIN = 1 mF (MLCC) COUT = 4.7 mF COUT = 1 mF IOUT VIN = 2 V VOUT = 0.8 V CIN = 1 mF (MLCC) COUT = 1 mF COUT = 4.7 mF VOUT 50 ms / div Figure 41. Load Transient Response − Rising Edge, VOUT = 0.8 V, IOUT = 1 mA to 300 mA, COUT = 1 mF, 4.7 mF Figure 42. Load Transient Response – Falling Edge, VOUT = 0.8 V, IOUT = 1 mA to 300 mA, COUT = 1 mF, 4.7 mF VIN = 2 V VOUT = 0.8 V CIN = 1 mF (MLCC) Cout = 1 mF (MLCC) IOUT VOUT 100 mA / div 20 ms / div 40 mV / div 40 mV / div 100 mA / div 40 mV / div 100 mA / div TYPICAL CHARACTERISTICS trise = 10 ms trise = 1 ms VIN = 3.8 V VOUT = 3.3 V CIN = 1 mF (MLCC) IOUT VOUT COUT = 4.7 mF 20 ms / div 10 ms / div Figure 43. Load Transient Response − Rising Edge, VOUT = 0.8 V, IOUT = 1 mA to 300 mA, tRISE = 1 ms, 10 ms Figure 44. Load Transient Response – Rising Edge, VOUT = 3.3 V, IOUT = 1 mA to 300 mA, COUT = 1 mF, 4.7 mF 100 mA / div VIN = 3.8 V VOUT = 3.3 V CIN = 1 mF (MLCC) IOUT VIN = 3.8 V VOUT = 3.3 V CIN = 1 mF (MLCC) Cout = 1 mF (MLCC) IOUT VOUT COUT = 1 mF 40 mV / div 40 mV / div 100 mA / div COUT = 1 mF COUT = 4.7 mF VOUT trise = 1 ms trise = 10 ms 50 ms / div 10 ms / div Figure 45. Load Transient Response – Falling Edge, VOUT = 3.3 V, IOUT = 1 mA to 300 mA, COUT = 1 mF, 4.7 mF Figure 46. Load Transient Response – Rising Edge, VOUT = 3.3 V, IOUT = 1 mA to 300 mA, tRISE = 1 ms, 10 ms www.onsemi.com 11 NCP703 TYPICAL CHARACTERISTICS 300 mV / div VOUT = 3.3 V IOUT = 1 mA CIN = 1 mF (MLCC) Cout = 1 mF (MLCC) VOUT Thermal Shutdown VIN = 3.8 V VOUT = 3.3 V CIN = 1 mF (MLCC) Cout = 1 mF (MLCC) 300 mA / div 600 mV / div Short Circuit VIN VOUT IOUT 5 ms / div 10 ms / div Figure 47. Turn−on/off − Slow Rising VIN Figure 48. Short Circuit and Thermal Shutdown www.onsemi.com 12 NCP703 APPLICATIONS INFORMATION General The NCP703 is a high performance 300 mA Low Dropout Linear Regulator. This device delivers excellent noise and dynamic performance. Thanks to its adaptive ground current feature the device consumes only 12 mA of quiescent current at no−load condition. The regulator features ultra−low noise of 13 mVRMS, PSRR of 68 dB at 1 kHz and very good load/line transient performance. Such excellent dynamic parameters and small package size make the device an ideal choice for powering the precision analog and noise sensitive circuitry in portable applications. The LDO achieves this ultra low noise level output without the need for a noise bypass capacitor. A logic EN input provides ON/OFF control of the output voltage. When the EN is low the device consumes as low as typ. 120 nA from the IN pin. The device is fully protected in case of output overload, output short circuit condition and overheating, assuring a very robust design. Figure 49. Capacitance Change vs. DC Bias There is no requirement for the minimum value of Equivalent Series Resistance (ESR) for the COUT but the maximum value of ESR should be less than 900 mΩ. Larger output capacitors and lower ESR could improve the load transient response or high frequency PSRR as shown in typical characteristics. It is not recommended to use tantalum capacitors on the output due to their large ESR. The equivalent series resistance of tantalum capacitors is also strongly dependent on the temperature, increasing at low temperature. The tantalum capacitors are generally more costly than ceramic capacitors. Input Capacitor Selection (CIN) It is recommended to connect a minimum of 1 mF Ceramic X5R or X7R capacitor close to the IN pin of the device. This capacitor will provide a low impedance path for unwanted AC signals or noise modulated onto constant input voltage. There is no requirement for the min. /max. ESR of the input capacitor but it is recommended to use ceramic capacitors for their low ESR and ESL. A good input capacitor will limit the influence of input trace inductance and source resistance during sudden load current changes. Larger input capacitor may be necessary if fast and large load transients are encountered in the application. No−load Operation The regulator remains stable and regulates the output voltage properly within the ±2% tolerance limits even with no external load applied to the output. Output Decoupling (COUT) Enable Operation The NCP703 requires an output capacitor connected as close as possible to the output pin of the regulator. The recommended capacitor value is 1 mF and X7R or X5R dielectric due to its low capacitance variations over the specified temperature range. The NCP703 is designed to remain stable with minimum effective capacitance of 0.1 mF to account for changes with temperature, DC bias and package size. Especially for small package size capacitors such as 0402 the effective capacitance drops rapidly with the applied DC bias. Refer to the Figure 49, for the capacitance vs. package size and DC bias voltage dependence. The EN pin is used to enable/disable the LDO and to deactivate/activate the active discharge function. If the EN pin voltage is 0.9 V the device is guaranteed to be enabled. The NCP703 regulates the output voltage and the active discharge transistor is turned−off. www.onsemi.com 13 NCP703 APPLICATIONS INFORMATION Thermal Shutdown The EN pin has internal pull−down current source with typ. value of 110 nA which assures that the device is turned−off when the EN pin is not connected. Build in 2 mV hysteresis into the EN prevents from periodic on/off oscillations that can occur due to noise. In the case where the EN function isn’t required the EN should be tied directly to IN. When the die temperature exceeds the Thermal Shutdown threshold (TSD − 160°C typical), Thermal Shutdown event is detected and the device is disabled. The IC will remain in this state until the die temperature decreases below the Thermal Shutdown Reset threshold (TSDU − 140°C typical). Once the IC temperature falls below the 140°C the LDO is enabled again. The thermal shutdown feature provides the protection from a catastrophic device failure due to accidental overheating. This protection is not intended to be used as a substitute for proper heat sinking. For reliable operation junction temperature should be limited to +125°C maximum. Undervoltage Lockout The internal UVLO circuitry assures that the device becomes disabled when the VIN falls below typ. 1.5 V. When the VIN voltage ramps−up the NCP703 becomes enabled, if VIN rises above typ. 1.6 V. The 100 mV hysteresis prevents from on/off oscillations that can occur due to noise on VIN line. Power Dissipation As power dissipated in the NCP703 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. The maximum power dissipation the NCP703 can handle is given by: Output Current Limit Output Current is internally limited within the IC to a typical 490 mA. The NCP703 will source this amount of current if the output voltage drops down to 90% of the nominal VOUT. When the Output Voltage is directly shorted to ground (VOUT = 0 V), the short circuit protection will limit the output current to 520 mA (typ). The current limit and short circuit protection will work properly up to VIN = 5.5 V at TA = 25°C. There is no limitation for the short circuit duration. P D(MAX) + Internal Soft−Start circuit q JA P D [ V INǒI GND@I OUTǓ ) I OUTǒV IN * V OUTǓ (eq. 2) 450 0.50 400 0.45 350 0.40 PD(MAX), TA = 25°C, 1 OZ Cu qJA, 1 OZ Cu 250 150 0.30 qJA, 2 OZ Cu 200 0 100 200 300 400 500 PCB Copper Area (mm2) 0.25 600 0.20 700 Figure 50. qJA and PD(MAX) vs. Copper Area (TSOP−5) www.onsemi.com 14 0.35 PD(MAX), Maximum Power Dissipation (W) PD(MAX), TA = 25°C, 2 OZ Cu 300 (eq. 1) The power dissipated by the NCP703 for given application conditions can be calculated from the following equations: NCP703 contains an internal soft−start circuitry to protect against large inrush currents which could otherwise flow during the start−up of the regulator. Soft−start feature protects against power bus disturbances and assures a controlled and monotonic rise of the output voltage. qJA, Junction to Ambient Thermal Resistance (°C/W) ƪ) 125oC * T Aƫ NCP703 APPLICATIONS INFORMATION 0.90 PD(MAX), TA = 25°C, 2 OZ Cu 350 0.80 300 0.70 250 PD(MAX), TA = 25°C, 1 OZ Cu 200 0.50 qJA, 1 OZ Cu 150 100 0.60 qJA, 2 OZ Cu 0 100 200 300 400 500 PCB Copper Area (mm2) 600 700 0.40 PD(MAX), Maximum Power Dissipation (W) qJA, Junction to Ambient Thermal Resistance (°C/W) 400 0.30 800 Figure 51. qJA vs. Copper Area (XDFN6) Reverse Current Output Noise The PMOS pass transistor has an inherent body diode which will be forward biased in the case that VOUT > VIN. Due to this fact in cases, where the extended reverse current condition can be anticipated the device may require additional external protection. The IC is designed for ultra−low noise output voltage without external noise filter capacitor (Cnr). Figures 3 − 6 shows NCP703 noise performance. Generally the noise performance in the indicated frequency range improves with increasing output current. Although even at IOUT = 1 mA the noise levels are below 20 mVRMS. Load Regulation The NCP703 features very good load regulation of typically 6 mV in 0 mA to 300 mA range. In order to achieve this very good load regulation a special attention to PCB design is necessary. The trace resistance from the OUT pin to the point of load can easily approach 100 mΩ which will cause 30 mV voltage drop at full load current, deteriorating the excellent load regulation. Turn−On Time The turn−on time is defined as the time period from EN assertion to the point in which VOUT will reach 98% of its nominal value. This time is dependent on various application conditions such as VOUT(NOM), COUT, TA. PCB Layout Recommendations To obtain good transient performance and good regulation characteristics place CIN and COUT capacitors close to the device pins and make the PCB traces wide. In order to minimize the solution size, use 0402 capacitors. Larger copper area connected to the pins will also improve the device thermal resistance. The actual power dissipation can be calculated from Equation 2. Line Regulation The IC features very good line regulation of 0.6 mV/V measured from VIN = VOUT + 0.5 V to 5.5 V. For battery operated applications it may be important that the line regulation from VIN = VOUT + 0.5 V up to 4.5 V is only 0.45 mV/V. Power Supply Rejection Ratio The NCP703 features very good Power Supply Rejection ratio. If desired the PSRR at higher frequencies in the range 100 kHz – 10 MHz can be tuned by the selection of COUT capacitor and proper PCB layout. www.onsemi.com 15 NCP703 ORDERING INFORMATION Device Voltage Option Marking NCP703MX18TCG (Note 6) 1.8 V J NCP703MX28TCG (Note 6) 2.8 V K NCP703MX30TCG 3.0 V L NCP703MX33TCG 3.3 V P NCP703SN18T1G 1.8 V AEC NCP703SN19T1G 1.9 V AEG NCP703SN28T1G 2.8 V AED NCP703SN30T1G 3.0 V AEE NCP703SN33T1G 3.3 V AEF NCP703SN35T1G 3.5 V AEH Package Shipping † XDFN6 3000 or 5000 / Tape & Reel (Note 6) TSOP5 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 6. Product processed after October 1, 2022 are shipped with quantity 5000 units / tape & reel. www.onsemi.com 16 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSOP−5 CASE 483 ISSUE N 5 1 SCALE 2:1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSION A. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. D 5X NOTE 5 2X DATE 12 AUG 2020 0.20 C A B 0.10 T M 2X 0.20 T 5 B 1 4 2 B S 3 K DETAIL Z G A A TOP VIEW DIM A B C D G H J K M S DETAIL Z J C 0.05 H C SIDE VIEW SEATING PLANE END VIEW GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT* 0.95 0.037 MILLIMETERS MIN MAX 2.85 3.15 1.35 1.65 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 0_ 10 _ 2.50 3.00 1.9 0.074 5 5 XXXAYWG G 1 1 Analog 2.4 0.094 XXX = Specific Device Code A = Assembly Location Y = Year W = Work Week G = Pb−Free Package 1.0 0.039 XXX MG G Discrete/Logic XXX = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) 0.7 0.028 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98ARB18753C TSOP−5 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2018 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS XDFN6 1.5x1.5, 0.5P CASE 711AE ISSUE B DATE 27 AUG 2015 SCALE 4:1 D L A B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.10 AND 0.20mm FROM TERMINAL TIP. L1 DETAIL A ÍÍÍÍ ÍÍÍÍ ÍÍÍÍ ALTERNATE TERMINAL CONSTRUCTIONS E PIN ONE REFERENCE ÉÉ ÉÉ EXPOSED Cu 0.10 C 2X 2X 0.10 C DIM A A1 A3 b D E e L L1 L2 TOP VIEW MOLD CMPD DETAIL B ALTERNATE CONSTRUCTIONS A DETAIL B A3 0.05 C GENERIC MARKING DIAGRAM* A1 0.05 C C SIDE VIEW DETAIL A e SEATING PLANE 1 XXXMG G XXX = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) 5X L 3 1 MILLIMETERS MIN MAX 0.35 0.45 0.00 0.05 0.13 REF 0.20 0.30 1.50 BSC 1.50 BSC 0.50 BSC 0.40 0.60 --0.15 0.50 0.70 L2 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. 6 4 6X RECOMMENDED MOUNTING FOOTPRINT* b 0.10 C A BOTTOM VIEW 0.05 C B NOTE 3 6X 0.35 5X 0.73 1.80 0.83 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON56376E XDFN6, 1.5 X 1.5, 0.5 P Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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