NCP706A
1 A, 1% Precision Very Low
Dropout Voltage Regulator
with Enable and Active
Discharge
The NCP706A is a Very Low Dropout Regulator which provides up
to 1 A of load current and maintains excellent output voltage accuracy
of 1% including line, load and temperature variations. The operating
input voltage range from 2.4 V up to 5.5 V makes this device suitable
for Li−ion battery powered products as well as post−regulation
applications. The product is available in 3.0 V fixed output voltage
option. NCP706A is fully protected against overheating and output
short circuit.
Very small 8−pin XDFN8 1.6 x 1.2, 04P package makes the device
especially suitable for space constrained portable applications such as
tablets and smartphones. Parts feature active output discharge
function.
Features
Other Output Voltage Options Available on Request.
Low Quiescent Current of Typ. 200 mA
Very Low Dropout: 155 mV Max. at IOUT = 1 A
±1% Accuracy Over Load/Line/Temperature
High PSRR: 60 dB at 1 kHz
Internal Soft−Start to Limit the Inrush Current
Thermal Shutdown and Current Limit Protections
Stable with a 1.0 mF Ceramic Output Capacitor
Available in XDFN8 1.6 x 1.2, 04P 8−pin Package
Active Output Discharge
These are Pb−Free Devices
(Note: Microdot may be in either location)
OUT 1
8 IN
OUT 2
7 IN
N/C 3
6 EN
5 GND
IN 8
1 OUT
IN 7
2 OUT
EN 6
3 N/C
GND 5
VIN = 2.4 (3.3) − 5.5 V
4 SNS
(Bottom View)
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 8 of this data sheet.
VOUT = 3.0 V @ 1 A
IN
OUT
NCP706A
SNS
EN
ON
AE = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Top View)
Tablets, Smartphones,
Wireless Handsets, Portable Media Players
Portable Medical Equipment
Other Battery Powered Applications
CIN
AEMG
G
XDFN8
CASE 711AS
SNS 4
Typical Applications
•
•
•
•
MARKING
DIAGRAM
PIN CONNECTION
• Operating Input Voltage Range: 2.4 V to 5.5 V
• Fixed Output Voltage Option: 3.0 V
•
•
•
•
•
•
•
•
•
•
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GND
OFF
COUT
1.0 mF
Ceramic
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2016
May, 2016 − Rev. 1
1
Publication Order Number:
NCP706A/D
NCP706A
Figure 2. Simplified Internal Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
XDFN8
Pin Name
1
OUT
2
OUT
Description
Regulated output voltage. A minimum 1.0 mF ceramic capacitor is needed from this pin to ground to
assure stability.
3
N/C
Not connected. This pin can be tied to ground to improve thermal dissipation.
4
SNS
Remote sense connection. This pin should be connected to the output voltage rail.
5
GND
Power supply ground.
6
EN
Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator
into shutdown mode.
7
IN
Input pin. A small capacitor is needed from this pin to ground to assure stability.
8
IN
−
Exposed
Pad
This pad enhances thermal performance and is electrically connected to GND. It is recommended
that the exposed pad is connected to the ground plane on the board or otherwise left open.
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2
NCP706A
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN
−0.3 V to 6 V
V
Output Voltage
VOUT
−0.3 V to VIN + 0.3 V
V
Enable Input
VEN
−0.3 V to VIN + 0.3 V
V
Output Short Circuit Duration
tSC
Indefinite
s
TJ(MAX)
150
°C
Input Voltage (Note 1)
Maximum Junction Temperature
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latch−up Current Maximum Rating tested per JEDEC standard: JESD78
THERMAL CHARACTERISTICS
Rating
Thermal Characteristics, XDFN8 1.6x1.2, 04P
Thermal Resistance, Junction−to−Air
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3
Symbol
Value
Unit
RqJA
160
°C/W
NCP706A
ELECTRICAL CHARACTERISTICS − VOLTAGE VERSION 3.0 V
−40°C ≤ TJ ≤ 125°C; VIN = VOUT(NOM) + 0.3 V or 3.3 V, whichever is greater; IOUT = 10 mA, CIN = COUT = 1.0 mF, VEN = 0.9 V, unless
otherwise noted. Typical values are at TJ = +25°C. (Note 3)
Test Conditions
Parameter
Operating Input Voltage
Symbol
Min
VIN
2.4
UVLO
1.2
2.97
Typ
Max
Unit
5.5
V
1.6
1.9
V
3.0
3.03
Undervoltage lock−out
VIN rising, IOUT = 0
Output Voltage Accuracy
VOUT + 0.3 V ≤ VIN ≤ 4.5 V, IOUT = 0 – 1 A
VOUT
Line Regulation
VOUT + 0.3 V ≤ VIN ≤ 4.5 V, IOUT = 10 mA
RegLINE
2
mV
Load Regulation
IOUT = 0 mA to 1 A, VIN = 3.3 V
RegLOAD
2
mV
Load Transient
IOUT = 10 mA to 1 A in 10 ms, VIN = 3.5 V
COUT = 10 mF
TranLOAD
±120
mV
Dropout voltage (Note 4)
IOUT = 1 A, VOUT(nom) = 3.0 V
VDO
155
Output Current Limit
VOUT = 90% VOUT(nom)
ICL
Quiescent current
IOUT = 0 mA
IQ
170
Ground current
IOUT = 1 A
IGND
200
Shutdown current
VEN ≤ 0 V, VIN = 2.0 to 5.5 V
EN Pin High Threshold
EN Pin Low Threshold
VEN Voltage increasing
VEN Voltage decreasing
EN Pin Input Current
VEN = 5.5 V
IEN
100
Turn−on Time
COUT = 4.7 mF, from assertion EN pin to 98%
Vout(nom)
tON
150
ms
Power Supply Rejection Ratio
VIN = 3.5 V + 200 mVpp
modulation, VOUT = 3.0 V
IOUT = 0.5 A, COUT = 4.7 mF
PSRR
65
58
52
dB
Output Noise Voltage
VOUT = 3.0 V, VIN = 4.0 V, IOUT = 0.5 A
f = 100 Hz to 100 kHz
VNOISE
300
mVrms
Thermal Shutdown Temperature
Temperature increasing from TJ = +25°C
TSD
160
°C
Thermal Shutdown Hysteresis
Temperature falling from TSD
TSDH
20
°C
Active Output Discharge
VEN ≤ 0.4 V, VIN = 4.5 V
RDIS
60
W
1.1
f = 100 Hz
f = 1 kHz
f = 10 kHz
mV
A
0.1
VEN_HI
VEN_LO
230
V
230
mA
mA
1
0.9
mA
V
0.4
500
nA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at TJ = TA =
25_C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
4. Characterized when VOUT falls 90 mV below the regulated voltage at VIN = 3.3 V, IOUT = 10 mA.
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4
NCP706A
3.004
3.5
3.002
3.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
TYPICAL CHARACTERISTICS
3.000
2.998
2.996
VIN = 3.3 V
IOUT = 10 mA
COUT = 1 mF
VOUT(NOM) = 3.0 V
2.994
2.992
−40 −20
0
20
40
60
2.5
VIN = VEN
TA = 25°C
COUT = 1 mF
VOUT(NOM) = 3.0 V
2.0
1.5
1.0
IOUT = 10 mA
IOUT = 50 mA
IOUT = 250 mA
IOUT = 500 mA
0.5
80
100
0.0
120
0.0
1.0
2.0
TEMPERATURE (°C)
Figure 3. Output Voltage vs. Temperature
220
200
GROUND CURRENT (mA)
QUIESCENT CURRENT (mA)
5.0
260
IOUT = 0
COUT = 1 mF
VOUT(NOM) = 3.0 V
TA = 125°C
180
TA = 25°C
160
TA = −40°C
140
3.0
3.5
4.0
4.5
INPUT VOLTAGE (V)
5.0
VIN = 3.3 V
VIN = 4.0 V
VIN = 5.0 V
240
200
180
COUT = 1 mF
TA = 25°C
VOUT(NOM) = 3.0 V
160
140
5.5
VIN = 3.5 V
VIN = 4.5 V
VIN = 5.5 V
220
0.0
Figure 5. Quiescent Current vs. Input Voltage
0.1
0.2
0.3 0.4 0.5 0.6 0.7
OUTPUT CURRENT (A)
0.8
0.9 1.0
Figure 6. Ground Current vs. Output Current
1.8
200
VOUT = 0
VEN = VIN
COUT = 1 mF
TA = 25°C
VOUT(NOM) = 3.0 V
1.7
1.6
VEN = VIN
COUT = 1 mF
VOUT(NOM) = 3.0 V
180
DROPOUT VOLTAGE (mV)
SHORT CURRENT LIMIT (A)
4.0
Figure 4. Output Voltage vs. Input Voltage
240
120
3.0
INPUT VOLTAGE (V)
1.5
1.4
1.3
160
125°C
140
25°C
120
−40°C
100
80
60
40
20
1.2
3.0
3.5
4.0
4.5
5.0
0
5.5
0
INPUT VOLTAGE (V)
0.2
0.4
0.6
0.8
OUTPUT CURRENT (A)
Figure 7. Short Current Limitation vs. Input
Voltage
Figure 8. Dropout Voltage vs. Output Current
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5
1
NCP706A
TYPICAL CHARACTERISTICS
80
VIN = 5.5 V
VEN = 0
CIN = COUT = 4.7 mF
TA = 25°C
2.0
VIN = 3.5 V + 200 mVPP Modulation
IOUT = 500 mA
TA = 25°C
VOUT(NOM) = 3.0 V
60
PSRR (dB)
REVERSE LEAKAGE CURRENT IN
SHUTDOWN (mA)
2.5
1.5
1.0
40
20
0.5
COUT = 1 mF
COUT = 2.2 mF
COUT = 4.7 mF
VOUT(NOM) = 3.0 V
0
0.0
0.0
1.0
2.0
3.0
4.0
5.0
0.1
1
FORCED OUTPUT VOLTAGE (V)
OUTPUT NOISE DENSITY (mV/√Hz)
PSRR (dB)
3.5
VIN = 3.5 V + 200 mVPP Modulation
COUT = 1 mF
TA = 25°C
VOUT(NOM) = 3.0 V
60
40
20
IOUT = 10 mA
IOUT = 100 mA
IOUT = 500 mA
0
0.1
1
10
FREQUENCY (kHz)
100
1000
Figure 10. PSRR vs. Frequency & Output
Capacitor
Figure 9. Reverse Leakage Current in
Shutdown
80
10
FREQUENCY (kHz)
IOUT = 500 mA
VIN = 4.0 V
TA = 25°C
VOUT(NOM) = 3.0 V
3.0
2.5
2.0
1.5
1.0
COUT = 1 mF
COUT = 2.2 mF
0.5
0.0
100
0.01
1000
0.1
1
10
100
1000
FREQUENCY (kHz)
Figure 11. PSRR vs. Frequency & Output
Current
Figure 12. Output Noise Density vs. Frequency
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NCP706A
TYPICAL CHARACTERISTICS
Figure 13. Turn−on by Coupled Input and
Enable Pins
Figure 14. Turn−on by Enable Signal
Figure 15. Line Transient Response
Figure 16. Load Transient Response
Figure 17. Turn−off by Enable Signal
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7
NCP706A
APPLICATIONS INFORMATION
Input Decoupling (Cin)
Thermal
A 1.0 mF capacitor either ceramic or tantalum is
recommended and should be connected as close as possible
to the pins of NCP706A device. Higher values and lower
ESR will improve the overall line transient response.
As power across the NCP706A increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and also the ambient
temperature affect the rate of temperature rise for the part.
This is stating that when the NCP706A has good thermal
conductivity through the PCB, the junction temperature will
be relatively low with high power dissipation.
The power dissipation across the device can be roughly
represented by the equation:
Output Decoupling (Cout)
The
minimum
decoupling
value
for
NCP706AMX300TAG device is 1 mF. The regulator accepts
ceramic chip capacitors MLCC. If a tantalum capacitor is
used, and its ESR is large, the loop oscillation may result.
Larger values improve noise rejection and PSRR.
P D + ǒV IN * V OUTǓ * I OUT [W]
Enable Operation
The enable pin EN will turn on or off the regulator. These
limits of threshold are covered in the electrical specification
section of this data sheet. If the enable is not used then the
pin should be connected to VIN.
(eq. 1)
The maximum power dissipation depends on the thermal
resistance of the case and circuit board, the temperature
differential between the junction and ambient, PCB
orientation and the rate of air flow.
The maximum allowable power dissipation can be
calculated using the following equation:
Hints
Please be sure the Vin and GND lines are sufficiently wide.
If their impedance is high, noise pickup or unstable
operation may result.
Set external components, especially the output capacitor,
as close as possible to the circuit.
The sense pin SNS trace is recommended to be kept as far
from noisy power traces as possible and as close to load as
possible.
P MAX + ǒT J * T AǓńq JA [W]
(eq. 2)
Where (TJ − TA) is the temperature differential between
the junction and the surrounding environment and qJA is the
thermal resistance from the junction to the ambient.
Connecting the exposed pad and non connected pin 3 to
a large ground pad or plane helps to conduct away heat and
improves thermal relief.
ORDERING INFORMATION
Device
NCP706AMX300TAG
Nominal Ooutput
Voltage
Marking
Package
Shipping†
3.0 V
AE
XDFN8
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
XDFN8 1.6x1.2, 0.4P
CASE 711AS
ISSUE D
SCALE 4:1
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L
A
B
8X
L1
DETAIL A
ÍÍÍ
ÍÍÍ
ÍÍÍ
OPTIONAL
CONSTRUCTION
E
PIN ONE
IDENTIFIER
DIM
A
A1
b
D
D2
E
E2
e
L
L1
ÉÉ
ÉÉ
ÇÇ
ÇÇ
EXPOSED Cu
TOP VIEW
0.10 C
DATE 08 DEC 2015
MOLD CMPD
DETAIL B
OPTIONAL
CONSTRUCTION
A
DETAIL B
GENERIC
MARKING DIAGRAM*
A1
8X
MILLIMETERS
MIN
NOM
MAX
0.300 0.375 0.450
0.000 0.025 0.050
0.130 0.180 0.230
1.500 1.600 1.700
1.200 1.300 1.400
1.100 1.200 1.300
0.200 0.300 0.400
0.40 BSC
0.150 0.200 0.250
0.000 0.050 0.100
0.08 C
NOTE 3
DETAIL A
8X
8X
C
SIDE VIEW
L
XXMG
G
SEATING
PLANE
XX = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
D2
1
4
E2
L1
8
5
e
e/2
8X
b
0.10 C A
BOTTOM VIEW
RECOMMENDED
MOUNTING FOOTPRINT*
B
0.05 C
1.44
PACKAGE
OUTLINE
8X
0.35
1.40
0.44
8X
0.26
1
0.40
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON87768E
XDFN8, 1.6X1.2, 0.4P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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