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NCP730ASNADJT1G

NCP730ASNADJT1G

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    SOT23-5

  • 描述:

    IC REG LIN POS ADJ 150MA 5TSOP

  • 数据手册
  • 价格&库存
NCP730ASNADJT1G 数据手册
LDO Regulator, 150 mA, 38V, 1 mA IQ, with PG NCP730 The NCP730 device is based on unique combination of features − very low quiescent current, fast transient response and high input and output voltage ranges. The NCP730 is CMOS LDO regulator designed for up to 38 V input voltage and 150 mA output current. Quiescent current of only 1 mA makes this device ideal solution for battery− powered, always−on systems. Several fixed output voltage versions are available as well as the adjustable version. The device (version B) implements power good circuit (PG) which indicates that output voltage is in regulation. This signal could be used for power sequencing or as a microcontroller reset. Internal short circuit and over temperature protections saves the device against overload conditions. www.onsemi.com MARKING DIAGRAMS 5 1 Features • • • • • • • • • • • • Operating Input Voltage Range: 2.7 V to 38 V Output Voltage: 1.2 V to 24 V Capable of Sourcing 200 mA Peak Output Current Very Low Quiescent Current: 1 mA typ. Low Dropout: 290 mV typ. at 150 mA, 3.3 V Version Output Voltage Accuracy ±1% Power Good Output (Version B) Stable with Small 1 mF Ceramic Capacitors Built−in Soft Start Circuit to Suppress Inrush Current Over−Current and Thermal Shutdown Protections Available in Small TSOP−5 and WDFN6 (2x2) Packages These Devices are Pb−Free and are RoHS Compliant XXXAYWG G 1 XXX = Specific Device Code A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) WDFN6 (2x2) MT SUFFIX CASE 511BR 1 1 XX M XX = Specific Device Code M = Date Code PIN ASSIGNMENTS TSOP−5 Typical Applications • • • • • • 5 TSOP−5 SN SUFFIX CASE 483 Battery Power Tools and Equipment Home Automation RF Devices Metering Remote Control Devices White Goods IN 1 GND 2 EN 3 5 OUT 4 NC/ADJ/PG CASE 483 WDFN6 (2x2) 6 IN OUT 1 NC/ADJ 2 GND 3 EP 5 NC/PG 4 EN CASE511BR (Top Views) ORDERING INFORMATION See detailed ordering and shipping information on page 29 of this data sheet. © Semiconductor Components Industries, LLC, 2018 March, 2021 − Rev. 1 1 Publication Order Number: NCP730/D NCP730 TYPICAL APPLICATION SCHEMATICS VIN=6−38V IN C IN 1mF ON COUT 1mF NCP730A 5.0V TSOP−5 / WDFN−6 EN OFF GND VIN=6−38V VOUT=5.0V OUT C IN 1mF IN C IN 1mF OFF 1.2V Figure 2. Adjustable Output Voltage Application (No PG) COUT 1mF R PG 100k IN C IN 1mF ON VOUT=5V OUT NCP730B ADJ Only WDFN−6 1.2V ADJ EN PG PG C OUT 1mF C FF 1nF R2 750k VIN=6−38V VOUT=5.0V NC GND ADJ GND R1 2M4 OFF NCP730B 5.0V TSOP−5 / WDFN−6 EN ON EN OUT ON VOUT=5V OUT NCP730A ADJ TSOP−5 / WDFN−6 NC Figure 1. Fixed Output Voltage Application (No PG) VIN=6−38V IN GND PG OFF R1 2M4 C FF 1nF R2 750k COUT 1mF R PG 100k PG Figure 3. Fixed Output Voltage Application with PG Figure 4. Adjustable Output Voltage Application with PG ǒ V OUT + V ADJ @ 1 ) IN Ǔ R1 ) I ADJ @ R 1 R2 OUT Current limit UVLO Comparator UVLO I EN−PU = 300nA 1.95 V V CCEN V−REFERENCE AND SOFT−START V REF 1.2V EA RADJ1 V FB =1.2V EN ADJ Enable RADJ2 EN Comparator GND THERMAL SHUTDOWN 0.9 V PG PG Comparator DEGLITCH DELAY TMR 93% of V REF Note: Blue objects are valid for ADJ version Green objects are valid for FIX version Brown objects are valid for B version (with PG) Figure 5. Internal Block Diagram www.onsemi.com 2 NC NCP730 PIN DESCRIPTION − TSOP−5 package Pin No. Pin Name 1 IN 2 GND 3 EN 4 ADJ/PG/NC 5 OUT Description Power supply input pin. Ground pin. Enable input pin (high − enabled, low − disabled). If this pin is connected to IN pin or if it is left unconnected (pull−up resistor is not required) the device is enabled. ADJ (ADJ device version only): • Adjust input pin. Could be connected to the output resistor divider or to the output pin directly. PG (FIX device versions with PG functionality): • Power good output pin. High level for power ok, low level for fail. If not used, could be left unconnected or shorted to GND. NC (FIX device versions without PG functionality): • Not internally connected. This pin can be tied to the ground plane to improve thermal dissipation. Output pin. PIN DESCRIPTION − WDFN−6 package Pin No. Pin Name 1 OUT 2 NC/ADJ 3 GND 4 EN 5 NC/PG 6 IN EP EPAD Description Output pin. ADJ (ADJ device version only): • Adjust input pin. Could be connected to the output resistor divider or to the output pin directly. NC (all FIX device versions): • Not internally connected. This pin can be tied to the ground plane to improve thermal dissipation. Ground pin. Enable input pin (high − enabled, low − disabled). If this pin is connected to IN pin or if it is left unconnected (pull−up resistor is not required) the device is enabled. PG (ADJ/FIX device versions with PG functionality): • Power good output pin. High level for power ok, low level for fail. If not used, could be left unconnected or shorted to GND. NC (ADJ/FIX device versions without PG functionality): • Not internally connected. This pin can be tied to the ground plane to improve thermal dissipation. Power supply input pin. Exposed pad pin. Should be connected to the GND plane. www.onsemi.com 3 NCP730 MAXIMUM RATINGS Rating Symbol Value Unit VIN −0.3 to 40 V VOUT Voltage VOUT −0.3 to [(VIN + 0.3) or 40 V; whichever is lower] V EN Voltage VEN −0.3 to (VIN + 0.3) V VIN Voltage (Note 1) ADJ Voltage VFB/ADJ −0.3 to 5.5 V PG Voltage VPG −0.3 to (VIN + 0.3) V Output Current IOUT Internally limited mA PG Current IPG 3 mA TJ(MAX) 150 °C TSTG −55 to 150 °C ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V ESD Capability, Charged Device Model (Note 2) ESDCDM 1000 V Maximum Junction Temperature Storage Temperature Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per ANSI/ESDA/JEDEC JS−001, EIA/JESD22−A114 ESD Charged Device Model tested per ANSI/ESDA/JEDEC JS−002, EIA/JESD22−C101 THERMAL CHARACTERISTICS (Note 3) Symbol WDFN6 2x2 TSOP−5 Unit Thermal Resistance, Junction−to−Air Characteristic RthJA 61 142 °C/W Thermal Resistance, Junction−to−Case (top) RthJCt 200 80 °C/W Thermal Resistance, Junction−to−Case (bottom) RthJCb 14 N/A °C/W Thermal Resistance, Junction−to−Board (top) RthJBt 46 110 °C/W Thermal Characterization Parameter, Junction−to−Case (top) PsiJCt 3 21 °C/W Thermal Characterization Parameter, Junction−to−Board [FEM] PsiJB 46 113 °C/W 3. Measured according to JEDEC board specification (board 1S2P, Cu of the board can be found in JESD51−7. layer thickness 1 oz, Cu area 650 mm2, no airflow). Detailed description ELECTRICAL CHARACTERISTICS (VIN = VOUT−NOM + 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF (effective capacitance – Note 4), TJ = −40°C to 125°C, ADJ tied to OUT, unless otherwise specified) (Note 5) Test Conditions Parameter Recommended Input Voltage Output Voltage Accuracy TJ = −40°C to +85°C Symbol Min Typ Max VIN 2.7 − 38 V VOUT −1 − 1 % −1 − 2 TJ = −40°C to +125°C Unit ADJ Reference Voltage ADJ version only VADJ − 1.2 − V ADJ Input Current VADJ = 1.2 V IADJ −0.1 0.01 0.1 mA Line Regulation VIN = VOUT−NOM + 1 V to 38 V and VIN ≥ 2.7 V DVO(DVI) − − 0.2 %VOUT Load Regulation IOUT = 0.1 mA to 150 mA DVO(DIO) − − 0.4 %VOUT Quiescent Current (version A) VIN = VOUT−NOM + 1 V to 38 V, IOUT = 0 mA IQ − 1.3 2.5 mA Quiescent Current (version B) VIN = VOUT−NOM + 1 V to 38 V, IOUT = 0 mA − 1.8 3.0 Ground Current IOUT = 150 mA IGND − 325 450 Shutdown Current (Note 9) VEN = 0 V, IOUT = 0 mA, VIN = 38 V ISHDN − 0.35 1.5 mA Output Current Limit VOUT = VOUT−NOM − 100 mV IOLIM 200 280 450 mA Short Circuit Current VOUT = 0 V IOSC 200 280 450 mA Dropout Voltage (Note 6) IOUT = 150 mA VDO − 290 480 mV PSRR − 80 − dB − 70 − Power Supply Ripple Rejection VIN = VOUT−NOM + 2 V IOUT = 10 mA 10 Hz 10 kHz www.onsemi.com 4 mA NCP730 ELECTRICAL CHARACTERISTICS (VIN = VOUT−NOM + 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF (effective capacitance – Note 4), TJ = −40°C to 125°C, ADJ tied to OUT, unless otherwise specified) (Note 5) (continued) Parameter Power Supply Ripple Rejection Output Voltage Noise Test Conditions VIN = VOUT−NOM + 2 V IOUT = 10 mA f = 10 Hz to 100 kHz Symbol Min Typ Max Unit PSRR − 42 − dB − 48 − − 195 − FIX−5.0 V − 240 − FIX−15.0 V − 460 − ADJ set to 5.0 V CFF = 100 pF − 132 − ADJ set to 5.0 V CFF = 10 nF − 82 − 100 kHz 1 MHz FIX−3.3 V VN EN Threshold VEN rising VEN−TH 0.7 0.9 1.05 mVRMS V EN Hysteresis VEN falling VEN−HY 0.01 0.1 0.2 V EN Internal Pull−up Current VEN = 1 V, VIN = 5.5 V IEN−PU 0.01 0.3 1 mA EN Input Leakage Current VEN = 30 V, VIN = 30 V IEN−LK −1 0.05 1 mA Start−up time (Note 7) VOUT−NOM ≤ 3.3 V tSTART 100 250 500 ms 300 600 1000 VOUT−NOM > 3.3 V Internal UVLO Threshold Ramp VIN up until output is turned on VIUL−TH 1.6 1.95 2.6 V Internal UVLO Hysteresis Ramp VIN down until output is turned off VIUL−HY 0.05 0.2 0.3 V PG Threshold (Note 8) VOUT falling VPG−TH 90 93 96 % PG Hysteresis (Note 8) VOUT rising VPG−HY 0.1 2 4 % PG Deglitch Time (Note 8) tPG−DG 75 160 270 ms PG Delay Time (Note 8) tPG−DLY 120 320 600 ms PG Output Low Level Voltage (Note 8) IPG = 1 mA VPG−OL − 0.2 0.4 V PG Output Leakage Current (Note 8) VPG = 30 V IPG−LK − 0.01 1 mA Thermal Shutdown Temperature Temperature rising from TJ = +25°C TSD − 165 − °C Thermal Shutdown Hysteresis Temperature falling from TSD TSDH − 20 − °C Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Effective capacitance, including the effect of DC bias, tolerance and temperature. See the Application Information section for more information. 5. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible. 6. Dropout measured when the output voltage falls 100 mV below the nominal output voltage. Limits are valid for all voltage versions. 7. Startup time is the time from EN assertion to point when output voltage is equal to 95% of VOUT−NOM. 8. Applicable only to version B (device option with power good output). PG threshold and PG hysteresis are expressed in percentage of nominal output voltage. 9. Shutdown current includes EN Internal Pull−up Current. www.onsemi.com 5 NCP730 TYPICAL CHARACTERISTICS VIN = VOUT−NOM + 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, IOUT = 1 mA, COUT = 1.0 mF, ADJ tied to OUT, TJ = 25°C, unless otherwise specified 2.0% VIN = (VOUT-NOM + 1 V) to 38 V, VIN ≥ 2.7 V I OUT = 1 to 150 mA OUTPUT VOLTAGE, V OUT (V) 1.5% High limit 1.0% VOUT-NOM = 15 V 0.5% VOUT-NOM = 5 V 0.0% VOUT-NOM = 1.2 V -0.5% Low limit -1.0% -1.5% -2.0% -40 -20 0 20 40 60 80 120 100 JUNCTION TEMPERATURE, T J ( °C) Figure 6. Output Voltage vs. Temperature Figure 7. Ground Current vs. Load (NCP730−5.0V, Version−B) Figure 8. Quiescent Current vs. Temperature (Version−A) Figure 9. Quiescent Current vs. Temperature (Version−B) 1.6 1.10 SHUTDOWN CURRENT, I SHDN ( μA) 1.4 ENABLE THRESHOLD VOLTAGE, VEN -TH (V) High limit Note: Shutdown current is measured at IN pin and includes EN pin pull-up current. 1.2 1.0 0.8 0.6 0.4 VIN = 38 V VEN = 0 V 0.2 0.0 -40 -20 0 20 40 60 80 100 1.05 High limit 1.00 0.95 0.90 0.85 0.80 0.75 Low limit 0.70 0.65 0.60 -40 120 JUNCTION TEMPERATURE, T J ( °C) -20 0 20 40 60 80 100 JUNCTION TEMPERATURE, TJ (°C) Figure 10. Shutdown Current vs. Temperature Figure 11. Enable Threshold Voltage vs. Temperature www.onsemi.com 6 120 NCP730 TYPICAL CHARACTERISTICS VIN = VOUT−NOM + 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, IOUT = 1 mA, COUT = 1.0 mF, ADJ tied to OUT, TJ = 25°C, unless otherwise specified 0.10 1.4 ADJ INPUT CURRENT, I ADJ (μA) 1.2 High limit 1.0 0.8 0.6 0.4 0.2 High limit 0.08 0.06 0.04 0.02 VEN = 1 V 0.0 -40 -20 0 20 40 60 80 0.00 -40 120 100 -20 0 20 TEMPERATURE (°C) High limit 450 350 VOUT = VOUT-NOM - 100 mV IOUT = 150 mA All output voltage versions 300 250 200 150 100 50 0 -40 60 80 100 120 Figure 13. ADJ Input Current vs. Temperature 500 400 40 TEMPERATURE (°C) Figure 12. Enable Internal Pull−Up Current vs. Temperature DROPOUT VOLTAGE, V DROP (mV) ENABLE PULL-UP CURRENT, I EN-PU ( μA) 1.6 -20 0 20 40 60 80 100 JUNCTION TEMPERATURE, TJ ( °C) Figure 14. Dropout Voltage vs. Temperature www.onsemi.com 7 120 NCP730 TYPICAL CHARACTERISTICS VIN = VOUT−NOM + 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, IOUT = 1 mA, COUT = 1.0 mF, ADJ tied to OUT, TJ = 25°C, unless otherwise specified 4.3 V VIN VIN 8.3 V 150 mA 150 mA 1 mA IOUT 1 mA VOUT 3.3 V IOUT +55 mV +58 mV 3.3 V -115 mV -120 mV C1: VIN C2: VOUT (ac) C4: IOUT VOUT 1.0 V/div 50 mV/div 100 mA/div 20.0 ms/div C1: VIN C2: VOUT (ac) C4: IOUT Figure 15. Load Transient − NCP730−3.3 V, COUT = 1 mF 20.0 ms/div Figure 16. Load Transient − NCP730−3.3 V, COUT = 1 mF VIN 38.0 V 2.0 V/div 50 mV/div 100 mA/div VIN 4.3 V 150 mA 150 mA 1 mA IOUT 1 mA VOUT 3.3 V IOUT +58 mV +37 mV 3.3 V VOUT -60 mV -120mV C1: VIN C2: VOUT (ac) C4: IOUT 10.0 V/div 50 mV/div 100 mA/div 20.0 ms/div C1: VIN C2: VOUT (ac) C4: IOUT Figure 17. Load Transient − NCP730−3.3 V, COUT = 1 mF 1.0 V/div 50 mV/div 100 mA/div 50.0 ms/div Figure 18. Load Transient − NCP730−3.3 V, COUT = 10 mF VIN 4.3 V 150 mA VIN 6.0 V 150 mA IOUT 1 mA 1 mA +55 mV +30 mV 3.3 V IOUT VOUT VOUT 5.0 V -50 mV -115 mV C1: VIN C2: VOUT (ac) C4: IOUT 1.0 V/div 50 mV/div 100 mA/div 50.0 ms/div C1: VIN C2: VOUT (ac) C4: IOUT Figure 19. Load Transient − NCP730−3.3 V, COUT = 22 mF 5.0 V/div 50 mV/div 100 mA/div 20.0 ms/div Figure 20. Load Transient − NCP730−5.0 V, COUT = 1 mF www.onsemi.com 8 NCP730 TYPICAL CHARACTERISTICS VIN = VOUT−NOM + 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, IOUT = 1 mA, COUT = 1.0 mF, ADJ tied to OUT, TJ = 25°C, unless otherwise specified VIN 38.0 V VIN 6.0 V 150 mA 150 mA 1 mA IOUT 1 mA VOUT 5.0 V IOUT +48 mV 5.0 V +36 mV VOUT -60mV -112 mV C1: VIN C2: VOUT (ac) C4: IOUT 20.0 ms/div 10.0 V/div 50 mV/div 100 mA/div C1: VIN C2: VOUT (ac) C4: IOUT Figure 21. Load Transient − NCP730−5.0 V, COUT = 1 mF 50.0 ms/div Figure 22. Load Transient − NCP730−5.0 V, COUT = 10 mF VIN 15.5 V VIN 6.0 V 5.0 V/div 50 mV/div 100 mA/div 150 mA 150 mA 1 mA IOUT 1 mA VOUT 15.0 V IOUT +34 mV 5.0 V -53 mV +55 mV VOUT -120 mV C1: VIN C2: VOUT (ac) C4: IOUT 5.0 V/div 50 mV/div 100 mA/div 50.0 ms/div C1: VIN C2: VOUT (ac) C4: IOUT 10.0 V/div 100 mV/div 100 mA/div 20.0 ms/div Figure 24. Load Transient − NCP730−15.0 V, COUT = 1 mF Figure 23. Load Transient − NCP730−5.0 V, COUT = 22 mF VIN 38.0 V VIN 15.5 V 150 mA 150 mA 1 mA IOUT 1 mA +40 mV +50 mV 15.0 V IOUT VOUT 15.0 V VOUT -110 mV -105 mV C1: VIN C2: VOUT (ac) C4: IOUT 10.0 V/div 100 mV/div 100 mA/div 20.0 ms/div C1: VIN C2: VOUT (ac) C4: IOUT 10.0 V/div 50 mV/div 100 mA/div 50.0 ms/div Figure 26. Load Transient − NCP730−15.0 V, COUT = 10 mF Figure 25. Load Transient − NCP730−15.0 V, COUT = 1 mF www.onsemi.com 9 NCP730 TYPICAL CHARACTERISTICS VIN = VOUT−NOM + 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, IOUT = 1 mA, COUT = 1.0 mF, ADJ tied to OUT, TJ = 25°C, unless otherwise specified VIN 15.5 V VIN 15.5 V 150 mA 150 mA 1 mA IOUT 1 mA VOUT 15.0 V IOUT +45 mV +16 mV 15.0 V -98 mV C1: VIN C2: VOUT (ac) C4: IOUT VOUT -44 mV 50.0 ms/div 10.0 V/div 50 mV/div 100 mA/div C1: VIN C2: VOUT (ac) C4: IOUT Figure 27. Load Transient − NCP730−15.0 V, COUT = 22 mF 100.0 ms/div 10.0 V/div 20 mV/div 100 mA/div Figure 28. Load Transient − NCP730−15.0 V, COUT = 50 mF I OUT = 1 mA C OUT = 1 μF 5.3 V VIN 4.3 V +3.5 mV -2.5 mV C1: VIN C2: VOUT (ac) I OUT = 100mA C OUT = 1 μF +2 mV VIN +9.5 mV +7mV VOUT 3.3 V 3.3V -3 mV -6 mV 5 0.0 μs/div 2.0 V/div 5 mV/div C1: VIN C2: VOUT (ac) Figure 29. Line Transient − NCP730−3.3 V 8.3 V 5.3 V 4.3 V 9.3 V -8mV 10.0 μs/div 2.0 V/div 10 mV/div Figure 30. Line Transient − NCP730−3.3 V VIN 9.3 V 8.3 V VIN I OUT = 100mA C OUT = 1 μF I OUT = 1 mA C OUT = 1 μF +1 mV -1 mV C1: VIN C2: VOUT (ac) +1 mV 50.0 μs/div C1: VIN C2: VOUT (ac) Figure 31. Line Transient − NCP730−3.3 V 3.3 V 2.0 V/div 10 mV/div 10.0 μs/div Figure 32. Line Transient − NCP730−3.3 V www.onsemi.com 10 VOUT -2 mV -2 mV -1 mV 2.0 V/div 5 mV/div +2 mV +2 mV V OUT 3.3 V VOUT NCP730 TYPICAL CHARACTERISTICS VIN = VOUT−NOM + 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, IOUT = 1 mA, COUT = 1.0 mF, ADJ tied to OUT, TJ = 25°C, unless otherwise specified I OUT = 1 mA C OUT = 47 μF 5.3 V 4.3 V VIN +0.2 mV +0.2 mV -0.2 mV C1: V IN C2: VOUT (ac) 5.3 V 4.3 V +0.6 mV 3.3 V -0.2 mV -0.5 mV 200.0 μs/div 2.0 V/div 1 mV/div C1: VIN C2: VOUT (ac) Figure 33. Line Transient − NCP730−3.3 V -0.7 mV 50.0 μs/div 2.0 V/div 1 mV/div 9.3 V 8.3 V VIN VIN I OUT= 1 mA C OUT = 47μF +0.2 mV +0.1 mV -0.1 mV C1: VIN C2: VOUT (ac) I OUT = 100mA C OUT = 47 μF -0.1 mV 20 0.0 μs/div C1: VIN C2: VOUT (ac) Figure 35. Line Transient − NCP730−3.3 V 50.0 μs/div 2.0 V/div 1 mV/div VIN = 38 V 0 V Shorted => 0 V C1: VIN C2: VOUT C3: VOUT VOUT Figure 36. Line Transient − NCP730−3.3 V VIN = 38 V
NCP730ASNADJT1G 价格&库存

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NCP730ASNADJT1G
  •  国内价格 香港价格
  • 3000+3.240473000+0.40525
  • 6000+3.118656000+0.39001
  • 15000+3.0212015000+0.37783

库存:7619

NCP730ASNADJT1G
  •  国内价格 香港价格
  • 1+7.761701+0.96750
  • 10+6.5160010+0.81220
  • 100+4.50370100+0.56140
  • 500+4.24020500+0.52860
  • 1000+3.294001000+0.41060
  • 3000+3.162203000+0.39420
  • 6000+3.042406000+0.37930
  • 9000+2.946609000+0.36730
  • 24000+2.8508024000+0.35540

库存:29903