NCS2001SN1T1

NCS2001, NCV2001 0.9 V, Rail−to−Rail, Single Operational Amplifier The NCS2001 is an industry first sub−one voltage operational amplifier that features a rail−to−rail common mode input voltage range, along with rail−to−rail output drive capability. This amplifier is guaranteed to be fully operational down to 0.9 V, providing an ideal solution for powering applications from a single cell Nickel Cadmium (NiCd) or Nickel Metal Hydride (NiMH) battery. Additional features include no output phase reversal with overdriven inputs, trimmed input offset voltage of 0.5 mV, extremely low input bias current of 40 pA, and a unity gain bandwidth of 1.4 MHz at 5.0 V. The tiny NCS2001 is the ideal solution for small portable electronic applications and is available in the space saving SOT23−5 and SC70−5 packages with two industry standard pinouts. Features http://onsemi.com MARKING DIAGRAMS 5 5 1 SOT23−5 SN SUFFIX CASE 483 5 4 3 12 SC70−5 SQ SUFFIX CASE 419A 1 AAx AYWG G 5 MBB AYWG G 1 NCV2001SN2 • • • • • • • • • • • • • • • • • • 0.9 V Guaranteed Operation Rail−to−Rail Common Mode Input Voltage Range Rail−to−Rail Output Drive Capability No Output Phase Reversal for Over−Driven Input Signals 0.5 mV Trimmed Input Offset 10 pA Input Bias Current 1.4 MHz Unity Gain Bandwidth at "2.5 V, 1.1 MHz at "0.5 V Tiny SC70−5 and SOT23−5 Packages NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes Pb−Free Package is Available Single Cell NiCd/NiMH Battery Powered Applications Cellular Telephones Pagers Personal Digital Assistants Electronic Games Digital Cameras Camcorders Hand−Held Instruments Rail to Rail Input Rail to Rail Output 5 | AAx M 1 Typical Applications x = G for SN1 H for SN2 I for SQ1 J for SQ2 A = Assembly Location Y = Year W = Work Week M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) PIN CONNECTIONS VOUT VCC Non−Inverting Input 1 2 3 +− 5 VEE Inverting Input 4 Style 1 Pinout (SN1T1, SQ1T2) 1 2 3 +− 5 VOUT 0.8 V to 7.0 V + − VEE Non−Inverting Input VCC Inverting Input 4 Style 2 Pinout (SN2T1, SQ2T2) This device contains 63 active transistors. ORDERING INFORMATION See detailed ordering and shipping information in the dimensions section on page 15 of this data sheet. Figure 1. Typical Application © Semiconductor Components Industries, LLC, 2007 January, 2007 − Rev. 15 1 Publication Order Number: NCS2001/D NCS2001, NCV2001 MAXIMUM RATINGS Rating Supply Voltage (VCC to VEE) Input Differential Voltage Range (Note 1) Input Common Mode Voltage Range (Note 1) Output Short Circuit Duration (Note 2) Junction Temperature Power Dissipation and Thermal Characteristics SOT23−5 Package Thermal Resistance, Junction−to−Air Power Dissipation @ TA = 70°C SC70−5 Package Thermal Resistance, Junction−to−Air Power Dissipation @ TA = 70°C Operating Ambient Temperature Range NCS2001 NCV2001 (Note 3) Storage Temperature Range ESD Protection at any Pin Human Body Model (Note 4) Symbol VS VIDR VICR tSc TJ Value 7.0 VEE −300 mV to 7.0 V VEE −300 mV to 7.0 V Indefinite 150 Unit V V V sec °C RqJA PD RqJA PD TA 235 340 280 286 −40 to +105 −40 to +125 −65 to 150 2000 °C/W mW °C/W mW °C Tstg VESD °C V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Either or both inputs should not exceed the range of VEE −300 mV to VEE +7.0 V. 2. Maximum package power dissipation limits must be observed to ensure that the maximum junction temperature is not exceeded. TJ = TA + (PD RqJA). 3. NCV prefix is qualified for automotive usage. 4. ESD data available upon request. DC ELECTRICAL CHARACTERISTICS (VCC = 2.5 V, VEE = −2.5 V, VCM = VO = 0 V, RL to GND, TA = 25°C unless otherwise noted.) Characteristics Input Offset Voltage VCC = 0.45 V, VEE = −0.45 V TA = 25°C TA = 0°C to 70°C TA = −40°C to 125°C VCC = 1.5 V, VEE = −1.5 V TA = 25°C TA = 0°C to 70°C TA = −40°C to 125°C VCC = 2.5 V, VEE = −2.5 V TA = 25°C TA = 0°C to 70°C TA = −40°C to 125°C Input Offset Voltage Temperature Coefficient (RS = 50) TA = −40°C to 125°C Input Bias Current (VCC = 1.0 V to 5.0 V) Input Common Mode Voltage Range Large Signal Voltage Gain VCC = 0.45 V, VEE = −0.45 V RL = 10 k RL = 2.0 k VCC = 1.5 V, VEE = −1.5 V RL = 10 k RL = 2.0 k VCC = 2.5 V, VEE = −2.5 V RL = 10 k RL = 2.0 k Symbol VIO −6.0 −8.5 −9.5 −6.0 −7.0 −7.5 −6.0 −7.5 −7.5 DVIO/DT IIB VICR AVOL − − − − 20 15 40 20 40 40 40 40 − − − − − − − − − 0.5 − − 0.5 − − 0.5 − − 8.0 10 VEE to VCC 6.0 8.5 9.5 6.0 7.0 7.5 6.0 7.5 7.5 − − − mV/°C pA V kV/V Min Typ Max Unit mV http://onsemi.com 2 NCS2001, NCV2001 DC ELECTRICAL CHARACTERISTICS (continued) (VCC = 2.5 V, VEE = −2.5 V, VCM = VO = 0 V, RL to GND, TA = 25°C unless otherwise noted.) Characteristics Output Voltage Swing, High State Output (VID = +0.5 V) VCC = 0.45 V, VEE = −0.45 V TA = 25°C RL = 10 k RL = 2.0 k TA = 0°C to 70°C RL = 10 k RL = 2.0 k TA = −40°C to 125°C RL = 10 k RL = 2.0 k VCC = 1.5 V, VEE = −1.5 V TA = 25°C RL = 10 k RL = 2.0 k TA = 0°C to 70°C RL = 10 k RL = 2.0 k TA = −40°C to 125°C RL = 10 k RL = 2.0 k VCC = 2.5 V, VEE = −2.5 V TA = 25°C RL = 10 k RL = 2.0 k TA = 0°C to 70°C RL = 10 k RL = 2.0 k TA = −40°C to 125°C RL = 10 k RL = 2.0 k Output Voltage Swing, Low State Output (VID = −0.5 V) VCC = 0.45 V, VEE = −0.45 V TA = 25°C RL = 10 k RL = 2.0 k TA = 0°C to 70°C RL = 10 k RL = 2.0 k TA = −40°C to 125°C RL = 10 k RL = 2.0 k VCC = 1.5 V, VEE = −1.5 V TA = 25°C RL = 10 k RL = 2.0 k TA = 0°C to 70°C RL = 10 k RL = 2.0 k TA = −40°C to 125°C RL = 10 k RL = 2.0 k VCC = 2.5 V, VEE = −2.5 V TA = 25°C RL = 10 k RL = 2.0 k TA = 0°C to 70°C RL = 10 k RL = 2.0 k TA = −40°C to 125°C RL = 10 k RL = 2.0 k Symbol VOH 0.40 0.35 0.40 0.35 0.40 0.35 1.45 1.40 1.45 1.40 1.45 1.40 0.494 0.466 − − − − 1.498 1.480 − − − − − − − − − − − − − − − − Min Typ Max Unit V 2.45 2.40 2.45 2.40 2.45 2.40 VOL − − − − − − − − − − − − − − − − − − 2.498 2.475 − − − − − − − − − − V −0.494 −0.480 − − − − −1.493 −1.480 − − − − −0.40 −0.35 −0.40 −0.35 −0.40 −0.35 −1.45 −1.40 −1.45 −1.40 −1.45 −1.40 −2.492 −2.479 − − − − −2.45 −2.40 −2.45 −2.40 −2.45 −2.40 http://onsemi.com 3 NCS2001, NCV2001 DC ELECTRICAL CHARACTERISTICS (continued) (VCC = 2.5 V, VEE = −2.5 V, VCM = VO = 0 V, RL to GND, TA = 25°C unless otherwise noted.) Characteristics Common Mode Rejection Ratio (Vin = 0 to 5.0 V) Power Supply Rejection Ratio (VCC = 0.5 V to 2.5 V, VEE = −2.5 V) Output Short Circuit Current VCC = 0.45 V, VEE = −0.45 V, VID = "0.4 V Source Current High Output State Sink Current Low Output State VCC = 1.5 V, VEE = −1.5 V, VID = "0.5 V Source Current High Output State Sink Current Low Output State VCC = 2.5 V, VEE = −2.5 V, VID = "0.5 V Source Current High Output State Sink Current Low Output State Power Supply Current (Per Amplifier, VO = 0 V) VCC = 0.45 V, VEE = −0.45 V TA = 25°C TA = 0°C to 70°C TA = −40°C to 125°C VCC = 1.5 V, VEE = −1.5 V TA = 25°C TA = 0°C to 70°C TA = −40°C to 125°C VCC = 2.5 V, VEE = −2.5 V TA = 25°C TA = 0°C to 70°C TA = −40°C to 125°C Symbol CMRR PSRR ISC 0.5 − 15 − 40 − ID − − − − − − − − − 0.51 − − 0.72 − − 0.82 − − 1.10 1.10 1.10 1.40 1.40 1.40 1.50 1.50 1.50 1.2 −3.0 29 −40 76 −96 − −1.5 − −20 − −50 mA Min 60 55 Typ 70 65 Max − − Unit dB dB mA AC ELECTRICAL CHARACTERISTICS (VCC = 2.5 V, VEE = −2.5 V, VCM = VO = 0 V, RL to GND, TA = 25°C unless otherwise noted.) Characteristics Differential Input Resistance (VCM = 0 V) Differential Input Capacitance (VCM = 0 V) Equivalent Input Noise Voltage (f = 1.0 kHz) Gain Bandwidth Product (f = 100 kHz) VCC = 0.45 V, VEE = −0.45 V VCC = 1.5 V, VEE = −1.5 V VCC = 2.5 V, VEE = −2.5 V Gain Margin (RL = 10 k, CL = 5.0 pf) Phase Margin (RL = 10 k, CL = 5.0 pf) Power Bandwidth (VO = 4.0 Vpp, RL = 2.0 k, THD = 1.0%, AV = 1.0) Total Harmonic Distortion (VO = 4.0 Vpp, RL = 2.0 k, AV = 1.0) f = 1.0 kHz f = 10 kHz Slew Rate (VS = "2.5 V, VO = −2.0 V to 2.0 V, RL = 2.0 k, AV = 1.0) Positive Slope Negative Slope Symbol Rin Cin en GBW − − 0.5 Am fm BWP THD − − SR 1.0 1.0 1.6 1.6 6.0 6.0 0.008 0.08 − − V/ms − − − 1.1 1.3 1.4 6.5 60 80 − − − − − − dB ° kHz % Min − − − Typ u1.0 3.0 100 Max − − − Unit tera W pF nV/√Hz MHz http://onsemi.com 4 NCS2001, NCV2001 0 Vsat, Output Saturation Voltage (V) −0.2 −0.4 −0.6 0.6 0.4 0.2 0 100 Low State Output Sinking Current VEE 1.0 k 10 k 100 k 1.0 M RL, Load Resistance (W) High State Output Sourcing Current VCC = 2.5 V VEE = −2.5 V RL to GND TA = 25°C 0 Vsat, Output Saturation Voltage (V) −0.1 −0.2 −0.3 VCC = 2.5 V VEE = −2.5 V IL to GND TA = 25°C VCC VCC High State Output Sourcing Current 0.3 0.2 0.1 0 0 2.0 4.0 Low State Output Sinking Current VEE 6.0 8.0 10 12 IL, Load Current (mA) Figure 2. Split Supply Output Saturation vs. Load Resistance Figure 3. Split Supply Output Saturation vs. Load Current 1000 80 60 45 0 Gain Phase −45 −90 Phase Margin = 60° Fm, Excess Phase (°) IIB, Input Current (pA) 100 AVOL, Gain (dB) 40 20 0 −20 10 1.0 VCC = 2.5 V VEE = −2.5 V VCC = 2.5 V VEE = −2.5 V RL = 10 k to GND TA = 25°C −135 −180 0 0 25 50 75 100 125 −40 −225 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 f, Frequency (Hz) TA, Ambient Temperature (°C) Figure 4. Input Bias Current vs. Temperature Figure 5. Gain and Phase vs. Frequency 2V V+ 2 V/div 0.2 V V+ 0.1 V/div −2 V −2 V 0V 2V VOUT 2 V/div −2 V −2 V 0V 0.2 V VOUT 0.1 V/div 1 ms/div) 1 ms/div) Figure 6. Transient Response http://onsemi.com 5 Figure 7. Slew Rate NCS2001, NCV2001 6 CMR, Common Mode Rejection (dB) VS = ±2.5 V VO, Output Voltage (Vpp) 5 4 3 2 VS = ±0.5 V 1 0 1.E+03 AV = 1.0 RL = 10 k TA = 25°C 90 80 70 60 50 40 30 20 10 0 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 VCC = 2.5 V VEE = −2.5 V TA = 25°C VS = ±1.5 V 1.E+04 1.E+05 1.E+06 f, Frequency (Hz) f, Frequency (Hz) Figure 8. Output Voltage vs. Frequency Figure 9. Common Mode Rejection vs. Frequency PSR, Power Supply Rejection (dB) 80 70 PSR + 60 50 40 30 20 10 0 1.E+01 PSR − VCC = 2.5 V VEE = −2.5 V TA = 25°C IISCI, Output Short Circuit Current (mA) 90 250 200 150 Output Pulsed Test at 3% Duty Cycle 25°C −40°C 85°C 100 50 0 0.0 PSR + 1.E+02 1.E+03 1.E+04 1.E+05 PSR − 1.E+06 1.E+07 0.5 1.0 1.5 2.0 2.5 3.0 3.5 f, Frequency (Hz) VS, Supply Voltage (V) Figure 10. Power Supply Rejection vs. Frequency Figure 11. Output Short Circuit Sinking Current vs. Supply Voltage IISCI, Output Short Circuit Current (mA) 250 200 150 100 50 0 0 1.0 Output Pulsed Test at 3% Duty Cycle −40°C ID, Supply Current (mA) 85°C 0.8 0.6 0.4 0.2 0.0 0.0 25°C −40°C 25°C 85°C 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VS, Supply Voltage (V) VS, Supply Voltage (V) Figure 12. Output Short Circuit Sourcing Current vs. Supply Voltage Figure 13. Supply Current vs. Supply Voltage http://onsemi.com 6 NCS2001, NCV2001 10 THD, Total Harmonic Distortion (%) AV = 1000 THD, Total Harmonic Distortion (%) 10 1.0 1.0 AV = 1000 0.1 AV = 100 AV = 10 0.1 AV = 100 AV = 10 AV = 1.0 VS = ±0.5 V Vout = 0.4 Vpp 1.0 k f, Frequency (Hz) 10 k RL = 10 k TA = 25°C 100 k 0.01 AV = 1.0 VS = ±0.5 V Vout = 0.4 Vpp 100 1.0 k f, Frequency (Hz) RL = 2.0 k TA = 25°C 10 k 100 k 0.01 0.001 10 0.001 10 100 Figure 14. Total Harmonic Distortion vs. Frequency with 1.0 V Supply Figure 15. Total Harmonic Distortion vs. Frequency with 1.0 V Supply 10 THD, Total Harmonic Distortion (%) THD, Total Harmonic Distortion (%) AV = 1000 10 AV = 1000 1.0 AV = 100 AV = 1.0 VS = ±2.5 V Vout = 4.0 Vpp RL = 2.0 k TA = 25°C 100 1.0 k f, Frequency (Hz) 10 k 100 k 1.0 AV = 100 AV = 1.0 AV = 10 0.1 0.1 AV = 10 0.01 10 VS = ±2.5 V Vout = 4.0 Vpp RL = 10 k TA = 25°C 100 1.0 k f, Frequency (Hz) 10 k 100 k 0.01 10 Figure 16. Total Harmonic Distortion vs. Frequency with 5.0 V Supply Figure 17. Total Harmonic Distortion vs. Frequency with 5.0 V Supply 2.5 2.0 SR, Slew Rate (V/ms) 1.5 +Slew Rate, VS = ±2.5 V −Slew Rate, VS = ±2.5 V GBW, Gain Bandwidth Product (MHz) 1.3 1.2 1.1 VCC = 2.5 V VEE = −2.5 V RL = 10 k CL = 10 pF −25 0 25 50 75 100 125 1.0 0.5 0 −50 RL = 10 k CL = 10 pF TA = 25°C −25 0 −Slew Rate, VS = ±0.45 V 1.0 +Slew Rate, VS = ±0.45 V 25 50 75 100 125 0.9 −50 TA, Ambient Temperature (°C) TA, Ambient Temperature (°C) Figure 18. Slew Rate vs. Temperature Figure 19. Gain Bandwidth Product vs. Temperature http://onsemi.com 7 NCS2001, NCV2001 80 60 AVOL, Gain (dB) 40 20 0 RL = 10 k TA = 25°C 100 k 1.0 M f, Frequency (Hz) 10 M VS = ±0.5 V −135 VS = ±2.5 V Am, Gain Margin (dB) −90 Fm, Excess Phase (°) −45 100 80 Phase Margin 60 40 20 0 −50 Gain Margin 100 80 VCC = 2.5 V 60 VEE = −2.5 V RL = 10 k 40 CL = 10 pF 20 0 125 VS = ±2.5 V −180 −20 −40 10 k −225 100 M −25 0 25 50 75 100 TA, Ambient Temperature (°C) Figure 20. Voltage Gain and Phase vs. Frequency Figure 21. Gain and Phase Margin vs. Temperature 70 60 AV, Gain Margin (dB) 50 40 30 20 10 0 10 100 1.0 k 10 k Rt, Differential Source Resistance (W) VCC = 2.5 V VEE = −2.5 V RL = 10 k CL = 10 pF TA = 25°C Gain Margin Phase Margin 70 60 100 Phase Margin Am, Gain Margin (dB) Fm, Phase Margin (°) AV = 100 VCC = 2.5 V VEE = −2.5 V RL = 10 k to GND TA = 25°C Gain Margin 80 60 40 20 0 1.0 100 80 60 40 20 0 1000 50 40 30 20 10 0 100 k 10 100 CL, Output Load Capacitance (pF) Figure 22. Gain and Phase Margin vs. Differential Source Resistance Figure 23. Gain and Phase Margin vs. Output Load Capacitance 8.0 VOUT, Output Volltage (Vpp) 100 80 60 40 20 RL = 10 k CL = 10 pF TA = 25°C Gain Margin Phase Margin 100 80 60 40 20 6.0 4.0 2.0 RL = 10 k TA = 25°C Split Supplies 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 0 3.5 VS, Supply Voltage (V) VS, Supply Voltage (V) Figure 24. Output Voltage Swing vs. Supply Voltage Figure 25. Gain and Phase Margin vs. Supply Voltage http://onsemi.com 8 Fm, Phase Margin (°) Am, Gain Margin (dB) Fm, Phase Margin (°) Fm, Phase Margin (°) NCS2001, NCV2001 60 AVOL, Open Loop Gain (dB) 50 40 30 20 10 0 0.0 TA = 25°C RL = 10 k RL = 2.0 k VIO, Input Offset Voltage (mV) 20 15 10 5 0 −5 −10 −15 −20 −3.0 −2.0 −1.0 0 1.0 2.0 3.0 VS = ±2.5 V RL = ∞ CL = 0 AV = 1.0 TA = 25°C 0.5 1.0 1.5 2.0 2.5 VS, Supply Voltage (V) VCM, Common Mode Input Voltage Range (V) Figure 26. Open Loop Voltage Gain vs. Supply Voltage VCM, Common Mode Input Voltage Range (V) Figure 27. Input Offset Voltage vs. Common Mode Input Voltage Range VS = +2.5 V 20 VIO, Input Offset Voltage (mV) 15 10 5 0 −5 −10 −15 −20 −0.5 −0.4 −0.3 −0.2 −0.1 0 0.1 0.2 0.3 0.4 0.5 VS = ±2.5 V RL = ∞ CL = 0 AV = 1.0 TA = 25°C 3.5 2.5 1.5 0.5 −0.5 −1.5 −2.5 −3.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 D Vio = 5.0 mV RL = ∞ CL = 0 AV = 1.0 TA = 25°C VCM, Common Mode Input Voltage Range (V) VS, Supply Voltage (V) Figure 28. Input Offset Voltage vs. Common Mode Input Voltage Range, VS = +0.45 V Figure 29. Common−Mode Input Voltage Range vs. Power Supply Voltage http://onsemi.com 9 NCS2001, NCV2001 APPLICATION INFORMATION AND OPERATING DESCRIPTION GENERAL INFORMATION The NCS2001 is an industry first rail−to−rail input, rail−to−rail output amplifier that features guaranteed sub−one voltage operation. This unique feature set is achieved with the use of a modified analog CMOS process that allows the implementation of depletion MOSFET devices. The amplifier has a 1.0 MHz gain bandwidth product, 2.2 V/ms slew rate and is operational over a power supply range less than 0.9 V to as high as 7.0 V. Inputs The input topology chosen for this device series is unconventional when compared to most low voltage operational amplifiers. It consists of an N−Channel depletion mode differential transistor pair that drives a folded cascade stage and current mirror. This configuration extends the input common mode voltage range to encompass the VEE and VCC power supply rails, even when powered from a combined total of less than 0.9 V. Figures 27 and 28 show the input common mode voltage range versus power supply voltage. The differential input stage is laser trimmed in order to minimize offset voltage. The N−Channel depletion mode MOSFET input stage exhibits an extremely low input bias current of less than 10 pA. The input bias current versus temperature is shown in Figure 4. Either one or both inputs can be biased as low as VEE minus 300 mV to as high as 7.0 V without causing damage to the device. If the input common mode voltage range is exceeded, the output will not display a phase reversal. If the maximum input positive or negative voltage ratings are to be exceeded, a series resistor must be used to limit the input current to less than 2.0 mA. The ultra low input bias current of the NCS2001 allows the use of extremely high value source and feedback resistor without reducing the amplifier’s gain accuracy. These high value resistors, in conjunction with the device input and printed circuit board parasitic capacitances Cin, will add an additional pole to the single pole amplifier in Figure 30. If low enough in frequency, this additional pole can reduce the phase margin and significantly increase the output settling time. The effects of Cin, can be canceled by placing a zero into the feedback loop. This is accomplished with the addition of capacitor Cfb. An approximate value for Cfb can be calculated by: Cfb + Rin Cin Rfb Cfb Rfb Input Rin Cin − + Output Cin = Input and printed circuit board capacitance Figure 30. Input Capacitance Pole Cancellation Output The output stage consists of complementary P and N−Channel devices connected to provide rail−to−rail output drive. With a 2.0 k load, the output can swing within 50 mV of either rail. It is also capable of supplying over 75 mA when powered from 5.0 V and 1.0 mA when powered from 0.9 V. When connected as a unity gain follower, the NCS2001 can directly drive capacitive loads in excess of 820 pF at room temperature without oscillating but with significantly reduced phase margin. The unity gain follower configuration exhibits the highest bandwidth and is most prone to oscillations when driving a high value capacitive load. The capacitive load in combination with the amplifier’s output impedance, creates a phase lag that can result in an under−damped pulse response or a continuous oscillation. Figure 32 shows the effect of driving a large capacitive load in a voltage follower type of setup. When driving capacitive loads exceeding 820 pF, it is recommended to place a low value isolation resistor between the output of the op amp and the load, as shown in Figure 31. The series resistor isolates the capacitive load from the output and enhances the phase margin. Refer to Figure 33. Larger values of R will result in a cleaner output waveform but excessively large values will degrade the large signal rise and fall time and reduce the output amplitude. Depending upon the capacitor characteristics, the isolation resistor value will typically be between 50 to 500 W. The output drive capability for resistive and capacitive loads is shown in Figures 2, 3, and 23. Input + − R Output CL Isolation resistor R = 50 to 500 Figure 31. Capacitance Load Isolation Note that the lowest phase margin is observed at cold temperature and low supply voltage. http://onsemi.com 10 NCS2001, NCV2001 Vin VS = ±0.45 V Vin = 0.8 Vpp R=0 CL = 820 pF AV = 1.0 TA = 25°C Vout Figure 32. Small Signal Transient Response with Large Capacitive Load Vin VS = ±0.45 V Vin = 0.8 Vpp R = 51 CL = 820 pF AV = 1.0 TA = 25°C Vout Figure 33. Small Signal Transient Response with Large Capacitive Load and Isolation Resistor http://onsemi.com 11 NCS2001, NCV2001 RT 470 k Output Voltage 0.9 V CT 1.0 nF − + R1a 470 k R1b 470 k R2 470 k Timing Capacitor Voltage fO = 1.5 kHz VCC 0 0.67 VCC 0.33 VCC 0.9 V The non−inverting input threshold levels are set so that the capacitor voltage oscillates between 1/3 and 2/3 of VCC. This requires the resistors R1a, R1b and R2 to be of equal value. The following formula can be used to approximate the output frequency. 1 f+ O 1.39 R TC T Figure 34. 0.9 V Square Wave Oscillator cww 1.0 M 10 k D1 1N4148 Output Voltage VCC 0 10 k cw CT 1.0 nF VCC − + R1a 470 k VCC R1b 470 k D2 1N4148 Timing Capacitor Voltage 0.67 VCC 0.33 VCC Clock−wise, Low Duty Cycle VCC Output Voltage fO 0 Timing Capacitor Voltage 0.67 VCC 0.33 VCC Counter−Clock−wise, High Duty Cycle R2 470 k The timing capacitor CT will charge through diode D2 and discharge through diode D1, allowing a variable duty cycle. The pulse width of the signal can be programmed by adjusting the value of the trimpot. The capacitor voltage will oscillate between 1/3 and 2/3 of VCC, since all the resistors at the non−inverting input are of equal value. Figure 35. Variable Duty Cycle Pulse Generator http://onsemi.com 12 NCS2001, NCV2001 R1 1.0 M 2.5 V + Cin 10 mF − −2.5 V R3 1.0 k ≈ 10,000 mF R2 1.0 M R Ceff. + 1 Cin R3 Figure 36. Positive Capacitance Multiplier Cf 400 pF Rf 100 k Af fL R2 10 k Vin C1 80 nF 0.5 V + − R1 10 k −0.5 V fH 1 f+ [ 200 Hz L 2pR C 11 VO 1 f+ [ 4.0 kHz H 2pRC ff R A + 1 ) f + 11 f R2 Figure 37. 1.0 V Voiceband Filter http://onsemi.com 13 NCS2001, NCV2001 Vsupply VCC Vin + − I V in + sink R sense Rsense Figure 38. High Compliance Current Sink VL Is Rsense R1 1.0 k 1.0 V R3 1.0 k RL R4 + − 1.0 k R5 2.4 k 75 Is VO R6 435 mA 212 mA VO 34.7 mV 36.9 mV R2 3.3 k For best performance, use low tolerance resistors. Figure 39. High Side Current Sense http://onsemi.com 14 NCS2001, NCV2001 ORDERING INFORMATION Device NCS2001SN1T1 NCS2001SN1T1G NCS2001SN2T1 NCS2001SN2T1G NCS2001SQ1T1G NCS2001SQ1T2 NCS2001SQ1T2G NCS2001SQ2T2 NCS2001SQ2T2G NCV2001SN2T1G* Package SOT23−5 SOT23−5 (Pb−Free) SOT23−5 SOT23−5 (Pb−Free) SC70−5 (Pb−Free) SC70−5 SC70−5 (Pb−Free) SC70−5 SC70−5 (Pb−Free) SOT23−5 (Pb−Free) Shipping † 3000 / Tape & 7” Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NCV prefix denotes qualification status for automotive applications. Guaranteed by design. http://onsemi.com 15 NCS2001, NCV2001 PACKAGE DIMENSIONS TSOP−5 CASE 483−02 ISSUE F NOTE 5 2X D 5X 0.20 C A B 5 1 2 4 3 0.10 T 0.20 T L A B S M K DETAIL Z 2X G NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. DIM A B C D G H J K L M S MILLIMETERS MIN MAX 3.00 BSC 1.50 BSC 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 DETAIL Z C 0.05 H T SEATING PLANE J SOLDERING FOOTPRINT* 1.9 0.074 0.95 0.037 2.4 0.094 1.0 0.039 0.7 0.028 mm inches SCALE 10:1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 16 NCS2001, NCV2001 PACKAGE DIMENSIONS SC70−5 SQ SUFFIX CASE 419A−02 ISSUE J A G NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. DIM A B C D G H J K N S INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC −−− 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC −−− 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 5 4 S 1 2 3 − B− D 5 PL 0.2 (0.008) M B M N J C H 0.50 0.0197 K SOLDERING FOOTPRINT* 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 SCALE 20:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 17 NCS2001/D