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NCS21674DMG050R2G

NCS21674DMG050R2G

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    MICRO-8_3X3MM

  • 描述:

    DOUBLE CURRENT SENSE AMPLIFIER G

  • 数据手册
  • 价格&库存
NCS21674DMG050R2G 数据手册
DATA SHEET www.onsemi.com Current-Shunt Monitors, 40V Common Mode, Unidirectional, Single, Dual MARKING DIAGRAMS 5 5 1 TSOP−5 CASE 483 NCS21673, NCV21673, NCS21674, NCV21674 XXXAYWG G 1 8 The NCS21673 and NCS21674 are a series of current sense amplifiers offered in gains of 20, 50, 100 and 200 V/V. These parts can measure voltage across shunts at common mode voltages from −0.1 V to 40 V, independent of supply voltage. This helps measuring of fast transients and allows the same type of part to be used for high side and low side current sensing. These devices can operate from a single 2.7 V to 5.5 V power supply. With a −3 dB BW of up to 350 kHz and a Slew Rate of 2 V/us typical, the fast detection of current changes is ensured. These parts are available in TSOP−5 and Micro−8 packages. The dual version makes current sensing in multiple points of a system both space and cost effective. Features • Wide Common Mode Input Range: −0.1 V to 40 V • Supply Voltage Range: 2.7 V to 5.5 V • Low Offset Voltage • Low Offset Drift • Low Current Consumption: 300 mA max per channel • NCV Prefix for Automotive Grade 1 and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant Micro8 CASE 846A−02 XXX A Y W G XXXX AYW G 1 = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) PIN CONNECTIONS See pin connections on page 2 of this data sheet. ORDERING INFORMATION See detailed ordering and shipping information on page 14 of this data sheet. Applications • • • • High−Side Current Sensing Low−Side Current Sensing Power Management Automotive Supply Supply Load RSHUNT 0.01 μF to 0.1 μF VS NCS21673 R1 R3 IN− − IN+ + R4 R2 OUT Output GND Figure 1. Example Application Schematic of High−Side Current Sensing © Semiconductor Components Industries, LLC, 2021 November, 2023 − Rev. 4 1 Publication Order Number: NCS21673/D NCS21673, NCV21673, NCS21674, NCV21674 PIN FUNCTION DESCRIPTION OUT 1 GND 2 IN+ 3 5 VS 4 IN− OUT 1 1 8 VS IN− 1 2 7 OUT 2 IN+ 1 3 6 IN− 2 GND 4 5 IN+ 2 Single Channel TSOP−5 Dual Channel Micro−8 Figure 2. Pin Function Description PIN DESCRIPTION Pin Name Type Description IN+ Input This pin is connected to the positive side of the sense resistor or current shunt. IN− Input This pin is connected to the negative side of the sense resistor or current shunt. OUT Output The output pin provides a low impedance voltage output. VS Supply This is the positive supply pin that provides power to the internal circuitry. An external bypass capacitor of 0.1 μF is recommended to be placed as close as possible to this pin. GND Supply This is the negative supply rail of the circuit. MAXIMUM RATINGS Parameter Supply Voltage (Note 1) Rating Unit VS −0.3 to 5.5 V ±42 Analog Inputs VIN+, VIN− Differential (VIN+)−(VIN−) (Note 2) Analog Inputs Symbol Common−Mode (Note 2) −0.3 to +42 Output VOUT Maximum Output Current Input Current into Any Pin Maximum Junction Temperature GND−0.3 to (Vs) +0.3 V IOUT 8 mA IIN ±10 mA TJ(max) +150 °C Storage Temperature Range TSTG −65 to +150 °C ESD Capability, Human Body Model (Note 3) HBM ±2000 V Charged Device Model (Note 3) CDM ±1000 V ±100 mA Latch−up Current (Note 4) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for safe operating parameters. 2. Input voltage at any pin may exceed the voltage shown if current at that pin is limited to ±10 mA 3. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per JEDEC standard JS−001−2017 ESD Charged Device Model tested per JEDEC standard JS−002−2014 4. Latch−up Current tested per JEDEC standard: JESD78E THERMAL CHARACTERISTICS Parameter Thermal Resistance, Junction−to−Air (Notes 5, 6) Symbol Package Value Unit qJA TSOP−5 / SOT23−5 208 °C/W Micro8 / MSOP−8 162 5. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for safe operating parameters 6. Values based on copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate www.onsemi.com 2 NCS21673, NCV21673, NCS21674, NCV21674 RECOMMENDED OPERATING RANGES Parameter Operating Temperature Common Mode Input Voltage Supply Voltage Symbol Conditions Min Max Unit TA NCS prefix −40 125 °C NCV prefix −40 150 VCM Full temperature range –0.1 40 V VS Full temperature range 2.7 5.5 V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. *Operation up to TA = 150°C is permitted, provided the total power dissipation is limited to prevent the junction temperature from exceeding the 150°C maximum limit. ELECTRICAL CHARACTERISTICS At TA = +25°C, VSENSE = (VIN+) – (VIN−); VS = 5 V, VIN+ = 12 V, unless otherwise noted. Boldface limits apply over the specified temperature range, TA = –40°C to 125°C unless otherwise noted, guaranteed by characterization and/or design. Parameter Symbol Common Mode Rejection Ratio (RTI)* CMRR Conditions Min Typ Max Unit − 100 − dB 86 − − INPUT VIN+ = −0.1 V to 40 V, VSENSE = 0 mV for G20, G50 and G100 VSENSE = 5 mV for G200 NCS21673 G = 20 NCS21674 NCS2167x G = 50 G = 100 G = 200 Input Offset Voltage (RTI)* VOS TA = 25°C, (VIN+) = (VIN−) = 12 V NCS21673 NCS21674 NCS2167x TA= 25°C, (VIN+) = (VIN−) =0V G = 20 NCS21673 100 − − − − 100 − 86 − − − 110 − 96 − − − 120 − 100 − − − ±100 ±500 − ±100 ±850 G = 50 − ±100 ±550 G = 100 − ±100 ±500 G = 200 − ±100 ±500 G = 20 − ±25 ±175 − ±25 ±175 NCS21674 NCS2167x − 84 G = 50 − ±25 ±175 G = 100 − ±25 ±175 G = 200 − ±25 ±210 Input Offset Voltage Drift vs. Temperature (RTI)* dVOS/dT TA = −40°C to +125°C NCS21673 − ±0.1 ±0.5 NCS21674 − ±0.2 ±1 Power Supply Rejection Ratio (RTI)* PSRR VS = 2.7 V to 5.5 V, VSENSE = 10 mV for G20, G50 and G100 VSENSE = 5 mV for G200 NCS21673 − 2 20 NCS21674 − 8 40 Input Bias Current Input Offset Current IIB IIO VIN+ = 0 V − 1 − (VIN+) = (VIN−) = 12 V − 100 − VIN+ = 12 V, VSENSE = 10 mV for G20, G50 and G100 VSENSE = 5 mV for G200 − ±15 − www.onsemi.com 3 mV mV/°C mV/V mA mA NCS21673, NCV21673, NCS21674, NCV21674 ELECTRICAL CHARACTERISTICS (continued) At TA = +25°C, VSENSE = (VIN+) – (VIN−); VS = 5 V, VIN+ = 12 V, unless otherwise noted. Boldface limits apply over the specified temperature range, TA = –40°C to 125°C unless otherwise noted, guaranteed by characterization and/or design. Parameter Symbol Gain G Conditions Min Typ Max Unit G 20 − 20 − V/V G 50 − 50 − G 100 − 100 − G 200 − 200 − TA = 25°C − ±0.1 − TA = −40°C to +125°C − − +0.4 TA = −40°C to +125°C − ±1.5 +20 ppm/°C − ±0.01 − % − 1 − nF − 5 − ms VS = 5.5 V RL = 10 kW to GND, TA = 25°C − 0.02 − V VS = 5.5 V RL = 10 k to GND, TA = −40°C to 125°C − − 0.03 VS = 5.5 V RL = 10 k to GND, TA = 25°C − 0.0005 − VS = 5.5 V RL = 10 k to GND, TA = −40°C to 125°C − − 0.005 G = 20 − 409 − G = 50 − 270 − G = 100 − 240 − G = 200 − 150 − − 2 − V/ms OUTPUT Gain Error Gain Error vs Temperature Nonlinearity Error Maximum Capacitive Load CL No sustained oscillation Settling Time to 1% % VOLTAGE OUTPUT Output Voltage High, Swing from VS Supply Rail Output Voltage Low, Swing from GND VS − VOH VOL − GND V FREQUENCY RESPONSE Bandwidth (f−3dB) Slew Rate (Note 7) BW CL = 25 pF SR kHz NOISE Voltage Noise Density (RTI)* en F = 1 kHz, G100 − 25 − nV/√Hz IQ TA = 25°C − 195 260 mA TA = −40°C to +125°C − − 300 POWER SUPPLY Quiescent Current per Channel Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. *RTI = Referred to input. 7. Guaranteed by characterization and/or design. www.onsemi.com 4 NCS21673, NCV21673, NCS21674, NCV21674 TYPICAL CHARACTERISTICS (At TA = +25°C, VSENSE = (VIN+) – (VIN−), VS = 5.0 V, VIN+ = 12 V, and all gains unless Population Population otherwise noted.) -225 -175 -125 -75 -25 25 75 125 175 225 -300-250-200-150-100 -50 0 Input offset voltage (μV) 50 100 150 200 250 300 Input offset voltage (μV) Figure 3. Figure 3a. Input Offset Voltage Distribution, G20 Population Population Figure 3b. Input Offset Voltage Distribution, G50 -110 -90 -70 -50 -30 -10 10 30 50 70 90 110 -100 -80 -60 -40 -20 Input offset voltage (μV) 0 20 40 60 80 100 Input offset voltage (μV) Figure 3d. Input Offset Voltage Distribution, G200 Figure 3c. Input Offset Voltage Distribution, G100 150 Population Offset Voltage (μV) 100 50 0 −50 G20 G50 G100 G200 −100 −150 −50 −25 0 25 50 75 100 125 Temp (°C) -20 -15 -10 -5 0 5 10 15 20 Common Mode Rejection Ratio (μV/V) 150 Figure 5. Figure 4. Input Offset vs. Temperature Figure 5a. Common Mode Rejection Ratio Distribution, G20 www.onsemi.com 5 NCS21673, NCV21673, NCS21674, NCV21674 TYPICAL CHARACTERISTICS (At TA = +25°C, VSENSE = (VIN+) – (VIN−), VS = 5.0 V, VIN+ = 12 V, and all gains unless Population Population otherwise noted.) (continued) -25 -20 -15 -10 -5 0 5 10 15 20 -7.5 25 -5 -2.5 0 2.5 5 7.5 Common Mode Rejection Ratio (μV/V) Common Mode Rejection Ratio (μV/V) Figure 5c. Common Mode Rejection Ratio Distribution, G100 Figure 5b. Common Mode Rejection Ratio Distribution, G50 6 5 CMRR (μV/V) Population 4 3 2 G20 G50 1 -10 -8 -6 -4 -2 0 2 4 6 8 10 0 −50 Common Mode Rejection Ratio (μV/V) −25 0 25 50 75 G100 G200 100 125 150 Temperature (°C) Figure 6. Common Mode Rejection Ratio vs Temperature Population Population Figure 5d. Common Mode Rejection Ratio Distribution, G200 -0.045 -0.03 -0.015 0 0.015 0.03 -0.12 Gain Error (%) Figure 7a. Gain Error Distribution, G20 -0.04 0.04 0.12 0.2 0.28 Gain Error (%) Figure 7. www.onsemi.com 6 Figure 7b. Gain Error Distribution, G50 NCS21673, NCV21673, NCS21674, NCV21674 TYPICAL CHARACTERISTICS (At TA = +25°C, VSENSE = (VIN+) – (VIN−), VS = 5.0 V, VIN+ = 12 V, and all gains unless Population Population otherwise noted.) (continued) -0.3 -0.22 -0.14 -0.06 0.02 0.1 -0.2 -0.15 -0.1 -0.05 Gain Error (%) Figure 7c. Gain Error Distribution, G100 0.2 Zero Current Output Voltage (V) 0.3 Gain Error (%) 0.016 G20 G50 G100 G200 0.1 0 −0.1 −0.2 −0.3 0 25 50 0.012 0.008 0.006 0.004 0.002 75 100 125 0 −5 150 0 5 15 20 25 30 140 G20 G50 G100 G200 120 60 40 80 60 40 20 20 0 0 1000 10000 100000 45 100 80 −20 40 1000000 G20 G50 G100 G200 120 PSRR (dB) 100 35 Figure 9. Zero Current Output vs Common Mode Voltage 140 CMRR (dB) 10 Common Mode Voltage (V) Figure 8. Gain Error vs Temperature 100 0.15 0.01 Temperature (°C) 10 0.1 G20 G50 G100 G200 0.014 −0.4 −25 0.05 Figure 7d. Gain Error Distribution, G200 0.4 −50 0 Gain Error (%) 10000000 −20 10 Frequency (Hz) 100 1000 10000 100000 1000000 10000000 Frequency (Hz) Figure 10. Common Mode Rejection Ratio vs Frequency Figure 11. Power Supply Rejection Ratio vs Frequency www.onsemi.com 7 NCS21673, NCV21673, NCS21674, NCV21674 TYPICAL CHARACTERISTICS (At TA = +25°C, VSENSE = (VIN+) – (VIN−), VS = 5.0 V, VIN+ = 12 V, and all gains unless otherwise noted.) (continued) 60 1600 Gain (dB) 40 Output IMpedance (Ω) G20 G50 G100 G200 20 0 −20 10 100 1000 10000 100000 1000000 G20 G50 G100 G200 80 4 0 0 10000000 10 100 1000 Source −40°C Source 25°C Source 125°C Sink −40°C Sink 25°C Sink 125°C −0.5 −1.5 10 15 20 25 30 35 40 45 50 55 Input Bias Current (μA) 1.5 Output Voltage, Sink (V) Output Voltage, Source (V) IIB, IOS vs. VCM 180 2.5 5 −2.5 60 130 80 30 −40°C 25°C 125°C −20 0 5 10 15 20 25 30 35 40 Common Mode Voltage (V) Output Current (mA) Figure 14. Output Voltage Swing vs Current Figure 15. Input Bias Current vs Common Mode Voltage 120 200.000 100 180.000 Input Bias Current (μA) Input Bias Current (μA) 1000000 Figure 13. Output Impedance vs Frequency Figure 12. Gain vs Frequency 0 100000 Frequency (Hz) Frequency (Hz) 0.5 10000 80 60 40 20 IIB 12V VCM IIB 40V VCM 160.000 140.000 120.000 100.000 80.000 0 0 5 10 15 20 25 30 35 60.000 −50 40 −25 0 25 50 75 100 125 150 Temperature (°C) Common Mode Voltage (V) Figure 17. Input Bias Current vs Temperature Figure 16. Input Bias Current vs Common Mode Voltage (VS open circuit) www.onsemi.com 8 NCS21673, NCV21673, NCS21674, NCV21674 TYPICAL CHARACTERISTICS (At TA = +25°C, VSENSE = (VIN+) – (VIN−), VS = 5.0 V, VIN+ = 12 V, and all gains unless 400 380 360 340 320 300 100 90 280 260 240 220 200 180 160 140 120 −50 Noise Density (nV/√Hy) VS = 1.8 V VS = 5.0 V 50 25 0 −25 75 125 100 80 70 60 50 40 30 20 10 100 150 1k 10k Temperature (°C) Figure 19. Noise Density, G100 Figure 18. Quiescent Current vs Temperature 2.7 600 Input Step − (VIN−) − (VIN+) (10 mV/Div) 200 0 −200 −400 2.6 2.5 2.4 VS = 5 V Vdiff = 130 mV −600 0 1 2 3 4 5 6 7 8 9 10 Input Output 2.3 Time (5 μs/Div) Time (s) Figure 20. 0.1−Hz to 10−Hz Voltage Noise (Referred−To−Input) Figure 21a. Small Signal Step Response Inverting, G20 Figure 21. 3.75 Input Step − (VIN−) − (VIN+) (10mV/Div) Input Step − (VIN+) − (VIN−) (10mV/Div) 2.7 Output (V) 2.6 2.5 2.4 VS = 5 V Vdiff = 120 mV Input Output Output (V) 400 Voltage Noise (nV) 1M 100k Frequency (Hz) 2.3 3 2.25 1.5 0.75 VS = 5 V Vdiff = 17.5 mV Time (5 μs/Div) Input Output 0 Time (5 μs/Div) Figure 21b. Small Signal Step Response Non−Inverting, G20 Figure 21c. Small Signal Step Response Inverting, G200 www.onsemi.com 9 Output (V) Supply Current (μA) otherwise noted.) (continued) NCS21673, NCV21673, NCS21674, NCV21674 TYPICAL CHARACTERISTICS (At TA = +25°C, VSENSE = (VIN+) – (VIN−), VS = 5.0 V, VIN+ = 12 V, and all gains unless otherwise noted.) (continued) 6 1.5 0.75 0 Time (5 μs/Div) 1.5 0 −3 Figure 22a. Large Signal Step Response Inverting, G20 6 Input Step − (VIN−) − (VIN+) (25 mV/Div) Input Step − (VIN+) − (VIN−) (25 mV/Div) 6 1.5 Output (V) 4.5 3 0 VS = 5 V Vdiff = 0 mV Input Output −1.5 4.5 3 1.5 0 VS = 5 V Vdiff = 25 mV −3 −1.5 −3 Figure 22c. Small Signal Step Response Inventiring, G200 Figure 22b. Large Signal Step Response Non−Inventiring, G20 6 50 3 1.5 0 VCM Input (V) 4.5 Output (V) Input Step − (VIN+) − (VIN−) (250 mV/Div) Input Output Time (5 μs/Div) Time (5 μs/Div) VS = 5 V Vdiff = 0 mV −1.5 Time (5 μs/Div) Figure 22. Figure 21d. Small Signal Step Response Non−Inverting, G200 Input Output VS = 5 V Vdiff = 250 mV Output (V) Input Output 3 −1.5 Input Output 2.77 30 2.72 20 2.67 10 2.62 0 2.57 −10 2.52 −20 2.47 −30 2.42 −40 −3 2.82 40 −50 Input Output Vdiff = 125 mV 2.37 2.32 Time (50 μs/Div) Time (5 μs/Div) Figure 22d. Large Signal Step Response Non−Inventiring, G200 Figure 23. www.onsemi.com 10 Figure 23a. Common Mode Step Response Rising, G20 Output (V) VS = 5 V Vdiff = 7.5 mV 4.5 Output (V) 2.25 Input Step − (VIN−) − (VIN+) (250 mV/Div) 3 Output (V) Input Step − (VIN+) − (VIN−) (10 mV/Div) 3.75 NCS21673, NCV21673, NCS21674, NCV21674 TYPICAL CHARACTERISTICS (At TA = +25°C, VSENSE = (VIN+) – (VIN−), VS = 5.0 V, VIN+ = 12 V, and all gains unless 50 2.77 40 6,4 30 2.72 30 5,6 20 2.67 20 4,8 10 2.62 0 2.57 −10 2.52 −20 2.47 −20 −30 2.42 −30 2.37 −40 2.32 −50 Input Output −50 3,2 −10 2,4 1,6 Time (50 μs/Div) Figure 23b. Common Mode Step Response Falling, G20 Figure 23c. Common Mode Step Response Rising, G200 30 5,6 20 4,8 10 4 0 3,2 −10 Input Step − (VIN−) − (VIN+) (500 mV/Div) 40 6,4 Output (V) Input (V) 50 2,4 −20 1,6 −30 Input Output Vdiff = 12.5 mV 1,5 6 1 4 0,5 2 0 0 −0,5 0,8 0 −50 −1 −2 −4 Time (2 μs/Div) Figure 24a. Overload Response Inverting, G100 Figure 24. 6 1 4 0,5 2 0 0 −0,5 −2 Input Output 6 6 5 5 4 4 3 3 2 2 1 1 0 0 −1 −4 −1 Input (V) 1,5 Output (V) Figure 23d. Common Mode Step Response Rising, G200 Input Step − (VIN+) − (VIN−) (500 mV/Div) Input Output Vdiff = 1 V Time (50 μs/Div) Vdiff = 0 V 0,8 0 Time (50 μs/Div) −40 Input Output Vdiff = 12.5 mV Output (V) Vdiff = 125 mV 4 0 VS Output Vdiff = 20 mV −2 −2 Time (2 μs/Div) Figure 25. Time (10 μs/Div) Figure 25a. Startup Response, G100 Figure 24b. Overload Response Non−Inverting, G100 www.onsemi.com 11 −1 Output (V) −40 10 Output (V) 2.82 40 Input (V) 50 Output (V) VCM Input (V) otherwise noted.) (continued) NCS21673, NCV21673, NCS21674, NCV21674 TYPICAL CHARACTERISTICS (At TA = +25°C, VSENSE = (VIN+) – (VIN−), VS = 5.0 V, VIN+ = 12 V, and all gains unless 6 5 5 4 4 3 3 2 2 1 1 0 0 −1 VS Output Vdiff = 20 mV −2 Channel Separation (dB) 6 Output (V) Input (V) otherwise noted.) (continued) −1 −2 160 150 140 130 120 110 100 90 80 70 60 50 40 30 20 100 Time (10u μs/Div) 1k 10k 100k Frequency (Hz) Figure 25b. Shutdown Response, G100 Figure 26. Channel Separation, G200 www.onsemi.com 12 1M NCS21673, NCV21673, NCS21674, NCV21674 APPLICATION INFORMATION Current Sensing Techniques the RFILT resistors are connected in series with the internal feedback resistors R3 and R4, hence changing the amplifier’s overall gain. Also, the Opamp’s input (IIB) currents create a voltage drop across the filtering resistors, which is added to the differential voltage presented to the Opamp’s inputs. This voltage is gained by the amplifier adding to the overall error. A good practice is to keep the filtering resistors in the range of a few ohms then size the filtering capacitor accordingly. The zero−drift architecture contains a 250 KHz sampling circuit that can induce aliasing effects on the current signal. It is recommended to add filtering to the input stage that limits the signal bandwidth to
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