NCT275BFCT2G

NCT275 Industry Standard Digital Temperature Sensor in CSP Package with 2-wire Interface The NCT275 is a twoïwire serially programmable temperature sensor with an overïtemperature/interrupt output pin to signal out of limit conditions. This is an openïdrain pin and can operate in either comparator or interrupt mode. Temperature measurements are converted into digital form using a high resolution (12 bit), sigmaïdelta, analogïtoïdigital converter (ADC). The device operates over the –55°C to +125°C temperature range. Communication with the NCT275 is accomplished via the SMBus/I2C interface which is compatible with industry standard protocols. Through this interface the NCT275s internal registers may be accessed. These registers allow the user to read the current temperature, change the configuration settings and adjust the temperature limits. The NCT275 has a wide supply voltage range of 3.0 V to 5.5 V. The average supply current is 575 mA at 3.3 V. It also offers a shutdown mode to conserve power. The typical shutdown current is 3 mA. The NCT275 is available in a space saving 6 ball CSP package as NCT275A and NCT275B. NCT275B gives I2C address options of 0x48 and 0x4A while NCT275A gives address options of 0x49 and 0x4B. NCT275 is also fully register compatible with the NCT75, LM75 and TMP75. http://onsemi.com MARKING DIAGRAM XXX AYW G WLCSP6 CASE 567JR XXX A Y W G = 75A (NCT275A) = 75B (NCT275B) = Assembly Location = Year = Work Week = PbïFree Package PIN CONNECTIONS SDA A2 A1 VDD SCL B2 B1 A1 OS/ALERT C2 C1 GND Features • • • • • • • • • • 12ïbit TemperatureïtoïDigital Converter Input Voltage Range from 3.0 V to 5.5 V Temperature Range from ï55°C to +125°C SMBus/I2C Interface Over Temperature Indicator Support for SMBus ALERT Shutdown Mode for Low Power Consumption OneïShot Mode Available in 6 Ball CSP Package with Multiple Address Options These are PbïFree Devices (Bottom View) VDD A1 SDA NCT275 SCL Typical Applications • • • • • • • • Computer Thermal Monitoring Thermal Protection Isolated Sensors Battery Management Office Electronics Electronic Test Equipment Thermostat Controls System Thermal Management © Semiconductor Components Industries, LLC, 2014 August, 2014 ï Rev. 0 GND OS/ALERT (Top View) ORDERING INFORMATION See detailed ordering and shipping information ion page 12 of this data sheet. 1 Publication Order Number: NCT275/D NCT275 VDD SDA SCL REGISTERS TWO-WIRE INTERFACE A1 CONFIGURATION THYST TEMPERATURE TOS ONE-SHOT OS/ALERT CONTROL LOGIC DELTA-SIGMA ADC GND Figure 1. Simplified Block Diagram VDD 3.0 V To 5.5 V CBYPASS ADDRESS (SET AS DESIRED) A1 SDA NCT275 OS/ALERT SCL SERIAL INTERFACE NOTE: SDA, SCL AND OS/ALERT PINS REQUIRE PULL-UP RESISTORS TO VDD GND Figure 2. Typical Application Circuit BALL FUNCTION DESCRIPTION Ball Name Ball Function Description A2 SDA SMBus/I2C A1 VDD Positive Supply Voltage, 3.0 V to 5.5 V. Bypass to ground with a 0.1mF bypass capacitor. B2 SCL Serial Clock Input. Openïdrain pin; needs a pullïup resistor. B1 A1 C2 OS/ALERT C1 GND Serial Biïdirectional Data Input/Output. Openïdrain pin; needs a pullïup resistor. SMBus/I2C Serial Bus Address Selection Pin. Connect to GND or VDD to set the desired I2C address. Overïtemperature Indicator. Openïdrain output; needs a pullup resistor. Power Supply Ground. http://onsemi.com 2 NCT275 ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit VDD ï0.3 to +7 V ï0.3 V to VDD + 0.3 V V IIN ï1 to +50 mA TJ(max) 150.7 °C TOP ï55 to 125 °C Supply Voltage Input voltage on SCL, SDA, and A1. Input current on SDA and A1. Maximum Junction Temperature Operating Temperature Range Storage Temperature Range TSTG ï65 to 160 °C ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V ESD Capability, Machine Model (Note 2) ESDMM 200 V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AECïQ100ï002 (EIA/JESD22ïA114) ESD Machine Model tested per AECïQ100ï003 (EIA/JESD22ïA115) OPERATING RANGES (Note 3) Rating Symbol Min Max Unit Operating Input Voltage Vin 3.0 5.5 V Operating Ambient Temperature Range TA ï55 125 °C Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 3. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. SMBUS TIMING SPECIFICATIONS Parameter Min Typ Max Unit fSCL DC ï 400 kHz Start Condition Hold Time tHD:STA 0.6 ï ï ms Stop Condition Setup Time tSU:STO 100 ï ï ns 1.3 ï ï ms Serial Clock Frequency Clock Low Period Clock High Period Symbol Test Conditions 90% of SCL to 10% of SDA tLOW O.6 ï ï ms Start Condition Setup Time tSU:STA tHIGH 90% of SCL to 90% of SDA 100 ï ï ns Data Setup Time tSU:DAT 10% of SDA to 10% of SCL 100 ï ï ns Data Hold Time (Note 4) tHD:DAT 10% of SCL to 10% of SDA 0 ï 76 ns SDA/SCL Rise Time tR ï 300 ï ns SDA/SCL Fall Time tF ï 300 ï ns tRESET 1.3 ï ï ms tBUF 1.3 ï ï ms Minimum RESET Pulse Width Bus Free Time Between STOP and START Conditions 4. This refers to the hold time when NCT275 is writing data to the bus http://onsemi.com 3 NCT275 tR tF tHD;STA tLOW SCL tHD;STA tHD;DAT tHIGH tSU;STA tSU;STO tSU;DAT SDA tBUF STOP START STOP START Figure 3. Serial Interface Timing ELECTRICAL CHARACTERISTICS (TA = TMIN to TMAX, VDD = 3.0 V to 5.5 V. All specifications for ï55°C to +125°C, unless otherwise noted) Parameter Test Conditions Min Typ Max Unit TA = 0°C to +70°C TA = ï25°C to +100°C TA = ï55°C to +125°C ï ï ï ï ï ï ±1 ±2 ±3 °C TEMPERATURE SENSOR AND ADC Accuracy at VDD = 3.0 V to 5.5 V ADC Resolution ï 12 ï Bits Temperature Resolution ï 0.0625 ï °C ï 48.5 ï ms ï 80 ï ms 3.0 ï 5.5 V Temperature Conversion Time One Shot Mode Update Rate POWER REQUIREMENTS Supply Voltage POR Threhold 2.75 ï ï V Peak current while converting and I2C interface inactive ï ï 0.8 mA Average Current Average current over 1 conversion cycle ï 0.44 0.575 mA Shutdown Mode at 3.3 V Supply current in shutdown mode ï 3 12 mA IOL = 4 mA ï 0.15 0.4 V Supply Current OS/ALERT OUTPUT (OPEN DRAIN) Output Low Voltage, VOL Pin Capacitance High Output Leakage Current, IOH ï 10 ï pF OS/ALERT pin pulled up to 5.5 V ï 0.1 5 mA VIN = 0 V to VDD ï ï 1 mA ï ï 0.3 x VDD V 0.7 x VDD ï ï V ï ï 50 ns ï 3 ï pF DIGITAL INPUTS Input Current Input Low Voltage, VIL Input High Voltage, VIH SCL, SDA Glitch Rejection Input filtering suppresses noise spikes of less than 50 ns Pin Capacitance DIGITAL OUTPUT (OPEN DRAIN) Output High Current, IOH VOH = 5 V ï ï 1 mA Output Low Voltage, VOL IOL = 3 mA ï ï 0.4 V ï 3 ï pF Output Capacitance, COUT Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. http://onsemi.com 4 NCT275 FUNCTIONAL DESCRIPTION Temperature Measurement Results The NCT275 temperature sensor converts an analog temperature measurement to a digital representation by using an onïchip measurement transistor and a 12 bit DeltaïSigma ADC. The device includes an open drain ALERT output which can be used to signal that the programmed temperature limit has been exceeded. The two main modes of operation are normal and shutdown mode. In normal mode the NCT275 performs a new temperature conversion every 80 ms. This new value is then updated to the temperature value register (address 0x00) and also compared to the TOS register limit (default = 80°C). If the temperature value register is read during the conversion sequence the value returned is the previously stored value. A bus read does not affect the conversion that is in progress. In shutdown mode temperature conversion is disabled and the temperature value register holds the last valid temperature reading. The NCT275 can still be communicated with in this mode as the interface is still active. The device mode is controlled via bit 0 of the configuration register. While in shutdown mode a conversion can be initiated by writing an arbitrary value to the oneïshot register (0x04). This has the effect of powering up the NCT275, performing a conversion, comparing the new temperature with the programmed limit and then going back into shutdown mode. The OS/ALERT pin can be configured in many ways to allow it to be used in many different system configurations. The over temperature output can be configured to operate as a comparator type output (which is self clearing once the temperature has returned below the hysteresis value) or an interrupt type output (which requires the master to read an internal register AND the temperature to return below the hysteresis value before going into an inactive state). The ALERT pin can also be configured as an active high or active low output. While the ADC of the NCT275 can theoretically measure temperatures in the range of ï128°C to 127°C, the NCT275 is guaranteed to measure from ï55°C to +125°C. Table 1 shows the relevant temperature bits for a 12 bit temperature reading. A 2ïbyte read is required to obtain the full 12 bit temperature reading. If an 8 bit (1°C resolution) reading is required then a single byte read is sufficient. The results of the on chip temperature measurements are stored in the temperature value register and compared with the TOS and THYST limit register. The temperature value, TOS and THYST registers are 16 bits wide and have a resolution of 0.0625°C. The data is stored as a 12 bit 2s complement word. The data is left justified; D15 is the MSB and is the sign bit. The four LSBs (D3 to D0) are always 0 as they are not part of the result. Table 1. 12ïBit TEMPERATURE DATA FORMAT Temperature Binary Value D15 to D4 Hex Value ï55 1100 1001 0000 0xC90 ï25 1110 0111 0000 0xE70 ï0.0625 1111 1111 1111 0xFFF 0 0000 0000 0000 0x000 +0.0625 0000 0000 0001 0x001 +25 0001 1001 0000 0x190 +75.25 0100 1011 0100 0x4B4 +100 0110 0100 0000 0x640 +125 0111 1101 0000 0x7D0 12ïBit Temperature Data Format Positive Temperature = ADC Code (decimal)/16 Example 190h = 400d/16 = +255C Negative Temperature = (ADC Code(decimal) ï 4096)/16 Example E70h = (3696d – 4096)/16 = ï255C ONEïSHOT MODE One of the features of the NCT275 is a OneïShot Temperature Measurement Mode. This mode is useful if reduced power consumption is a design requirement. To enable oneïshot mode bit 5 of the configuration register need to be set. Once, enabled, the NCT275 goes immediately into shutdown mode. Here, the current consumption is reduced to a typical value of 3 mA. Writing address 0x04 to the address pointer register initiates a oneïshot temperature measurement. This powers up the NCT275, carries out a temperature measurement, and then powers down again. The data written to this register is irrelevant and is not stored. It is the write operation that causes the oneïshot conversion. http://onsemi.com 5 NCT275 temperature register, can be be read from and written to (the temperature register is read only). The power on state and address of each register are listed in Table 4. 82°C 81°C 80°C 79°C Temperature Address Pointer Register TOS The address pointer register is used to select which register is to respond to a read or write operation. The three LSBs (P2, P1 & P0) of this write only register are used to select the appropriate register. On power up this register is loaded with a value of 0x00 and so points to the temperature register. Table 2 shows the bits of the address pointer register and Table 3 shows the pointer address selecting each of the registers available. 78°C 77°C 76°C 75°C THYST 74°C 73°C 72°C Table 2. ADDRESS POINTER REGISTER OS/ALERT PIN (COMPARATOR MODE) POLARITY = 0 OS/ALERT PIN (INTERRUPT MODE) POLARITY = 0 Default P6 P5 P4 P3 P2 P1 P0 0 0 0 0 0 0 0 0 Table 3. REGISTER ADDRESSES SELECTION OS/ALERT PIN (COMPARATOR MODE) POLARITY = 1 Read Read Read OS/ALERT PIN (INTERRUPT MODE) POLARITY = 1 Figure 4. One-shot OS/ALERT Pin Operation P2 P1 P0 Register Selected 0 0 0 Stored Temperature 0 0 1 Configuration 0 1 0 THYST set point 0 1 1 TOS set point 1 0 0 Oneïshot Table 4. NCT275 REGISTER SET FAULT QUEUE PowerïOn Default Value Register Address A fault is defined as when the temperature exceeds a preïdefined temperature limit. This limit can be programmed in the THYST and the TOS setpoint registers. Bits 3 and 4 of the configuration register determine the number of faults necessary to trigger the OS/ALERT pin. Up to six faults can be programmed to prevent false tripping when the NCT275 is used in a noisy temperature environment. In order for the OS/ALERT output to be set these faults must occur consecutively. REGISTERS Register Name Hex 5C 0x00 (R) Stored Temperature Value 0x0000 0 0x01 (R/W) Configuration 0x00 ï 0x02 (R/W) THYST 0x4B00 75 0x03 (R/W) TOS 0x5000 80 0x04 (R/W) OneïShot 0xXX ï Temperature Register The NCT275 contains six registers for configuring and reading the temperature: the address pointer register, 4 data registers and a oneïshot register. The configuration register, the address pointer register and the oneïshot register are all 8 bits wide while the temperature register, THYST and TOS registers are all 16 bits wide. All registers, except for the The temperature measured by the parts internal sensor is stored in this 16ïbit read only register. The data is stored in twos complement format with the MSB as the sign bit. The 8 MSBs must be read first followed by the 8 LSBs. Table 5. TEMPERATURE VALUE REGISTER MSB LSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 0 0 0 0 X X X X http://onsemi.com 6 NCT275 Configuration Register this register is written to one conversion is performed and the part returns to its shutdown state. D[4:3]: Fault Queue D4 D3 These two bits determine how many over temperature conditions occur before the OS/Alert pin is triggered. This helps to prevent false triggering of the output. 0 0 = 1 Fault (Default) 0 1 = 2 Faults 1 0 = 4 Faults 2 1 = 6 Faults D2: OS/Alert pin polarity This selects the polarity of the OS/Alert output pin. D2 = 0 Output is active low. (Default) D2 = 1 Output is active high. D1: Cmp/Int D1 = 0 Comparator mode. (Default) D1 = 1 Interrupt mode. D0: Shutdown D0 = 0 Normal mode – part is fully powered. (Default) D0 = 1 Shutdown mode – all circuitry except for the SMBus interface is powered down. Write a 0 to this bit to power up again. This 8ïbit read/write register is used to configure the NCT275 into its various modes of operation. The different modes are listed in Table 6 and explained in more detail below. Table 6. CONFIGURATION REGISTER Configuration Default Value D7 OS/SMBus Alert 0 D6 Reserved 0 D5 Oneïshot Mode 0 D4 Faultïqueue 0 D3 Faultïqueue 0 D2 OS/Alert pin polarity 0 D1 Cmp/Int Mode 0 D0 Shutdown Mode 0 D7: OS/SMBus Alert Mode. D7 = 0 SMBus alert disabled, pin operates as an over temperature shutdown pin. (Default) D7 = 1 Enable SMBus alert functionality for the NCT275. D6: Reserved Write 0 to this bit. D5: OneïShot Mode D5 = 0 Part is in normal mode and converting every 60 ms. (Default) D5 = 1 Setting this bit puts the part into oneïshot mode. The part is normally powered down in this mode until the one shot register is written to. Once THYST Register The THYST register stores the temperature hysteresis value for the overtemperature output. This value is picked to stop the OS/Alert pin from being asserted and deïasserted in noisy temperature environments. This limit is stored in the 16 bit register in twos complement format. The MSB is the temperature sign bit. The 8 MSBs must be read first followed by the 8 LSBs. The default value is +75°C. Table 7. THYST REGISTER MSB LSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 0 1 0 1 1 0 0 0 0 X X X X TOS Register The data is stored in twos complement format with the MSB as the sign bit. The 8 MSBs must be read frist followed by the 8 LSBs. The default limit +80°C. This register stores the temperature limit at which the part asserts an OS/Alert. Once the measured temperature reaches this value an alert or overtemperature output is generated. Table 8. TOS REGISTER MSB LSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 1 0 0 0 0 0 0 0 0 X X X X http://onsemi.com 7 NCT275 SERIAL INTERFACE selected device waits for data to be read from or written to it. If the R/W bit is a zero then the master writes to the slave device. If the R/W bit is a one then the master reads from the slave device. 2. Data is sent over the serial bus in sequences of nine clock pulses, eight bits of data followed by an acknowledge bit from the receiver of data. Transitions on the data line must occur during the low period of the clock signal and remain stable during the high period, since a lowïtoïhigh transition when the clock is high can be interpreted as a stop signal. 3. When all data bytes have been read or written, stop conditions are established. In write mode, the master pulls the data line high during the tenth clock pulse to assert a stop condition. In read mode, the master overrides the acknowledge bit by pu pulls the data line high during the low period before the ninth clock pulse. This is known as no acknowledge. The master takes the data line low during the low period before the tenth clock pulse, then high during the tenth clock pulse to assert a stop condition. Any number of bytes of data can be transferred over the serial bus in one operation. However, it is not possible to mix read and write in one operation because the type of operation is determined at the beginning and cannot subsequently be changed without starting a new operation. Control of the NCT275 is carried out via the SMBus/I2Ccompatible serial interface. The NCT275 is connected to this bus as a slave device, under the control of a master device. Serial Bus Address Control of the NCT275 is carried out via the serial bus. The NCT275 is connected to this bus as a slave device under the control of a master device. There are two NCT275 device options called NCT275A and NCT275B. Each device supports two possible addresses depending on Ball A2 (named A1) is connected high or low. The NCT275 has a 7ïbit serial address. The four MSBs are fixed and set to 1001 while the 3 LSBs can be configured by the user using Ball A2 (named A1). The ball A2 can be connected to VDD or ground. Table 9. NCT275A SERIAL BUS ADDRESS OPTIONS Ball A2 I2C Address 0 0x49 1 0x4B Table 10. NCT275B SERIAL BUS ADDRESS OPTIONS Ball A2 I2C Address 0 0x48 WRITING DATA 1 0x4A There are two types of writes used in the NCT275: Setting up the Address Pointer Register for a Register Read The NCT275 also features a SMBus/I2C timeout function whereby the SMBus/I2C interface times out after 25 ms of To read data from a particular register, the address pointer register must hold the address of the register being read. To configure the address pointer register a single write operation (shown in Figure 5). It consists of the device address followed by the address being written to the address pointer register. This will then be followed by a read operation. no activity on the SDA line. After this time, the NCT275 resets the SDA line back to its idle state (high impedance) and waits for the next start condition. The serial bus protocol operates as follows: 1. The master initiates data transfer by establishing a start condition, defined as a high to low transition on the serial data line SDA, while the serial clock line SCL remains high. This indicates that an address/data stream is going to follow. All slave peripherals connected to the serial bus respond to the start condition and shift in the next eight bits, consisting of a 7ïbit address (MSB first) plus a read/write (R/W) bit, which determines the direction of the data transfer i.e. whether data is written to, or read from, the slave device. The peripheral with the address corresponding to the transmitted address responds by pulling the data line low during the low period before the ninth clock pulse, known as the acknowledge bit. All other devices on the bus now remain idle while the Writing Data to a Register Due to the different size registers used by the NCT275, there are two types of write operations. One is for the 8 bit wide configuration register and the other for the 16 bit wide limit registers. Figure 6 shows the sequence required to write to the configuration register. It consists of the device address, the data register being written to and the data being written the selected register. The two temperature limit registers (THYST and TOS) are 16 bits wide and require two data bytes to be written to these registers. This sequence is shown in Figure 7. It consists of the device address, the data register being written to and the two data byes being written to the selected register. http://onsemi.com 8 NCT275 1 9 1 9 SCL SDA A6 A5 START BY MASTER A4 A3 A2 A1 R/W A0 D7 D6 ACK. BY NCT275 FRAME 1 SERIAL BUS ADDRESS BYTE D5 D4 D3 D2 D1 D0 ACK. BY NCT275 FRAME 2 ADDRESS POINTER REGISTER BYTE STOP BY MASTER Figure 5. Writing to the Address Pointer Register 1 9 1 9 SCL SDA A6 A5 START BY MASTER A4 A3 A2 A1 R/W A0 D7 ACK. BY NCT275 FRAME 1 SERIAL BUS ADDRESS BYTE D6 D5 D4 D3 D2 D1 D0 FRAME 2 ADDRESS POINTER REGISTER BYTE 1 ACK. BY NCT275 9 SCL (CONTINUED) D7 SDA (CONTINUED) D6 D5 D4 D3 D2 D1 D0 ACK. BY STOP BY NCT275 MASTER FRAME 3 DATA BYTE Figure 6. Writing a Register Address to the Address Pointer Register, then Writing a Single Byte of Data to the Configuration Register 1 9 1 9 SCL SDA START BY MASTER SCL (CONTINUED) SDA (CONTINUED) A6 A5 A4 A3 A2 A1 A0 FRAME 1 SERIAL BUS ADDRESS BYTE R/W D7 1 9 D15 D14 D13 D12 D11 D10 FRAME 3 DATA BYTE D9 D6 D5 D4 D3 D2 D1 D0 ACK. BY NCT275 FRAME 2 ADDRESS POINTER REGISTER BYTE ACK. BY NCT275 1 D7 D8 ACK. BY NCT275 9 D6 D5 D4 D3 D2 FRAME 4 DATA BYTE D1 D0 ACK. BY NCT275 STOP BY MASTER Figure 7. Writing to the Address Pointer Register Followed by Two Bytes of Data to a 16 Bit Limit Register http://onsemi.com 9 NCT275 1 9 1 9 SCL SDA A6 A5 START BY MASTER A4 A3 A2 A1 A0 R/W ACK. BY NCT275 D7 D6 D5 D4 D3 D2 D1 D0 NO ACK. BY MASTER FRAME 2 DATA BYTE FROM REGISTER FRAME 1 SERIAL BUS ADDRESS BYTE STOP BY MASTER Figure 8. Reading Data from the Configuration Register 1 9 1 9 SCL SDA A6 A5 START BY MASTER A4 A3 A2 A1 A0 R/W D15 D14 ACK. BY NCT275 FRAME 1 SERIAL BUS ADDRESS BYTE D13 D12 D11 D10 D9 D8 ACK. BY MASTER FRAME 2 MSB DATA FROM TEMPERATURE VALUE REGISTER 1 9 SCL (CONTINUED) D7 SDA (CONTINUED) D6 D5 D4 D3 D2 D1 D0 NO ACK. BY STOP BY MASTER MASTER FRAME 3 LSB DATA FROM TEMPERATURE VALUE REGISTER Figure 9. Reading Data from the Temperature Value Register with Preset Pointer 1 9 1 9 SCL SDA A6 A5 A4 A3 A2 A1 A0 D7 R/W D6 D5 D4 D3 D2 D1 D0 ACK. BY NCT275 ACK. BY NCT275 START BY MASTER FRAME 2 ADDRESS POINTER REGISTER BYTE FRAME 1 SERIAL BUS ADDRESS BYTE 1 9 1 9 SCL SDA A6 A5 A4 A3 A2 A1 A0 R/W D15 D14 D13 D12 D11 D10 D9 D8 ACK. BY MASTER ACK. BY NCT275 REPEATED START BY MASTER FRAME 2 MSB DATA FROM TEMPERATURE VALUE REGISTER FRAME 1 SERIAL BUS ADDRESS BYTE 9 1 SCL (CONTINUED) SDA (CONTINUED) D7 D6 D5 D4 D3 D2 D1 D0 NO ACK. BY STOP BY MASTER MASTER FRAME 3 LSB DATA FROM TEMPERATURE VALUE REGISTER Figure 10. Typical Pointer Set Followed by Two Bytes Read http://onsemi.com 10 NCT275 READING DATA up. More information on comparator and interrupt modes alsong with the SMBus alert mode are explained below. Reading data from the NCT275 is done in two different ways depending on the register being read. The configuration register is only 8 bits wide so a single byte read is used for this (shown in Figure 8). This consists of the device address followed by the data from the register. Reading the data in the temperature value register requires a two byte read (shown in Figure 9). This consists of the device address, followed by two bytes of data from the temperature register (the first byte is the MSB). In both cases the address pointer register of the register being read must be written to prior to performing a read operation. Comparator Mode In Comparator Mode, the OS/ALERT pin becomes active when the measured temperature equals or exceeds the limit stored in the TOS setpoint register. The pin returns to its inactive status when the temperature drops below the THYST setpoint register value. NOTE: Shutdown mode does not reset the output state for comparator mode. Interrupt Mode In the interrupt mode, the OS/ALERT pin becomes active when the temperature equals or exceeds the TOS limit for a consecutive number of faults. It can be reset by performing a read operation on any register in the NCT275. The output can only become active again when the TOS limit has been equalled or exceeded. Figure 11 shows how both the interrupt and comparator modes operate in relation to the output pin (OS/ALERT). It also shows the operation of the polarity in the configuration register. OS/ALERT OUTPUT OVERTEMPERATURE MODES The OS/ALERT output pin can operate in two different modes – overtemperature mode and SMBus alert mode. The pin defaults to overtemperature mode on power up. This means that it becomes active when the measured temperature meets or exceeds the limit stored in the TOS setpoint register. At this point it can deal with the event in one of two ways which depends on the mode it is in. The two overtemperature modes are comparatormode and interrupt mode. Comparator is the default mode on power http://onsemi.com 11 NCT275 82°C 81°C TOS 80°C Temperature 79°C 78°C 77°C 76°C 75°C THYST 74°C 73°C 72°C OS/ALERT PIN (COMPARATOR MODE) POLARITY = 0 OS/ALERT PIN (INTERRUPT MODE) POLARITY = 0 OS/ALERT PIN (COMPARATOR MODE) POLARITY = 1 Read Read Read OS/ALERT PIN (INTERRUPT MODE) POLARITY = 1 Figure 11. OS/ALERT Output Temperature Response Diagram Table 11. ORDERING INFORMATION I2C Address Package Shipping† NCT275AFCT2G 0x49 & 0x4B WLCSP6 (PbïFree) 3000 / Tape & Reel NCT275BFCT2G 0X48 & 0X4A WLCSP6 (PbïFree) 3000 / Tape & Reel Part Number †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 12 NCT275 PACKAGE DIMENSIONS WLCSP6, 1.355x0.845 CASE 567JR ISSUE A ÈÈ ÈÈ PIN A1 REFERENCE 2X 0.10 C 2X 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. 4. DIMENSION b IS MEASURED AT THE MAXIMUM BALL DIAMETER PARALLEL TO DATUM C. A B E D DIM A A1 A2 b D E e TOP VIEW A2 0.10 C A RECOMMENDED SOLDERING FOOTPRINT* 0.05 C NOTE 3 6X A1 0.05 C SEATING PLANE A1 PACKAGE OUTLINE 0.40 PITCH e b 0.10 C A B C SIDE VIEW MILLIMETERS MIN MAX 0.60 ïïï 0.18 0.22 0.36 REF 0.24 0.30 1.355 BSC 0.845 BSC 0.40 BSC e C 6X B 0.40 PITCH A 1 2 BOTTOM VIEW 0.27 DIMENSIONS: MILLIMETERS *For additional information on our PbïFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/PatentïMarking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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