DATA SHEET
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Voltage Regulator –
Adjustable Output, Positive
2
1
1.5 A
3
Heatsink surface (shown as terminal 4 in
case outline drawing) is connected to Pin 2.
LM317, NCV317
The LM317 is an adjustable 3−terminal positive voltage regulator
capable of supplying in excess of 1.5 A over an output voltage range of
1.2 V to 37 V. This voltage regulator is exceptionally easy to use and
requires only two external resistors to set the output voltage. Further, it
employs internal current limiting, thermal shutdown and safe area
compensation, making it essentially blow−out proof.
The LM317 serves a wide variety of applications including local, on
card regulation. This device can also be used to make a programmable
output regulator, or by connecting a fixed resistor between the
adjustment and output, the LM317 can be used as a precision current
regulator.
Features
•
•
•
•
•
•
•
•
•
•
D2PAK−3
D2T SUFFIX
CASE 936
Output Current in Excess of 1.5 A
Output Adjustable between 1.2 V and 37 V
Internal Thermal Overload Protection
Internal Short Circuit Current Limiting Constant with Temperature
Output Transistor Safe−Area Compensation
Floating Operation for High Voltage Applications
Eliminates Stocking many Fixed Voltages
Available in Surface Mount D2PAK−3, and Standard 3−Lead
Transistor Package
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Vin
TO−220
T SUFFIX
CASE 221AB
1
2
3
Pin 1. Adjust
2. Vout
3. Vin
Heatsink surface connected to Pin 2.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 10 of this data sheet.
Vout
LM317
IAdj
Adjust
R1
240
+ C **
O
1.0 mF
Cin*
0.1 mF
R2
**Cin is required if regulator is located an appreciable distance from power supply filter.
**CO is not needed for stability, however, it does improve transient response.
ǒ
Ǔ
R
V out + 1.25V 1 ) 2 ) I R 2
Adj
R1
Since IAdj is controlled to less than 100 mA, the error associated with this term is
negligible in most applications.
Figure 1. Standard Application
© Semiconductor Components Industries, LLC, 2016
August, 2021 − Rev. 17
1
Publication Order Number:
LM317/D
LM317, NCV317
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VI−VO
−0.3 to 40
Vdc
PD
qJA
qJC
Internally Limited
65
5.0
W
°C/W
°C/W
PD
qJA
qJC
Internally Limited
70
5.0
W
°C/W
°C/W
Operating Junction Temperature Range
TJ
−55 to +150
°C
Storage Temperature Range
Tstg
−65 to +150
°C
Input−Output Voltage Differential
Power Dissipation
Case 221A
TA = +25°C
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case
Case 936 (D2PAK−3)
TA = +25°C
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
ELECTRICAL CHARACTERISTICS
(VI−VO = 5.0 V; IO = 0.5 A for D2T and T packages; TJ = Tlow to Thigh (Note 1); Imax and Pmax (Note 2); unless otherwise noted.)
Characteristics
Figure
Symbol
Min
Typ
Max
Unit
−
0.01
0.04
%/V
−
−
5.0
0.1
25
0.5
mV
% VO
Line Regulation (Note 3), TA = +25°C, 3.0 V ≤ VI−VO ≤ 40 V
1
Regline
Load Regulation (Note 3), TA = +25°C, 10 mA ≤ IO ≤ Imax
VO ≤ 5.0 V
VO ≥ 5.0 V
2
Regload
Thermal Regulation, TA = +25°C (Note 4), 20 ms Pulse
−
Regtherm
−
0.03
0.07
% VO/W
Adjustment Pin Current
3
IAdj
−
50
100
mA
1, 2
DIAdj
−
0.2
5.0
mA
Adjustment Pin Current Change, 2.5 V ≤ VI−VO ≤ 40 V,
10 mA ≤ IL ≤ Imax, PD ≤ Pmax
Reference Voltage, 3.0 V ≤ VI−VO ≤ 40 V, 10 mA ≤ IO ≤ Imax, PD ≤ Pmax
3
Vref
1.2
1.25
1.3
V
Line Regulation (Note 3), 3.0 V ≤ VI−VO ≤ 40 V
1
Regline
−
0.02
0.07
%/V
Load Regulation (Note 3), 10 mA ≤ IO ≤ Imax
VO ≤ 5.0 V
VO ≥ 5.0 V
2
Regload
−
−
20
0.3
70
1.5
mV
% VO
Temperature Stability (Tlow ≤ TJ ≤ Thigh)
3
TS
−
0.7
−
% VO
Minimum Load Current to Maintain Regulation (VI−VO = 40 V)
3
ILmin
−
3.5
10
mA
Maximum Output Current
VI−VO ≤ 15 V, PD ≤ Pmax, T Package
VI−VO = 40 V, PD ≤ Pmax, TA = +25°C, T Package
3
Imax
1.5
0.15
2.2
0.4
−
−
RMS Noise, % of VO, TA = +25°C, 10 Hz ≤ f ≤ 10 kHz
−
N
−
0.003
−
Ripple Rejection, VO = 10 V, f = 120 Hz (Note 5)
Without CAdj
CAdj = 10 mF
4
RR
−
66
65
80
−
−
Thermal Shutdown (Note 6)
−
−
−
180
−
°C
Long−Term Stability, TJ = Thigh (Note 7), TA = +25°C for
Endpoint Measurements
3
S
−
0.3
1.0
%/1.0
kHrs.
Thermal Resistance Junction−to−Case, T Package
−
RqJC
−
5.0
−
°C/W
A
% VO
dB
1. Tlow to Thigh = 0° to +125°C, for LM317T, D2T. Tlow to Thigh = − 40° to +125°C, for LM317BT, BD2T, Tlow to Thigh = − 55° to +150°C, for
NCV317BT, BD2T.
2. Imax = 1.5 A, Pmax = 20 W
3. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
4. Power dissipation within an IC voltage regulator produces a temperature gradient on the die, affecting individual IC components on the die.
These effects can be minimized by proper integrated circuit design and layout techniques. Thermal Regulation is the effect of these
temperature gradients on the output voltage and is expressed in percentage of output change per watt of power change in a specified time.
5. CAdj, when used, is connected between the adjustment pin and ground.
6. Thermal characteristics are not subject to production test.
7. Since Long−Term Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average
stability from lot to lot.
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LM317, NCV317
Vin
310
310
230
5.6 k
120
6.3 V
170
12 k
6.7 k
160
13 k
5.0 pF
12.4 k
125 k
200
135
6.8 k
510
6.3 V
30pF
30pF
2.4 k
105
6.3 V
190
3.6 k 5.8 k 110
4.0
12.5 k
5.1 k
0.1
Vout
Adjust
This device contains 29 active transistors.
Figure 2. Representative Schematic Diagram
VCC
VIH
VIL
*
LineRegulation(%ńV) +
|V
–V |
OH OL
x100
|V |
OL
VOH
VOL
Vout
Vin
LM317
*Pulse testing required.
*1% Duty Cycle
*is suggested.
Adjust
Cin
0.1 mF
R1
IAdj
240
1%
+
CO
1.0 mF
R2
1%
Figure 3. Line Regulation and DIAdj/Line Test Circuit
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RL
LM317, NCV317
VI
Vin
Vout
IL
LM317
Adjust
RL
(max Load)
240
1%
R1
*
+
Cin
0.1 mF
RL
(min Load)
1.0 mF
CO
IAdj
VO (min Load)
VO (max Load)
*Pulse testing required.
*1% Duty Cycle is suggested.
R2
1%
Load Regulation (% VO) =
Load Regulation (mV) = VO (min Load) - VO (max Load)
VO (min Load) - VO (max Load)
VO (min Load)
x 100
Figure 4. Load Regulation and DIAdj/Load Test Circuit
Vout
Vin
IL
LM317
Adjust
R1
VI
IAdj
Cin
240
1%
Vref
RL
+
0.1 mF
CO
1.0 mF
VO
ISET
R2
1%
* Pulse testing required.
* 1% Duty Cycle is suggested.
To Calculate R2: Vout = ISET R2 + 1.250 V
To Calculate R2: Assume ISET = 5.25 mA
Figure 5. Standard Test Circuit
24 V
Vout
Vin
14 V
f = 120 Hz
LM317
Adjust
Cin
240
1%
R1
D1*
1N4002
0.1 mF
CO
R2
+
1.65 k
1%
CAdj
RL
+
1.0 mF
10 mF
*D1 Discharges CAdj if output is shorted to Ground.
Figure 6. Ripple Rejection Test Circuit
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Vout = 10 V
VO
LM317, NCV317
0.4
I out , OUTPUT CURRENT (A)
ΔVout, OUTPUT VOLTAGE CHANGE (%)
4.0
0.2
IL = 0.5 A
0
-0.2
IL = 1.5 A
-0.4
Vin = 15 V
Vout = 10 V
-0.6
3.0
TJ = 25°C
2.0
150°C
-55°C
1.0
-0.8
-1.0
0
-50
-25
0
25
50
75
100
TJ, JUNCTION TEMPERATURE (°C)
125
0
150
10
20
30
Vin-Vout, INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc)
Figure 7. Load Regulation
40
Figure 8. Current Limit
V in-Vout, INPUT-OUTPUT VOLTAGE
DIFFERENTIAL (Vdc)
70
65
60
55
50
45
40
35
-50
-25
0
25
50
75
100
125
150
Vref, REFERENCE VOLTAGE (V)
1.0 A
2.0
500 mA
1.5
200 mA
20 mA
-50
-25
0
25
50
75
100
TJ, JUNCTION TEMPERATURE (°C)
Figure 9. Adjustment Pin Current
Figure 10. Dropout Voltage
1.25
1.24
1.23
-50
IL = 1.5 A
2.5
TJ, JUNCTION TEMPERATURE (°C)
1.26
1.22
DVout = 100 mV
1.0
ILmin , MINIMUM OPERATING CURRENT (mA)
I Adj, ADJUSTMENT PIN CURRENT ( μA)
3.0
-25
0
25
50
75 100 125
TJ, JUNCTION TEMPERATURE (°C)
150
125
150
5.0
4.5
TJ = -55°C
4.0
+25°C
3.5
+150°C
3.0
2.5
2.0
1.5
1.0
0.5
0
0
Figure 11. Temperature Stability
10
20
30
40
Vin-Vout, INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc)
Figure 12. Minimum Operating Current
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LM317, NCV317
100
120
RR, RIPPLE REJECTION (dB)
RR, RIPPLE REJECTION (dB)
CAdj = 10 mF
80
Without CAdj
60
40
Vin - Vout = 5 V
IL = 500 mA
f = 120 Hz
TJ = 25°C
20
100
5.0
10
15
20
25
30
40
20
1.0
10
IO, OUTPUT CURRENT (A)
Figure 13. Ripple Rejection versus Output
Voltage
Figure 14. Ripple Rejection versus
Output Current
101
Z O, OUTPUT IMPEDANCE ()
Ω
RR, RIPPLE REJECTION (dB)
0.1
Vout, OUTPUT VOLTAGE (V)
80
IL = 500 mA
Vin = 15 V
Vout = 10 V
TJ = 25°C
60
40
20
CAdj = 10 mF
Without CAdj
Vin = 15 V
Vout = 10 V
IL = 500 mA
TJ = 25°C
100
10-1
Without CAdj
10-2
CAdj = 10 mF
10-3
0
10
100
1.0 k 10 k
100 k
1.0 M 10 M
10
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
Figure 15. Ripple Rejection versus Frequency
Figure 16. Output Impedance
1.5
1.0
CL = 1.0 mF;
CAdj = 10 mF
0.5
0
1.0 M
3.0
2.0
1.0
0
CL = 1.0 mF;
CAdj = 10 mF
-1.0
Vin = 15 V
Vout = 10 V
INL = 50 mA
TJ = 25°C
-2.0
-0.5
Vout = 10 V
IL = 50 mA
TJ = 25°C
-1.5
1.0
Vin
0.5
0
10
CL = 0;
Without CAdj
-3.0
CL = 0;
Without CAdj
IL , LOAD
CURRENT (A)
-1.0
0
100
f, FREQUENCY (Hz)
ΔVout , OUTPUT
VOLTAGE DEVIATION (V)
ΔVout , OUTPUT
VOLTAGE DEVIATION (V)
Vin = 15 V
Vout = 10 V
f = 120 Hz
TJ = 25°C
0
0.01
35
100
ΔV in , INPUT
VOTLAGE CHANGE (V)
Without CAdj
60
0
0
CAdj = 10 mF
80
20
30
40
1.5
1.0
IL
0.5
0
0
10
20
30
t, TIME (ms)
t, TIME (ms)
Figure 17. Line Transient Response
Figure 18. Load Transient Response
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40
LM317, NCV317
APPLICATIONS INFORMATION
Basic Circuit Operation
External Capacitors
The LM317 is a 3−terminal floating regulator. In
operation, the LM317 develops and maintains a nominal
1.25 V reference (Vref) between its output and adjustment
terminals. This reference voltage is converted to a
programming current (IPROG) by R1 (see Figure 17), and this
constant current flows through R2 to ground.
The regulated output voltage is given by:
A 0.1 mF disc or 1.0 mF tantalum input bypass capacitor
(Cin) is recommended to reduce the sensitivity to input line
impedance.
The adjustment terminal may be bypassed to ground to
improve ripple rejection. This capacitor (CAdj) prevents
ripple from being amplified as the output voltage is
increased. A 10 mF capacitor should improve ripple
rejection about 15 dB at 120 Hz in a 10 V application.
Although the LM317 is stable with no output capacitance,
like any feedback circuit, certain values of external
capacitance can cause excessive ringing. An output
capacitance (CO) in the form of a 1.0 mF tantalum or 25 mF
aluminum electrolytic capacitor on the output swamps this
effect and insures stability.
ǒ
Ǔ
R
V out + V 1 ) 2 ) I R 2
ref
Adj
R1
Since the current from the adjustment terminal (IAdj)
represents an error term in the equation, the LM317 was
designed to control IAdj to less than 100 mA and keep it
constant. To do this, all quiescent operating current is
returned to the output terminal. This imposes the
requirement for a minimum load current. If the load current
is less than this minimum, the output voltage will rise.
Since the LM317 is a floating regulator, it is only the
voltage differential across the circuit which is important to
performance, and operation at high voltages with respect to
ground is possible.
Vout
Vin
LM317
Protection Diodes
When external capacitors are used with any IC regulator
it is sometimes necessary to add protection diodes to prevent
the capacitors from discharging through low current points
into the regulator.
Figure 18 shows the LM317 with the recommended
protection diodes for output voltages in excess of 25 V or
high capacitance values (CO > 25 mF, CAdj > 10 mF). Diode
D1 prevents CO from discharging thru the IC during an input
short circuit. Diode D2 protects against capacitor CAdj
discharging through the IC during an output short circuit.
The combination of diodes D1 and D2 prevents CAdj from
discharging through the IC during an input short circuit.
Vout
+
R1
Vref
Adjust
IAdj
Vref = 1.25 V Typical
IPROG
D1
R2
Vout
1N4002
Vin
Figure 19. Basic Circuit Configuration
Vout
LM317
+
Cin
Load Regulation
R1
D2
Adjust
The LM317 is capable of providing extremely good load
regulation, but a few precautions are needed to obtain
maximum performance. For best performance, the
programming resistor (R1) should be connected as close to
the regulator as possible to minimize line drops which
effectively appear in series with the reference, thereby
degrading regulation. The ground end of R2 can be returned
near the load ground to provide remote ground sensing and
improve load regulation.
CO
1N4002
R2
CAdj
Figure 20. Voltage Regulator with Protection Diodes
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7
3.5
PD(max) for TA = +50°C
JUNCTION‐TO‐AIR (°C/W)
R θ JA, THERMAL RESISTANCE
80
70
3.0
Free Air
Mounted
Vertically
60
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
2.0 oz. Copper
L
Minimum
Size Pad
50
2.5
2.0
L
40
1.5
RqJA
1.0
30
30
0
5.0
10
15
20
L, LENGTH OF COPPER (mm)
PD, MAXIMUM POWER DISSIPATION (W)
LM317, NCV317
25
Figure 21. D2PAK Thermal Resistance and Maximum
Power Dissipation versus P.C.B. Copper Length
D6*
1N4002
Vin
32 V to 40 V
Vin1
Vin2
Vout1 RSC
LM317
(1)
Vout
240
0.1 mF
D1
1N4001
Adjust 1
Current
Limit
Adjust
* Diodes D1 and D2 and transistor Q2 are added to
* allow adjustment of output voltage to 0 V.
* D6 protects both LM317's during an input short circuit.
1.0K
Adjust 2
D2
1N4001
5.0 k
Iout
Vout 2
LM317
(2)
D5
IN4001
+
Voltage
Adjust
+
1.0 mF
Tantalum
10 mF
1N4001
Q1
2N3822
D3
D4
-10 V
Q2
2N5640
Output Range:0 ≤ VO ≤ 25 V
Output Range:0 ≤ IO ≤ 1.5 A
IN4001
-10 V
Figure 22. ‘‘Laboratory’’ Power Supply with Adjustable Current Limit and Output Voltage
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LM317, NCV317
Vout
+25 V
LM317
Vin
D1*
R1
Iout
1.25
1N4002
Vin
Adjust
D1
1N4001
R2
100
Vref
IOmax + IDSS
R2 ≤
Adjust
MPS2222
720
1.0 k
2N5640
IDDS
Minimum Vout = 1.25 V
VSS*
* D1 protects the device during an input short circuit.
Figure 23. Adjustable Current Limiter
Figure 24. 5.0 V Electronic Shutdown Regulator
Vin
Vout
LM317
Vout
R1
Iout
LM317
240
1N4001
Adjust
50 k
Adjust
R2
TTL
Control
Vref
VO < BVDSS + 1.25 V + VSS,
ILmin - IDSS < IO < 1.5 A.
As shown 0 < IO < 1.0 A.
Vin
+
1.0 mF
120
D2
1N4001
* To provide current limiting of IO to the system
* ground, the source of the FET must be tied to a
* negative voltage below - 1.25 V.
R1 =
Vout
LM317
MPS2907
+
IAdj
ǒ Ǔ
V
ref ) I
Adj
R1
1.25V
+
R1
10 mA ≤ Iout ≤ 1.5 A
I out +
10 mF
Figure 25. Slow Turn−On Regulator
Figure 26. Current Regulator
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LM317, NCV317
ORDERING INFORMATION
Operating
Temperature Range
Device
Package
D2PAK−3
LM317BD2TG
(Pb−Free)
Shipping†
50 Units / Rail
D2PAK−3
(Pb−Free)
800 Tape & Reel
LM317BTG
TO−220
(Pb−Free)
50 Units / Rail
LM317D2TG
D2PAK−3
(Pb−Free)
50 Units / Rail
D2PAK−3
(Pb−Free)
800 Tape & Reel
LM317TG
TO−220
(Pb−Free)
50 Units / Rail
NCV317BD2TG*
D2PAK−3
(Pb−Free)
50 Units / Rail
D2PAK−3
(Pb−Free)
800 Tape & Reel
TO−220
(Pb−Free)
50 Units / Rail
LM317BD2TR4G
TJ = −40° to +125°C
LM317D2TR4G
TJ = 0° to +125°C
NCV317BD2TR4G*
TJ = −55° to +150°C
NCV317BTG*
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
MARKING DIAGRAMS
D2PAK−3
D2T SUFFIX
CASE 936
LM
317BD2T
AWLYWWG
LM
317D2T
AWLYWWG
2
1
A
WL
Y
WW
G
TO−220
T SUFFIX
CASE 221A
NC
V317BD2T
AWLYWWG
2
3
1
2
3
1
LM
317BT
AWLYWWG
LM
317T
AWLYWWG
NC
V317BT
AWLYWWG
1 2 3
1 2 3
1 2 3
3
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−220, SINGLE GAUGE
CASE 221AB−01
ISSUE A
−T−
B
F
T
SCALE 1:1
SEATING
PLANE
C
S
DATE 16 NOV 2010
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND
LEAD IRREGULARITIES ARE ALLOWED.
4. PRODUCT SHIPPED PRIOR TO 2008 HAD DIMENSIONS
S = 0.045 - 0.055 INCHES (1.143 - 1.397 MM)
4
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
A
Q
U
1 2 3
H
K
Z
L
R
V
J
G
D
N
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.018
0.025
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.020
0.024
0.235
0.255
0.000
0.050
0.045
----0.080
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.46
0.64
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
0.508
0.61
5.97
6.47
0.00
1.27
1.15
----2.04
STYLE 1:
PIN 1.
2.
3.
4.
BASE
COLLECTOR
EMITTER
COLLECTOR
STYLE 2:
PIN 1.
2.
3.
4.
BASE
EMITTER
COLLECTOR
EMITTER
STYLE 3:
PIN 1.
2.
3.
4.
CATHODE
ANODE
GATE
ANODE
STYLE 4:
PIN 1.
2.
3.
4.
MAIN TERMINAL 1
MAIN TERMINAL 2
GATE
MAIN TERMINAL 2
STYLE 5:
PIN 1.
2.
3.
4.
GATE
DRAIN
SOURCE
DRAIN
STYLE 6:
PIN 1.
2.
3.
4.
ANODE
CATHODE
ANODE
CATHODE
STYLE 7:
PIN 1.
2.
3.
4.
CATHODE
ANODE
CATHODE
ANODE
STYLE 8:
PIN 1.
2.
3.
4.
CATHODE
ANODE
EXTERNAL TRIP/DELAY
ANODE
STYLE 9:
PIN 1.
2.
3.
4.
GATE
COLLECTOR
EMITTER
COLLECTOR
STYLE 10:
PIN 1.
2.
3.
4.
GATE
SOURCE
DRAIN
SOURCE
STYLE 11:
PIN 1.
2.
3.
4.
DRAIN
SOURCE
GATE
SOURCE
DOCUMENT NUMBER:
DESCRIPTION:
98AON23085D
TO−220, SINGLE GAUGE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
D2PAK
CASE 936−03
ISSUE E
DATE 29 SEP 2015
SCALE 1:1
T
C
A
K
B
J
C
ES
OPTIONAL
CHAMFER
DETAIL C
DETAIL C
3
F
G
SIDE VIEW
2X
TOP VIEW
D
0.010 (0.254)
N
DUAL GAUGE
CONSTRUCTION
P
BOTTOM VIEW
SIDE VIEW
SINGLE GAUGE
CONSTRUCTION
T
M
M
R
T
V
H
2
U
ED
OPTIONAL
CHAMFER
S
1
TERMINAL 4
T
SEATING
PLANE
L
BOTTOM VIEW
DETAIL C
OPTIONAL CONSTRUCTIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCHES.
3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS
A AND K.
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 4.
5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED
0.025 (0.635) MAXIMUM.
6. SINGLE GAUGE DESIGN WILL BE SHIPPED AF
TER FPCN EXPIRATION IN OCTOBER 2011.
DIM
A
B
C
D
ED
ES
F
G
H
J
K
L
M
N
P
R
S
U
V
INCHES
MIN
MAX
0.386
0.403
0.356
0.368
0.170
0.180
0.026
0.036
0.045
0.055
0.018
0.026
0.051 REF
0.100 BSC
0.539
0.579
0.125 MAX
0.050 REF
0.000
0.010
0.088
0.102
0.018
0.026
0.058
0.078
0_
8_
0.116 REF
0.200 MIN
0.250 MIN
MILLIMETERS
MIN
MAX
9.804 10.236
9.042
9.347
4.318
4.572
0.660
0.914
1.143
1.397
0.457
0.660
1.295 REF
2.540 BSC
13.691 14.707
3.175 MAX
1.270 REF
0.000
0.254
2.235
2.591
0.457
0.660
1.473
1.981
0_
8_
2.946 REF
5.080 MIN
6.350 MIN
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
10.490
XXXXXXG
ALYWW
8.380
16.155
XXXXXX = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
WW
= Work Week
G
= Pb−Free Package
2X
3.504
2X
1.016
5.080
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ASH01005A
D2PAK
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
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, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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