NCV47822PAAJR2G

NCV47822 Dual High Side Switch with Adjustable Current Limit and Diagnostic Features The NCV47822 dual channel High Side Switch (HSS) with 250 mA per channel is designed for use in harsh automotive environments. The device has a high peak input voltage tolerance and reverse input voltage, reverse bias, overcurrent and overtemperature protections. The integrated current sense feature (adjustable by resistor connected to CSO pin for each channel) provides diagnosis and system protection functionality. The CSO pin output current creates voltage drop across CSO resistor which is proportional to output current of each channel. Extended diagnostic features in OFF state are also available and controlled by dedicated input and output pins. Features • • • • • • • Output Current per Channel: up to 250 mA Two Independent Enable Inputs (3.3 V Logic Compatible) Adjustable Current Limits: up to 350 mA Protection Features: ♦ Current Limitation ♦ Thermal Shutdown ♦ Reverse Input Voltage and Reverse Bias Voltage Diagnostic Features: ♦ Short To Battery (STB) and Open Load (OL) in OFF State ♦ Internal Components for OFF State Diagnostics ♦ Open Collector Flag Output ♦ Two Output Voltage Monitoring Outputs (Analog) AEC−Q100 Grade 1 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant www.onsemi.com MARKING DIAGRAM 14 NCV4 7822 ALYWG G TSSOP−14 Exposed Pad CASE 948AW 14 1 1 A L Y W G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. Typical Applications • Audio and Infotainment System • Active Safety System Cin Vin Vout1 EN1 Vout_FB1 CSO1 1 μF Proportional Voltage to V out1* C CSO1 Diagnostic Enable Input DE R CSO1 1 μF NCV47822 (Dual HSS) Error Flag Output (Open Collector) EF Diagnostic Channel Select Input CS Cout1 1 μF Vout2 Proportional Voltage to V out2* Vout_FB2 CSO2 EN2 GND Cout2 1 μF C CSO2 R CSO2 1 μF * Vout_FB1 and Vout_FB2 are sensed Vout1 and Vout2 output voltages, respectively, via internal resistor dividers Figure 1. Application Schematic (See Application Section for More Details) © Semiconductor Components Industries, LLC, 2016 May, 2016 − Rev. 0 1 Publication Order Number: NCV47822/D NCV47822 IPU1 10 mA IPU1_ON Vin Vout1 ICSO1 = Iout1 / RATIO* VOLTAGE REFERENCE EN1 RPD_EN1 780 kΩ ENABLE VREF VREF _OFF EN1 PASS DEVICE 1 AND CURRENT MIRROR + VREF 2.55 V − CSO1 SATURATION PROTECTION + THERMAL SHUTDOWN OC1_ON − PD1_ON 0.95x V REF RPD11 500 kΩ + STB1_OL1_OFF DE CS RPD_CS 780 kΩ EN1 EN2 − IPU1_ON IPU2_ON RPD_DE DIAGNOSTIC 780 kΩ CONTROL LOGIC Vout_FB1 RPD12 100 kΩ VREF_OFF PD1_ON PD2_ON EF OC1_ON OC2_ON STB1_OL1_OFF STB2_OL2_OFF IPU2 10 mA IPU2_ON Vin Vout2 ICSO2 = Iout2 / RATIO* EN2 RPD_EN2 780 kΩ PASS DEVICE 2 AND CURRENT MIRROR ENABLE EN2 + VREF 2.55 V − CSO2 SATURATION PROTECTION + THERMAL SHUTDOWN OC2_ON − PD2_ON 0.95x V REF RPD21 500 kΩ STB2_OL2_OFF GND + − *) for current value of RATIO see into Electrical Characteristic Table Figure 2. Simplified Block Diagram www.onsemi.com 2 Vout_FB2 RPD22 100 kΩ VREF_OFF NCV47822 1 14 V in V out1 Vout_FB1 CSO1 CS EN1 EPAD GND EF DE EN2 Vout_FB2 CSO2 V in V out2 TSSOP−14 EPAD (Top View) Figure 3. Pin Connections Table 1. PIN FUNCTION DESCRIPTION Pin No. TSSOP−14 EPAD Pin Name 1 Vin 2 CSO1 3 EN1 Enable Input 1; low level disables the Channel 1. (Used also for OFF state diagnostics control for Channel 1) 4 GND Power Supply Ground. 5 EN2 Enable Input 2; low level disables the Channel 2. (Used also for OFF state diagnostics control for Channel 2) 6 CSO2 Description Power Supply Input for Channel 1 and supply of control circuits of whole chip. At least 4.4 V power supply must be used for proper IC functionality. Current Sense Output 1, Current Limit setting and Output Current value information. See Application Section for more details. Current Sense Output 2, Current Limit setting and Output Current value information. See Application Section for more details. 7 Vin 8 Vout2 Power Supply Input for Channel 2. Connect to pin 1 or different power supply rail. 9 Vout_FB2 10 DE Diagnostic Enable Input. 11 EF Error Flag (Open Collector) Output. Active Low. 12 CS Channel Select Input for OFF state diagnostics. Set CS = Low for OFF state diagnostics of Channel 1. Set CS = High for OFF state diagnostics of Channel 2. Corresponding EN pin has to be used for diagnostics control (see Application Information section for more details). 13 Vout_FB1 14 Vout1 Output Voltage 1. EPAD EPAD Exposed Pad is connected to Ground. Connect to GND plane on PCB. Output Voltage 2. Output Voltage 2 Analog Monitoring. See Application Section for more details. Output Voltage 1 Analog Monitoring. See Application Section for more details. www.onsemi.com 3 NCV47822 Table 2. MAXIMUM RATINGS Rating Symbol Min Max Unit Input Voltage DC Vin −42 45 V Input Voltage (Note 1) Load Dump − Suppressed Us* − 60 VEN1,2 −42 45 V Vout_FB1,2 −0.3 10 V VCSO1,2 −0.3 7 V VDE, VCS, VEF −0.3 7 V Vout1,2 −1 40 V Junction Temperature TJ −40 150 °C Storage Temperature TSTG −55 150 °C Enable Input Voltage Output Voltage Monitoring CSO Voltage DE, CS and EF Voltages Output Voltage V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Load Dump Test B (with centralized load dump suppression) according to ISO16750−2 standard. Guaranteed by design. Not tested in production. Passed Class A according to ISO16750−1. Table 3. ESD CAPABILITY (Note 2) Rating ESD Capability, Human Body Model Symbol Min Max Unit ESDHBM −2 2 kV 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC−Q100−002 (JS−001−2010) Field Induced Charge Device Model ESD characterization is not performed on plastic molded packages with body sizes < 50 mm2 due to the inability of a small package body to acquire and retain enough charge to meet the minimum CDM discharge current waveform characteristic defined in JEDEC JS−002−2014. Table 4. MOISTURE SENSITIVITY LEVEL (Note 3) Symbol Rating Moisture Sensitivity Level Min MSL Max 1 Unit − 3. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D THERMAL CHARACTERISTICS (Note 4) Symbol Rating Value Unit °C/W Thermal Characteristics (single layer PCB) Thermal Resistance, Junction−to−Air (Note 5) Thermal Reference, Junction−to−Lead (Note 5) RθJA RψJL 52 9.0 Thermal Characteristics (4 layers PCB) Thermal Resistance, Junction−to−Air (Note 5) Thermal Reference, Junction−to−Lead (Note 5) RθJA RψJL 31 10 °C/W 4. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 5. Values based on copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate. Single layer − according to JEDEC51.3, 4 layers − according to JEDEC51.7 Table 5. RECOMMENDED OPERATING RANGES Rating Input Voltage (Note 6) Output Current Limit (Note 7) Junction Temperature Current Sense Output (CSO) Capacitor Symbol Min Max Unit Vin 4.4 40 V ILIM1,2 10 350 mA TJ −40 150 °C CCSO1,2 1 4.7 mF Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 6. Minimum Vin = 4.4 V or (Vout1,2 + 0.5 V), whichever is higher. 7. Corresponding RCSO1,2 is in range from 76.5 kW down to 2185 W. www.onsemi.com 4 NCV47822 Table 6. ELECTRICAL CHARACTERISTICS Vin = 13.5 V, VEN1,2 = 3.3 V, VDE = 0 V, RCSO1,2 = 0 W, CCSO1,2 = 1 mF, Cin = 1 mF, Cout1,2 = 1 mF, Min and Max values are valid for temperature range −40°C v TJ v +150°C unless noted otherwise and are guaranteed by test, design or statistical correlation. Typical values are referenced to TJ = 25°C (Note 8) Parameter Test Conditions Symbol Min Typ Max − − 210 230 350 400 Unit OUTPUTS Input to Output Differential Voltage Vin = 8 V to 18 V Iout1,2 = 200 mA Iout1,2 = 250 mA Vin−out1,2 mV Vout1,2 = Vin − 1 V ILIM1,2 350 − − mA IDIS − 0.005 10 mA CURRENT LIMIT PROTECTION Current Limit DISABLE AND QUIESCENT CURRENTS Disable Current VEN1,2 = 0 V Quiescent Current, Iq = Iin − (Iout1 +Iout2) Iout1 = Iout2 = 500 mA, Vin = 8 V to 18 V Iq − 0.85 1.5 mA Quiescent Current, Iq = Iin – (Iout1 +Iout2) Iout1 = Iout2 = 200 mA, Vin = 8 V to 18 V Iq − 15 25 mA Quiescent Current, Iq = Iin – (Iout1 +Iout2) Iout1 = Iout2 = 250 mA, Vin = 8 V to 18 V Iq − 20 40 mA 0.99 − 1.8 1.9 − 2.31 2 7 20 − 25 − 2.448 (−4%) 2.55 2.652 (+4%) − − 3.3 − (−15%) 265 − (+15%) − (−5%) 285 − (+5%) ICSO_off1,2 − − 15 mA % of VCSO_ ENABLE Enable Input Threshold Voltage Logic Low (OFF) Logic High (ON) Vout1,2 v 0.1 V Vout1,2 w Vin − 1 V Enable Input Current VEN1,2 = 3.3 V Turn On Time from Enable ON to Vout1,2 = Vin − 1 V Iout1,2 = 100 mA Vth(EN1,2) IEN1,2 V mA ms ton OUTPUT CURRENT SENSE CSO Voltage Level at Current Limit Vout1,2 = Vin − 1 V RCSO1,2 = 3.3 kW CSO Transient Voltage Level CCSO1,2 = 4.7 mF, RCSO1,2 = 3.3 kW, Iout1,2 pulse from 10 mA to 350 mA, tr = 1 ms VCSO1,2 VCSO1,2 = 2 V, Iout1,2 = 10 mA to 50 mA Vin = 8 V to 18 V, −40°C v TJ v +150°C) Iout1,2/ ICSO1,2 Output Current to CSO Current Ratio VCSO_Ilim1,2 VCSO1,2 = 2 V, Iout1,2 = 50 mA to 350 mA Vin = 8 V to 18 V, −40°C v TJ v +150°C) CSO Current at no Load Current VCSO1,2 = 0 V, Iout1,2 = 0 mA V V − DIAGNOSTICS Overcurrent Voltage Level Threshold Vout1,2 = Vin − 1 V, RCSO1,2 = 3.3 kW VOC1,2 92 95 98 Short To Battery (STB) Voltage Threshold in OFF state Vin = 4.4 V to 18 V, Iout1 = Iout2 = 0 mA, VDE = 3.3 V VSTB1,2 2 3 4 V Open Load (OL) Current Threshold in OFF state Vin = 4.4 V to 18 V, VDE = 3.3 V IOL1,2 5.0 10 25 mA Output Voltage to Output Feedback Voltage Ratio Vin = 4.4 V to 18 V Vout1,2/ Vout_FB1,2 5.7 6.0 6.3 − 0.99 − 1.8 1.9 − 2.31 0.99 − 1.8 1.9 − 2.31 − 0.04 0.4 Ilim1,2 Diagnostics Enable Threshold Voltage Logic Low Logic High Vth(DE) Channel Select Threshold Voltage Logic Low Logic High Vth(CS) Error Flag Low Voltage IEF = −1 mA VEF_Low V V V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 8. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [ TJ. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 9. Values based on design and/or characterization. www.onsemi.com 5 NCV47822 Table 6. ELECTRICAL CHARACTERISTICS Vin = 13.5 V, VEN1,2 = 3.3 V, VDE = 0 V, RCSO1,2 = 0 W, CCSO1,2 = 1 mF, Cin = 1 mF, Cout1,2 = 1 mF, Min and Max values are valid for temperature range −40°C v TJ v +150°C unless noted otherwise and are guaranteed by test, design or statistical correlation. Typical values are referenced to TJ = 25°C (Note 8) Parameter Test Conditions Symbol Min Typ Max Unit TSD1,2 150 175 195 °C THERMAL SHUTDOWN Thermal Shutdown Temperature (Note 9) Iout1 = Iout2 = 90 mA, each channel measured separately Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 8. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [ TJ. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 9. Values based on design and/or characterization. www.onsemi.com 6 NCV47822 TYPICAL CHARACTERISTICS 400 350 Vin = 13.5 V 300 250 Iout1,2 = 200 mA 200 150 Iout1,2 = 15 mA 100 50 Vin = 13.5 V 350 TJ = 150°C 300 TJ = 25°C 250 200 150 TJ = −40°C 100 50 0 0 20 60 40 80 100 120 140 160 0 50 100 150 200 250 300 350 TJ, JUNCTION TEMPERATURE (°C) Iout1,2, OUTPUT CURRENT (mA) Figure 4. Input to Output Differential vs. Temperature Figure 5. Input to Output Diff. vs. Output Current 900 400 0 850 TJ = 150°C 800 750 TJ = −40°C 700 650 600 550 500 0 5 10 15 TJ = 25°C Rout1,2 = 3.3 kW TJ = 25°C Vout1,2 = (Vin − 1 V) V Iin, INPUT CURRENT (mA) ILIM1,2, OUTPUT CURRENT LIMIT (mA) 0 −40 −20 20 25 30 35 40 −1 −2 −3 −4 −5 −6 −45 −40 45 −35 −30 −25 −20 −10 −15 −5 VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) Figure 6. Output Current Limit vs. Input Voltage Figure 7. Output Voltage vs. Input Voltage (Reverse Input Voltage) 400 0 3.0 350 VCSO1,2, CSO VOLTAGE (V) ILIM1,2, OUTPUT CURRENT LIMIT (mA) Iout1,2 = 350 mA Vin−out1,2, INPUT TO OUTPUT DIFFERENTIAL VOLTAGE (mV) Vin−out1,2, INPUT TO OUTPUT DIFFERENTIAL VOLTAGE (mV) 400 300 250 200 150 100 50 TJ = −40°C to 150°C ILIM1,2, = 10 mA to 350 mA 2.5 2.0 1.5 1.0 0.5 0 0 0 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 10 20 30 40 50 60 70 80 90 100 110 RCSO1,2 (kW) Iout1,2, OUTPUT CURRENT (% of ILIM1,2) Figure 8. Output Current Limit vs. RCSO (Calculated Using E24 Series) Figure 9. Output Current (% of ILIM) vs. CSO Voltage www.onsemi.com 7 NCV47822 TYPICAL CHARACTERISTICS 40 1.5 Iq, QUIESCENT CURRENT (mA) TJ = 25°C Vin = 13.5 V 1.5 1.3 1.2 1.1 1.0 0.9 0.8 0.7 TJ = 25°C Vin = 13.5 V 35 30 25 20 15 10 5 0 0 5 10 20 15 0 50 100 150 200 250 300 Iout1,2, OUTPUT CURRENT (mA) Iout1,2, OUTPUT CURRENT (mA) Figure 10. Quiescent Current vs. Output Current (Low Load) Figure 11. Quiescent Current vs. Output Current (High Load) Iout1,2/ICSO1,2, OUTPUT CURRENT TO CSO CURRENT RATIO (−) Iq, QUIESCENT CURRENT (mA) 1.6 310 305 300 295 TJ = 25°C Vin = 13.5 V 290 285 280 275 270 265 260 255 250 10 100 Iout1,2, OUTPUT CURRENT (mA) Figure 12. ICSO Current vs. Output Current Ratio www.onsemi.com 8 1000 350 NCV47822 DEFINITIONS General Current Limit All measurements are performed using short pulse low duty cycle techniques to maintain junction temperature as close as possible to ambient temperature. Current Limit is value of output current by which output voltage drops below 90% of its nominal value. Thermal Protection Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 175°C, the regulator turns off. This feature is provided to prevent failures from accidental overheating. Input to Output Differential Voltage The Input to Output Differential Voltage parameter is defined for specific output current values and specified over Temperature range. Quiescent and Disable Currents Quiescent Current (Iq) is the difference between the input current (measured through the LDO input pin) and the output load current. If Enable pin is set to LOW the regulator reduces its internal bias and shuts off the output, this term is called the disable current (IDIS). Maximum Package Power Dissipation The power dissipation level is maximum allowed power dissipation for particular package or power dissipation at which the junction temperature reaches its maximum operating value, whichever is lower. www.onsemi.com 9 NCV47822 APPLICATIONS INFORMATION Circuit Description CSO pin provides information about output current actual value. The CSO voltage is proportional to output current according to Equation 1. Once output current reaches its limit value (ILIM1,2) set by external resistor RCSO than voltage at CSO pin is typically 2.55 V. Calculations of ILIM1,2 or RCSO1,2 values can be done using equations Equation 2 and Equation 3, respectively. Minimum and maximum value of Output Current Limit can be calculated according Equation 4 and 5. The NCV47822 is an integrated dual High Side Switch (HSS) with output current capability up to 250 mA per each output. It is enabled with an input to the enable pin. The integrated current sense feature provides diagnosis and system protection functionality. The current limit of the device is adjustable by resistor connected to CSO pin. Voltage on CSO pin is proportional to output current. The HSS is protected by both current limit and thermal shutdown. Thermal shutdown occurs above 150°C to protect the IC during overloads and extreme ambient temperatures. I LIM1,2_min + RATIO min Enable Inputs I LIM1,2_max + RATIO max An enable pin is used to turn a channel on or off. By holding the pin down to a voltage less than 0.99 V, the output of the channel will be turned off. When the voltage on the enable pin is greater than 2.31 V, the output of the channel will be enabled to power its output to the regulated output voltage. The enable pins may be connected directly to the input pin to give constant enable to the output channel. The output current limit can be set up to 350 mA by external resistor RCSO1,2 (see Figure 1). Capacitor CCSO of 1 mF in parallel with RCSO is required for stability of current limit control circuitry (see Figure 1). ǒ I LIM1,2 + RATIO 1 R CSO1,2 + RATIO 1 1 RATIO Ǔ (eq. 1) 2.55 R CSO1,2 (eq. 2) 2.55 I LIM1,2 (eq. 3) V CSO1,2_max R CSO1,2_min (eq. 4) (eq. 5) where RATIOmin − minimum value of Output Current to CSO Current Ratio from electrical characteristics table and particular output current range RATIOmax − maximum value of Output Current to CSO Current Ratio from electrical characteristics table and particular output current range VCSO1,2_min ­ minimum value of CSO Voltage Level at Current Limit from electrical characteristics table VCSO1,2_max ­ maximum value of CSO Voltage Level at Current Limit from electrical characteristics table RCSO1,2_min − minimum value of RCSO1,2 with respect its accuracy RCSO1,2_max − maximum value of RCSO1,2 with respect its accuracy Designers should consider the tolerance of RCSO1,2 during the design phase. Setting the Output Current Limit V CSO1,2 + I out1,2 R CSO1,2 V CSO1,2_min R CSO1,2_max where RCSO1,2 − current limit setting resistor VCSO1,2 ­ voltage at CSO pin proportional to Iout1,2 ILIM1,2 − current limit value Iout1,2 − output current actual value RATIO − typical value of Output Current to CSO Current Ratio for particular output current range Diagnostic in OFF State The NCV47822 contains also circuitry for OFF state diagnostics for Short to Battery (STB) and Open Load (OL). There are internal current sources and Pull Down resistors which provide additional cost savings for overall application www.onsemi.com 10 NCV47822 by excluding external components and their assembly cost and saving PCB space and safe control IOs of a Microcontroller Unit (MCU). Simplified functional schematic and truth table is shown in Figure 13 and related flowchart in Figure 14. I PU Start Diag. OFF. Set EN = L & DE = L Diag. ON. Set EN = L & DE = H Current source enabled via EN and DE pins HZ PASS DEVICE is OFF in Diagnostics Mode in OFF state Vin Vout EF = ? L RPD1 + EN Comparator active only in Diagnostic state (DE = H). − VREF_OFF IPU ON. Set EN = H & DE = H RPD2 DE EF EN – Enable (Logic Input) DE – Diagnostics Enable(Logic Input) EF – Error Flag Output (Open Collector Output) EN L L DE IPU EF Vout L OFF HZ Unknown H OFF L V out > Vout_OFF Diagnostic Status/Action None (Diagnostics OFF) Short to Battery (STB) Check for Open Load (OL) L H OFF HZ V out < Vout_OFF H H ON H H ON L V out > Vout_OFF HZ Digital Diagnostics: to MCU’s digital input with pull−up resistor to MCU’s DIO supply rail No Failure EF = ? L Open Load Short to Battery Figure 14. Flowchart for Diagnostics in OFF State Open Load (OL) HZ V out < Vout_OFF No Failure (V out close to 0 V) The diagnostics in OFF state shall be performed for each channel separately. For diagnostics of Channel 1 the input CS pin has to be put logic low, for diagnostics of Channel 2 the input CS pin has to be put logic high. Corresponding EN pin has to be used for control (EN1 for Channel 1 and EN2 for Channel 2). Figure 13. Simplified Functional Diagram of OFF State Diagnostics (STB and OL) www.onsemi.com 11 NCV47822 Diagnostic in ON State Output Voltage Monitoring Diagnostic in ON State provides information about Overcurrent or Short to Ground failures, during which the EF output is in logic low state. The diagnostics in ON state shall be performed for each channel separately. For diagnostics of Channel 1 the input CS pin has to be put logic low, for diagnostics of Channel 2 the input CS pin has to be put logic high. For detailed information see Diagnostic Features Truth Table in Figure 15. The Output Voltage net is connected to internal resistor divider. Output of the resistor divider is connected to Vout_FB1,2 pin and provides information about Output Voltage Level according to Equation 4. V out_FB1,2 + V out1,2 6 (eq. 6) Figure 15. Diagnostic Features Truth Table 10. State of EN pin of appropriate channel 11. CS = L means CH1 diagnostics and CS = H means CH2 diagnostics in OFF state (DE = H) via EF output, appropriate EN pin is used for turning internal switch ON and OFF (e.g. when DE = H and CS = L and EN1 = L then IPU1 is OFF, when DE = H and CS = L and EN1 = H then IPU1 is ON) 12. Internal current source turned OFF (between Vout and Vin of appropriate channel) 13. Internal current source turned ON (between Vout and Vin of appropriate channel) 14. CS = L means CH1 diagnostics and CS = H means CH2 diagnostics in ON state (e.g. when CS = L and EF = L then CH1 has Overcurrent or Short to Ground failure, when CS = H and EF = L then CH1 has Overcurrent or Short to Ground failure) www.onsemi.com 12 NCV47822 130 RqJA, THERMAL RESISTANCE (°C/W) Thermal Considerations As power in the device increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. When the device has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power applications. The maximum dissipation the device can handle is given by: P D(MAX) + ƪTJ(MAX) * TAƫ 120 70 60 2 oz, Single Layer 50 40 1 oz, 4 Layer 30 20 2 oz, 4 Layer 100 200 300 400 500 COPPER HEAT SPREADER AREA 600 700 (mm2) Figure 16. Thermal Resistance vs. PCB Copper Area Hints Vin and GND printed circuit board traces should be as wide as possible. When the impedance of these traces is high, there is a chance to pick up noise or cause the regulator to malfunction. Place external components, especially the output capacitor, as close as possible to the device and make traces as short as possible. The Output Voltage Monitoring Output is high impedance output (see Figure 2) and during OFF state diagnostics it may be prone to couple a noise via PCB track or wire. Disturbing may appear as Error Flag Output oscillation when Output Voltage Level is close to Short to Battery threshold. To improve robustness connect capacitor (typically 10 nF) between each Vout_FB1,2pin and GND as close as possible to the Vout_FB1,2 pins. (eq. 8) or I out1Ǔ ) ǒV out2 1 oz, Single Layer 80 0 P D [ V inǒI q@I out1,2Ǔ ) I out1ǒV in−V out1Ǔ ) I out2ǒV in−V out2Ǔ V in(MAX) [ 90 (eq. 7) R qJA Since TJ is not recommended to exceed 150°C, then the device soldered on 645 mm2, 1 oz copper area, FR4 can dissipate up to 2.38 W when the ambient temperature (TA) is 25°C. See Figure 16 for RqJA versus PCB area. The power dissipated by the device can be calculated from the following equations: P D(MAX) ) ǒV out1 110 100 (eq. 9) I out2Ǔ I out1 ) I out2 ) I q ORDERING INFORMATION Device NCV47822PAAJR2G Marking Package Shipping† Line1: NCV4 Line2: 7822 TSSOP−14 Exposed Pad (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D www.onsemi.com 13 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSSOP−14 EP CASE 948AW ISSUE C 14 1 SCALE 1:1 B NOTE 6 14 DATE 09 OCT 2012 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.07 mm MAX. AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OF THE FOOT. MINIMUM SPACE BETWEEN PROTRUSION AND ADJACENT LEAD IS 0.07. 4. DIMENSION D DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 mm PER SIDE. DIMENSION D IS DETERMINED AT DATUM H. 5. DIMENSION E1 DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.25 mm PER SIDE. DIMENSION E1 IS DETERMINED AT DATUM H. 6. DATUMS A AND B ARE DETERMINED AT DATUM H. 7. A1 IS DEFINED AS THE VERTICAL DISTANCE FROM THE SEATING PLANE TO THE LOWEST POINT ON THE PACKAGE BODY. 8. SECTION B−B TO BE DETERMINED AT 0.10 TO 0.25 mm FROM THE LEAD TIP. b 8 ÉÉ ÇÇÇ ÇÇÇ ÉÉ b1 E1 c1 E NOTE 5 SECTION B−B c PIN 1 REFERENCE 1 7 0.20 C B A e 2X 14 TIPS TOP VIEW NOTE 6 A D A2 NOTE 4 0.05 C 0.10 C A 0.10 C B S A S DETAIL A B 14X b 14X NOTE 8 C M SEATING PLANE c B NOTE 3 END VIEW SIDE VIEW D2 H E2 L2 A1 L NOTE 7 C DETAIL A BOTTOM VIEW RECOMMENDED SOLDERING FOOTPRINT* 3.40 14X 1.15 GAUGE PLANE DIM A A1 A2 b b1 c c1 D D2 E E1 E2 e L L2 M MILLIMETERS MIN MAX −−−− 1.20 0.05 0.15 0.80 1.05 0.19 0.30 0.19 0.25 0.09 0.20 0.09 0.16 4.90 5.10 3.09 3.62 6.40 BSC 4.30 4.50 2.69 3.22 0.65 BSC 0.45 0.75 0.25 BSC 0_ 8_ GENERIC MARKING DIAGRAM* 14 XXXX XXXX ALYWG G 1 3.06 6.70 1 0.65 PITCH 14X 0.42 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON66474E TSSOP−14 EP, 5.0X4.4 XXXX = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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