DATA SHEET
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Isolated High Current IGBT
Gate Driver
1
NCV57001
SOIC−16 WB
CASE 751G−03
NCV57001 is a high−current single channel IGBT driver with
internal galvanic isolation, designed for high system efficiency and
reliability in high power applications. Its features include
complementary inputs, open drain FAULT and Ready outputs, active
Miller clamp, accurate UVLOs, DESAT protection, and soft turn−off
at DESAT. NCV57001 accommodates both 5 V and 3.3 V signals on
the input side and wide bias voltage range on the driver side including
negative voltage capability. NCV57001 provides > 5 kVrms
(UL1577 rating) galvanic isolation and > 1200 VIORM (working
voltage) capabilities. NCV57001 is available in the wide−body
SOIC−16 package with guaranteed 8 mm creepage distance between
input and output to fulfill reinforced safety insulation requirements.
MARKING DIAGRAM
16
XXXXXXXXXXX
AWLYYWWG
1
XXXXX
A
WL
YY
WW
G
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
High Current Output (+4/−6 A) at IGBT Miller Plateau Voltages
Low Output Impedance for Enhanced IGBT Driving
Short Propagation Delays with Accurate Matching
Active Miller Clamp to Prevent Spurious Gate Turn−on
DESAT Protection with Programmable Delay
Negative Voltage (Down to −9 V) Capability for DESAT
Soft Turn Off During IGBT Short Circuit
IGBT Gate Clamping During Short Circuit
IGBT Gate Active Pull Down
Tight UVLO Thresholds for Bias Flexibility
Wide Bias Voltage Range including Negative VEE2
3.3 V to 5 V Input Supply Voltage
Designed for AEC−Q100 Certification
5000 V Galvanic Isolation (to meet UL1577 Requirements)
1200 V Working Voltage (per VDE0884−10 Requirements)
High Transient Immunity
High Electromagnetic Immunity
These Devices are Pb−Free, Halogen Free and are RoHS Compliant
Typical Applications
•
•
•
•
•
•
June, 2022 − Rev. 2
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
PIN ASSIGNMENT
VEE2A
GND1
DESAT
VDD1
GND2
RST
N/C
FLT
VDD2
RDY
OUT
IN−
CLAMP
IN+
VEE2
GND1A
ORDERING INFORMATION
See detailed ordering and shipping information on page 8 of
this data sheet.
Automotive Power Supplies
HEV/EV Powertrain
OBC
BSG
EV Charger
PTC Heater
© Semiconductor Components Industries, LLC, 2019
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
1
Publication Order Number:
NCV57001/D
NCV57001
VDD1
VDD1
VDD2
UVLO1
UVLO2
+
V CLAMP−THR
−
IN−
CLAMP
IN+
VEE2
STO
VDD1
OUT
RDY
Logic
Logic
1
VDD2
I DESAT−CHG
VDD1
+
RST
DESAT
−
VDD1
V DESAT−THR
FLT
GND1
2
1
GND1A
VEE2
Figure 1. Simplified Block Diagram
V1
+V2
VDD1
VDD2
IN+
DESAT
IN−
OUT
RDY
FLT
CLAMP
RST
VEE2
GND1
GND2
GND1
GND2
−V3
Figure 2. Simplified Application Schematics
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2
VEE2A
GND2
NCV57001
PIN DESCRIPTION
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Pin Name
No.
I/O
Description
VEE2A
1
Power
VEE2
8
Output side negative power supply. A good quality bypassing capacitor is required from these pins
to GND2 and should be placed close to the pins for best results. Connect it to GND2 for unipolar
supply application.
DESAT
2
I/O
Input for detecting the desaturation of IGBT due to a short circuit condition. An internal constant
current source IDESAT−CHG charging an external capacitor connected to this pin allows a
programmable blanking delay every ON cycle before DESAT fault is processed, thus preventing
false triggering. When the DESAT voltage goes up and reaches VDESAT−THR, the output is driven
low. Further, the /FLT output is activated, please refer to Figure 5 on page 10.
GND2
3
Power
N/C
4
−
VDD2
5
Power
Output side positive power supply. The operating range for this pin is from UVLO2 to its maximum
allowed value. A good quality bypassing capacitor is required from this pin to GND2 and should be
placed close to the pins for best results.
OUT
6
O
Driver output that provides the appropriate drive voltage and source/sink current to the IGBT/FET
gate. OUT is actively pulled low during start−up and under Fault conditions.
CLAMP
7
I/O
Provides clamping for the IGBT/FET gate during the off period to protect it from parasitic turn−on.
Its internal N FET is turned on when the voltage of this pin falls below VEE2 + VCLAMP−THR. It is to
be tied directly to IGBT/FET gate with minimum trace length for best results.
GND1
9
Power
A 5 ms mute time apply to IN+ and IN− once DESAT occurs.
Output side gate drive reference connecting to IGBT emitter or FET source.
Not connected.
Input side ground reference.
16
IN+
10
I
Non inverted gate driver input. It is internally clamped to VDD1 and has a pull−down resistor of
50 kW to ensure that output is low in the absence of an input signal. A minimum positive going
pulse−width is required at IN+ before OUT responds.
IN−
11
I
Inverted gate driver input. It is internally clamped to VDD1 and has a pull−up resistor of 50 kW to
ensure that output is low in the absence of an input signal. A minimum negative going pulse−width
is required at IN− before OUT responds.
RDY
12
O
Power good indication output, active high when VDD2 is good. There is an internal 50 kW pull−up
resistor connected to this pin. Multiple of them from different drivers can be ”OR”ed together.
If a low RDY event is triggered by UVLO2, the maximum low duration for RDY is 200 ns.
OUT remains low when RDY is low. Short time delay may apply. See Figure 4 on page 9 for
details.
/FLT
13
O
Fault output (active low) that allows communication to the main controller that the driver has
encountered a desaturation condition and has deactivated the output.
/RST
14
I
Reset input with an internal 50 kW pull−up resistor, active low to reset fault latch.
VDD1
15
Power
Input side power supply (3.3 V to 5 V).
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NCV57001
SAFETY AND INSULATION RATINGS
Symbol
Parameter
Min
Installation Classifications per DIN VDE 0110/1.89
Table 1 Rated Mains Voltage
CTI
< 150 VRMS
I − IV
< 300 VRMS
I − IV
< 450 VRMS
I − IV
< 600 VRMS
I − IV
< 1000 VRMS
I − III
Comparative Tracking Index (DIN IEC 112/VDE 0303 Part 1)
Climatic Classification
600
40/100/21
Polution Degree (DIN VDE 0110/1.89)
VPR
Unit
2
Input−to−Output Test Voltage, Method b, VIORM x 1.875 = VPR, 100% Production Test
with tm = 1 s, Partial Discharge < 5 pC
Input−to−Output Test Voltage, Method a, VIORM x 1.6 = VPR, Type
and Sample Test with tm = 10 s, Partial Discharge < 5 pC
2250
Vpk
−
Vpk
VIORM
Maximum Repetitive Peak Voltage
1200
Vpk
VIOWM
Maximum Working Insulation Voltage
870
VRMS
VIOTM
Highest Allowable Over Voltage
8400
Vpk
8.0
mm
ECR
External Creepage
ECL
External Clearance
8.0
mm
DTI
Insulation Thickness
17.3
um
Safety Limit Values – Maximum Values in Failure; Case Temperature
150
°C
Safety Limit Values – Maximum Values in Failure; Input Power
36
mW
1364
mW
109
W
TCase
PS,INPUT
PS,OUTPUT
RIO
Safety Limit Values – Maximum Values in Failure; Output Power
Insulation Resistance at TS, VIO = 500 V
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NCV57001
ABSOLUTE MAXIMUM RATINGS (Over operating free−air temperature range unless otherwise noted) (Note 1)
Symbol
Minimum
Maximum
Unit
VDD1−GND1
Supply voltage, input side
−0.3
6
V
VDD2−GND2
Positive Power Supply, output side
−0.3
25
V
VEE2−GND2
Negative Power Supply, output side
−10
0.3
V
0
25
V
VEE2 − 0.3
VDD2 + 0.3
V
VDD2−VEE2 (VMAX2)
VOUT
Parameter
Differential Power Supply, output side
Gate−driver output voltage
IPK−SRC
Gate−driver output sourcing current
(maximum pulse width = 10 ms, maximum duty cycle = 0.2%, VMAX2 = 20 V)
−
7.8
A
IPK−SNK
Gate−driver output sinking current
(maximum pulse width = 10 ms, maximum duty cycle = 0.2%, VMAX2 = 20 V)
−
7.1
A
IPK−CLAMP
Clamp sinking current
(maximum pulse width = 10 ms, maximum duty cycle = 0.2%, VCLAMP = 3 V)
−
2.5
A
Maximum Short Circuit Clamping Time (IOUT_CLAMP = 500 mA)
−
10
ms
−0.3
VDD1 + 0.3
V
tCLP
VLIM−GND1
Voltage at IN+, IN−, /RST, /FLT, RDY
ILIM−GND1
Output current of /FLT, RDY
−
10
mA
VDESAT−GND2
Desat Voltage (Note 2)
−9
VDD2 + 0.3
V
VCLAMP−GND2
Clamp Voltage
VEE2 − 0.3
VDD2 + 0.3
V
−
1400
mW
Maximum Junction Temperature
−40
150
°C
Storage Temperature Range
−65
150
°C
PD
Power Dissipation (Note 3)
TJ(max)
TSTG
ESDHBM
ESD Capability, Human Body Model (Note 4)
−
±2
kV
ESDCDM
ESD Capability, Charged Device Model (Note 4)
−
±2
kV
MSL
Moisture Sensitivity Level
−
2
−
TSLD
Lead Temperature Soldering Reflow, Pb−Free Versions (Note 5)
−
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. The minimum value is verified by characterization with a single pulse of 100 mA for 100 ms.
3. The value is estimated for ambient temperature 25°C and junction temperature 150°C, 650 mm2, 1 oz copper, 2 surface layers and 2 internal
power plane layers. Power dissipation is affected by the PCB design and ambient temperature.
4. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Charged Device Model tested per AEC−Q100−011 (EIA/JESD22−C101)
Latchup Current Maximum Rating: ≤100 mA per JEDEC standard: JESD78, 125°C
5. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
THERMAL CHARACTERISTICS
Symbol
RqJA
Parameter
Thermal Resistance, Junction−to−Air
Conditions
100
mm2,
1 oz Copper, 1 Surface Layer
mm2,
650
1 oz Copper, 2 Surface Layers and
2 Internal Power Plane Layers
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5
Value
Unit
114
°C/W
62
NCV57001
OPERATING RANGES (Note 6)
Parameter
Symbol
Min
Max
Unit
VDD1−GND1
Supply voltage, input side
UVLO1
5.5
V
VDD2−GND2
Positive Power Supply, output side
UVLO2
24
V
VEE2−GND2
Negative Power Supply, output side
−10
0
V
VDD2−VEE2 (VMAX2)
Differential Power Supply, output side
0
24
V
VIL
Low level input voltage at IN+, IN−, /RST
0
0.3 X VDD1
V
VIH
High level input voltage at IN+, IN−, /RST
0.7 X VDD1
VDD1
V
Common Mode Transient Immunity (1500 V)
100
−
kV/ms
Ambient Temperature
−40
125
°C
|dVISO/dt|
TA
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
6. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
ISOLATION CHARACTERISTICS
Symbol
VISO, input−output
RISO
Parameter
Conditions
Input−Output
Isolation Voltage
TA = 25°C, Relative Humidity < 50%, t = 1.0
minute, II−O 10 A, 50 Hz (See Note 7, 8, 9)
Isolation
Resistance
VI−O = 500 V (See Note 7)
Min
Typ
Max
Unit
5000
−
−
VRMS
−
1011
−
W
7. Device is considered a two−terminal device: pins 1 to 8 are shorted together and pins 9 to 16 are shorted together
8. 5,000 VRMS for 1−minute duration is equivalent to 6,000 VRMS for 1−second duration.
9. The input−output isolation voltage is a dielectric voltage rating per UL1577. It should not be regarded as an input−output continuous voltage
rating. For the continuous working voltage rating, refer to equipment−level safety specification or DIN VDE V 0884−11 Safety and Insulation
Ratings Table
ELECTRICAL CHARACTERISTICS (VDD1 = 5 V, VDD2 = 15 V, VEE2 = −8 V. For typical values TA = 25°C, for min/max values,
TA is the operating ambient temperature range that applies, unless otherwise noted)
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
VOLTAGE SUPPLY
VUVLO1−OUT−ON
UVLO1 Output Enabled
−
−
3
V
VUVLO1−OUT−OFF
UVLO1 Output Disabled
2.4
−
−
V
UVLO1 Hysteresis
0.125
−
−
V
VUVLO2−OUT−ON
UVLO2 Output Enabled
13.2
13.5
13.8
V
VUVLO2−OUT−OFF
UVLO2 Output Disabled
12.2
12.5
12.8
V
−
1
−
1
2
mA
−
4.8
6
mA
−
3.3
4
mA
−
3.6
6
mA
VUVLO1−HYST
VUVLO2−HYST
IDD1−0
UVLO2 Hysteresis
V
Input Supply Quiescent Current
Output Low
IN+ = Low, IN− = Low
Input Supply Quiescent Current
Output High
IN+ = High, IN− = Low
Output Positive Supply Quiescent
Current, Output Low
IN+ = Low, IN− = Low
Output Positive Supply Quiescent
Current, Output High
IN+ = High, IN− = Low
IEE2−0
Output Negative Supply
Quiescent Current, Output Low
IN+ = High, IN− = Low, no load
−
0.4
2
mA
IEE2−100
Output Negative Supply
Quiescent Current, Output High
IN+ = High, IN− = Low, no load
−
0.2
2
mA
IDD1−100
IDD2−0
IDD2−100
RDY = High, /FLT = High
RDY = High, /FLT = High
RDY = High, /FLT = High, no load
RDY = High, /FLT = High, no load
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NCV57001
ELECTRICAL CHARACTERISTICS (VDD1 = 5 V, VDD2 = 15 V, VEE2 = −8 V. For typical values TA = 25°C, for min/max values,
TA is the operating ambient temperature range that applies, unless otherwise noted) (continued)
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
LOGIC INPUT AND OUTPUT
VIL
IN+, IN−, /RST Low Input Voltage
−
−
0.3 x
VDD1
V
VIH
IN+, IN−, /RST High Input Voltage
0.7 x
VDD1
−
−
V
−
0.15 x
VDD1
−
V
VIN−HYST
Input Hysteresis Voltage
IIN−L, IRST−L
IN−, /RST Input Current
(50 kW pull−up resistor)
VIN−/VRST = 0 V
−
−100
−
mA
IIN+H
IN+ Input Current
(50 kW pull−down resistor)
VIN+ = 5 V
−
100
−
mA
IRDY−L, IFLT−L
RDY, /FLT Pull−up Current
(50 kW pull−up resistor)
VRDY/VFLT = Low
−
100
−
mA
RDY, /FLT Low Level Output Voltage
IRDY/IFLT = 5 mA
−
−
0.3
V
VRDY−L, VFLT−L
tMIN1
Input Pulse Width of IN+, IN− for
No Response at Output
−
−
10
ns
tMIN2
Input Pulse Width of IN+, IN− for
Guaranteed Response at Output
40
−
−
ns
tRST−MIN
Pulse Width of /RST for Resetting
/FLT
800
−
−
ns
V
DRIVER OUTPUT
Output Low State
(VOUT – VEE2)
ISINK = 200 mA
−
0.1
0.2
ISINK = 1.0 A, TA = 25°C
−
0.5
0.8
Output High State
(VDD2 – VOUT)
ISRC = 200 mA
−
0.3
0.5
ISRC = 1.0 A, TA = 25°C
−
0.8
1
IPK−SNK1
Peak Driver Current, Sink (Note 10)
VOUT = 7.9 V
−
7.1
−
A
IPK−SRC1
Peak Driver Current, Source (Note
10)
VOUT = −5 V
−
7.8
−
A
Clamp Voltage
(VCLAMP – VEE2)
ICLAMP = 2.5 A, TA = 25°C
−
1.3
1.7
V
ICLAMP = 2.5 A, TA = −40°C to 125°C
−
−
3
1.5
2
2.5
V
VOUTL1
VOUTL3
VOUTH1
VOUTH3
V
MILLER CLAMP
VCLAMP
VCLAMP−THR
Clamp Activation Threshold
(VCLAMP – VEE2)
IGBT SHORT CIRCUIT CLAMPING
VCLAMP−OUT
VCLAMP−CLAMP
Clamping Voltage, (VOUT − VDD2)
IN+ = Low, IN− = High,
IOUT = 500 mA
(pulse test, tCLPmax = 10 ms)
−
0.9
1.1
V
Clamping Voltage, Clamp
(VCLAMP − VDD2)
IN+ = High, IN− = Low,
ICLAMP−CLAMP = 500 mA
(pulse test, tCLPmax = 10 ms)
−
1.4
1.6
V
8.5
9
9.5
V
−
−8
−
V
0.45
0.5
0.6
mA
−
50
−
mA
DESAT PROTECTION
VDESAT−THR
DESAT Threshold Voltage
VDESAT−NEG
DESAT Negative Voltage
IDESAT = 1.5 mA
IDESAT−CHG
Blanking Charge Current
VDESAT = 7 V
IDESAT−DIS
Blanking Discharge Current
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7
NCV57001
ELECTRICAL CHARACTERISTICS (VDD1 = 5 V, VDD2 = 15 V, VEE2 = −8 V. For typical values TA = 25°C, for min/max values,
TA is the operating ambient temperature range that applies, unless otherwise noted) (continued)
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
tPD−ON
IN+, IN− to Output High Propagation
Delay
CLOAD = 10 nF
VIH to 10% of output change for
PW > 150 ns. OUT and CLAMP pins
are connected together
40
60
90
ns
tPD−OFF
IN+, IN− to Output Low Propagation
Delay
CLOAD = 10 nF
VIL to 90% of output change for
PW > 150 ns. OUT and CLAMP pins
are connected together
40
66
90
ns
tDISTORT
Propagation Delay Distortion
(= tPD−ON − tPD−OFF)
TA = 25°C, PW > 150 ns
−15
−6
15
ns
TA = −40°C to 125°C, PW > 150 ns
−25
−
25
DYNAMIC CHARACTERISTICS
tDISTORT_TOT
Prop Delay Distortion between Parts
PW > 150 ns
−30
0
30
ns
tRISE
Rise Time (see Fig. 3) (Note 10)
CLOAD = 1 nF, 10% to 90% of
Output Change
−
10
−
ns
tFALL
Fall Time (see Fig. 3) (Note 10)
CLOAD = 1 nF, 90% to 10% of
Output Change
−
15
−
ns
tLEB
DESAT Leading Edge Blanking Time
(See Fig. 5)
−
450
−
ns
DESAT Threshold Filtering Time
(see Fig. 5)
−
320
−
ns
CLOAD = 10 nF, RG = 10 W. VEE2 = 0 V
−
1.8
−
ms
CLOAD = 10 nF, RG = 10 W
−
2.6
−
tFILTER
tSTO
Soft Turn Off Time (see Fig. 5)
tFLT
Delay after tFILTER to /FLT
−
450
−
ns
tRST
/RST Rise to /FLT Rise Delay
−
23
−
ns
RDY High to Output High Delays
(see Fig. 4)
−
55
−
ns
VUVLO2−OUT−OFF to RDY Low
Delays (see Fig. 4)
−
8
−
ms
tRDY1O
tRDY2O
tRDY1F
tRDY2F
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
10. Values based on design and/or characterization.
ORDERING INFORMATION
Device
Package Type
Shipping†
NCV57001DWR2G
SOIC−16 Wide Body
(Pb−Free)
1,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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8
NCV57001
VIH
VIL
IN+
tFALL
tRISE
tMIN1
90%
tPD−ON
tMIN1
tPD−OFF
OUT
10%
tMIN2
tMIN2
Figure 3. Propagation Delay, Rise and Fall Time
RDY
RDY
tRDY2F
tRDY1F
IN+
IN+
VUVLO2−OUT−ON
VUVLO2−OUT−OFF
VDD1
VUVLO1−OUT−ON
VUVLO1−OUT−OFF
VDD2
VUVLO2−OUT−ON
tRDY2O
OUT
VUVLO2−OUT−OFF
OUT
Figure 4. UVLO Waveform
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9
tRDY1O
NCV57001
IN+
tPD−ON
tMUTE
tFILTER
VOUT
tSTO
tLEB
VEE2 + 2 V
VDESAT−THR
DESAT
tFLT
FLT
tRST
RST
tRST−MIN
Figure 5. DESAT Response Waveform
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10
NCV57001
TYPICAL CHARACTERISTICS
(Conditions for the following figures are the same as stated for ELECTRICAL CHARACTERISTICS Table unless otherwise noted.
Typical and/or average values are used.)
6.0
6.0
5.0
5.0
4.0
IDD2 (mA)
IDD1 (mA)
4.0
VDD1 = 5 V, IN+ = Low, IN− = LOW
VDD1 = 5 V, IN+ = High, IN− = LOW
VDD1 = 3.3 V, IN+ = Low, IN− = LOW
VDD1 = 3.3 V, IN+ = High, IN− = LOW
3.0
2.0
3.0
2.0
VDD2 = 15 V, IN+ = Low, IN− = LOW
VDD2 = 15 V, IN+ = 1 MHz, IN− = LOW
VDD2 = 15 V, IN+ = High, IN− = LOW
1.0
1.0
0.0
0.0
−40
−20
0
20
40
60
Temperature (5C)
80
100
−40
120
−20
0.5
5.0
0.4
4.0
VEE2 = −8 V, IN+ = Low, IN− = LOW
VEE2 = −8 V, IN+ = High, IN− = LOW
0.3
0.2
0.1
0.0
80
100
120
3.0
2.0
IDD1, VDD1 = 5 V
IDD2, VDD2 = 15 V
IEE2, VEE2 = −8 V
1.0
0.0
−1.0
−40
−20
0
20
40
60
80
100
120
0
100
200
300
Input Frequency (kHz)
Temperature (5C)
Figure 8. VEE2 Supply Current
400
500
Figure 9. Supply Current vs Frequency
14.0
3.0
VUVLO1−OUT−ON
2.9
VUVLO1−OUT−OFF
13.5
UVLO2 (V)
UVLO1 (V)
20
40
60
Temperature (5C)
Figure 7. VDD2 Supply Current
Supply Current (mA)
IEE2 (mA)
Figure 6. VDD1 Supply Current
0
2.8
2.7
VUVLO2−OUT−ON
VUVLO2−OUT−OFF
13.0
12.5
2.6
12.0
2.5
−40
−20
0
20
40
60
Temperature (5C)
80
100
−40
120
−20
0
20
40
60
80
100
Temperature (5C)
Figure 10. UVLO1 Threshold Voltage
Figure 11. UVLO2 Threshold Voltage
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11
120
NCV57001
TYPICAL CHARACTERISTICS
(Conditions for the following figures are the same as stated for ELECTRICAL CHARACTERISTICS Table unless otherwise noted.
Typical and/or average values are used.) (continued)
2.0
2.0
VOUTH (0.2 A) VEE2 = −8 V
VOUTH (1 A) VEE2 = −8 V
VOUTL (0.2 A) VEE2 = −8 V
VOUTL (1 A) VEE2 = −8 V
1.5
VOUTL (V)
VOUTH (V)
1.5
1.0
0.5
1.0
0.5
0.0
0.0
−40
−20
0
20
40
60
Temperature (5C)
80
100
120
−40
Figure 12. Output Voltage Drop, Sourcing
20
40
60
Temperature (5C)
80
100
120
2.0
VCLAMP (2.5 A) VEE2 = −8 V
2.0
1.5
VCLAMP− (V)
CLAMP Voltage (V)
0
Figure 13. Output Voltage Drop, Sinking
2.5
1.5
1.0
1.0
VCLAMP−OUT (0.5 A) VEE2 = −8 V
VCLAMP−CLAMP (0.5 A) VEE2 = −8 V
0.5
0.5
0.0
0.0
−40
−20
0
20
40
60
80
Temperature (5C)
100
−40
120
Figure 14. CLAMP Voltage Drop
−20
0
20
40
60
Temperature (5C)
80
100
120
Figure 15. IGBT Short Circuit Clamp Voltage Drop
90
40
70
60
50
40
−40
−20
0
tRISE,VEE2 = −8 V
tFALL,VEE2 = −8 V
tRISE,VEE2 = 0 V
tFALL,VEE2 = 0 V
35
tPD−ON
tPD−OFF
80
Rise and Fall Time (ns)
Propagation Delay (ns)
−20
20
40
60
Temperature (5C)
80
100
30
25
20
15
10
5
0
−40
120
Figure 16. Propagation Delay
−20
0
20
40
60
Temperature (5C)
80
Figure 17. Rise and Fall Time
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12
100
120
NCV57001
Soft Turn Off Time (ms)
4.0
tSTO,VEE2 = −8 V
tSTO,VEE2 = 0 V
3.0
2.0
1.0
0.0
−40
−20
0
20
40
60
Temperature (5C)
80
Figure 18. Soft Turn Off Time
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13
100
120
NCV57001
FEATURE DESCRIPTIONS
• The IGBT is turned−off, if the supply VCC2 drops
Under Voltage Lockout (UVLO)
UVLO ensures correct switching of IGBT connected to
the driver output.
• The IGBT is turned−off, if the supply VCC1 drops
below VUVLO1−OUT−OFF and the RDY pin output goes
to low.
• The driver output does not start to react to the input
signal on VIN until the VCC1 rises above the
VUVLO1−OUT−ON again. If the supply VCC1 increase
over VUVLO1−OUT−ON, the RDY pin output goes to be
open−drain and outputs continue to switch IGBT
RDY
•
•
tRDY2
below VUVLO2−OUT−OFF and the RDY pin output goes
to low.
The driver output does not start to react to the input
signal on VIN until the VCC1 rises above the
VUVLO1−OUT−ON again. If the supply VDD1 increases
over VUVLO1−OUT−ON, the RDY pin output goes to be
open−drain and outputs continue to switch IGBT
VEE2 is not monitored.
RDY
tRDY1F
tRDY2R
IN+
IN+
VUVLO2-OUT-ON
VDD1
VUVLO2-OUT-OFF
VUVLO1-OUT-ON
VUVLO1-OUT-OFF
VDD2
VUVLO2-OUT-ON
VUVLO2-OUT-OFF
OUTH
/OUTL
OUTH
/OUTL
Figure 19. UVLO Diagram
Active Miller Clamp Protection (CLAMP)
For operation with unipolar supply, typically, VDD2 =
15 V with respect to GND2, and VEE2 = GND2. In this case,
the IGBT can turn on due to additional charge from IGBT
Miller capacitance caused by a high voltage slew rate
transition on the IGBT collector. To prevent IGBT to turn on,
the CLAMP pin is connected directly to IGBT gate and
Miller current is sinked through a low impedance CLAMP
transistor. When the IGBT is turned−off and the gate voltage
transitions below VCLAMP, the CLAMP current output is
activated.
NCV57001 supports both bipolar and unipolar power
supply with active Miller clamp.
For operation with bipolar supplies, the IGBT is turned off
with a negative voltage through OUTL with respect to its
emitter. This prevents the IGBT from unintentionally
turning on because of current induced from its collector to
its gate due to Miller effect. In this condition it is not
necessary to connect CLAMP output of the gate driver to the
IGBT gate, but connecting CLAMP output to the IGBT gate
is also not an issue. Typical values for bipolar operation are
VDD2 = 15 V and VEE2 = −5 V with respect to GND2.
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14
NCV57001
Figure 20. Current Path without Miler Clamp Protection
Figure 21. Current Path with Miler Clamp Protection
Non−inverting and Inverting Input Pin (IN+, IN−)
Desaturation Protection (DESAT)
NCV57001 has two possible input modes to control
IGBT. Both inputs have defined minimum input pulse width
to filter occasional glitches.
• Non−inverting input IN+ controls the driver output
while inverting input IN− is set to LOW
• Inverting input IN− controls the driver output while
non−inverting input IN+ is set to HIGH
Desaturation protection ensures the protection of IGBT at
short circuit. When the VCESAT voltage goes up and reaches
the set limit, the output is driven low and /FLT output is
activated. Blanking time can be set by internal current
source and an external capacitor. To avoid false DESAT
triggering and minimize blanking time, fast switching
diodes with low internal capacitance are recommended. All
DESAT protective diodes internal capacitances builds
voltage divider with the blanking capacitor.
Warning: Both external protective diodes are
recommended for the protection against voltage spikes
caused by IGBT transients passing through parasitic
capacitances.
Warning: When the application use an independent or
separate power supply for the control unit ant the input
side of the driver, all inputs should be protected by a
serial resistor (In case of a power failure of the driver, the
driver may be damaged due to overloading of the input
protection circuits)
DESAT Circuit Parameters Specification
t BLANK + C BLANK @
V DESAT−THR
I DESAT−CHG
V DESAT−THR u R S−DESAT @ I DESAT−CHG ) V F HV diode ) V CESAT_IGBT
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15
NCV57001
VDD2
IDESAT-CH G
HS-IGBT
DESAT VDESAT
+
Control
Logic
RS-DESAT
CBL ANK
-
50kΩ
isola�on
VDD1
VDESAT-THR
FLT
Vo
IDESAT-DIS
RG
QDIS
LS-IGBT
GND2
GND1
GND2
GND1
Figure 22. DESAT Protection Schematic
A
IN+
t MUTE
t PD-ON
t FILTER
VOUTH /L
tLEB
t OUT-C
VEE 2 + 2V
VDESAT -THR
DESAT
FLT
HV diode
tFLT
t RST
RST
tRST -MIN
Figure 23. DESAT Switch Off Behavior
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16
NCV57001
Warning: When the application use an independent or
separate power supply for the control unit ant the input
side of the driver, all inputs should be protected by a
serial resistor (In case of a power failure of the driver, the
driver may be damaged due to overloading of the input
protection circuits)
Fault Output Pin (FLT)
FLT open−drain output provides feedback to the
controller about driver DESAT protection conditions. The
open−drain FLT outputs of multiple NCV57001 devices can
be wired together forming a single, common fault bus for
interfacing directly to the microcontroller. FLT output has
50kΩ internal pull−up resistor to VDD1.
Power Supply (VDD1, VDD2, VEE2)
Ready Output Pin (RDY)
NCV57001 is designed to support two different power
supply configurations, bipolar or unipolar power supply. For
reliable high output current the suitable external power
capacitors required. Parallel combination of 100 nF + 4.7 mF
ceramic capacitors is optimal for a wide range of
applications using IGBT. For reliable driving IGBT
modules (containing several parallel IGBT’s) is a higher
capacity required (typically 100 nF + 10 mF). Capacitors
should be as close as possible to the driver’s power pins.
• In bipolar power supply the driver is typically supplied
with a positive voltage of 15 V at VDD2 and negative
voltage −5 V at VEE2 (Figure 24). Negative power
supply prevents a dynamic turn on throughout the
internal IGBT input capacitance.
• In Unipolar power supply the driver is typically
supplied with a positive voltage of 15 V at VDD2.
Dynamic turn on throughout the internal IGBT input
capacitance could be prevented by Active Miler Clamp
function. CLAMP output should be directly connected
to IGBT gate (Figure 25).
RDY open−drain output provides feedback to the
controller about driver UVLO and TSD protections
conditions.
• If either side of device have insufficient supply (VDD1
or VDD2), the RDY pin output goes low; otherwise,
RDY pin output is open drain.
• If the temperature crosses the TSD threshold, the RDY
pin output goes low; otherwise, RDY pin output is open
drain.
The open−drain RDY outputs of multiple NCV57001
devices can be “OR”ed together.
Reset Input Pin (RST)
Reset input pin has internal pull−up resistor to VDD1. In
normal condition the RST pin is connected to HIGH, to reset
FAULT conditions connect RST pin to LOW. In applications
that does not allow to control the reset, RST pin should be
connected to IN+, the driver will be reset by each input
pulse.
RESET Input
• FLT input is used to set back FLT output after DESAT
conditions disappear
VDD2
100n 10μF
GND1
DESAT
VDD1
GND2
RST
OUTH
FLT
VDD2
RDY
OUTL
IN-
CLAMP
IN+
VEE2
GND1A
VEE2
+
-
+
-
VEE2A
100n 10μF
Figure 24. Bipolar Power Supply
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17
1μF 100n
+
-
VDD1
NCV57001
VDD2
+
-
100n 10μF
VEE2A
GND1
DESAT
VDD1
GND2
RST
OUTH
FLT
VDD2
RDY
OUTL
IN-
CLAMP
IN+
VEE2
GND1A
1μF 100n
+
-
VDD1
Figure 25. Unipolar Power Supply
Common Mode Transient Immunity (CMTI)
+
-
10μF
OUT must remain stable
DESAT
VDD1
GND2
RST
OUTH
FLT
VDD2
RDY
OUTL
IN-
+
CLAMP
IN+
VEE2
GND1A
S1
-
-
+
HV PULSE
Figure 26. Common−Mode Transient Immunity Test Circuit
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18
10kΩ
GND1
10kΩ
VEE2A
10μF
+
-
NCV57001
Figure 27. Recommended Basic Bipolar Power Supply PCB Design
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19
NCV57001
10 mil s
0.25 mm
10 mil s
0.25 mm
High-speed signals
Ground plane
40 mil s
1 mm
Keep this space free
10 mils
from traces, pads and
0.25 mm
vias
10 mil s
0.25 mm
40 mil s
1 mm
10 mil s
0.25 mm
Power plane
Low-speed signals
314 mils
(8 mm)
Figure 28. Recommended Layer Stack
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20
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−16 WB
CASE 751G
ISSUE E
1
SCALE 1:1
DATE 08 OCT 2021
GENERIC
MARKING DIAGRAM*
16
XXXXXXXXXXX
XXXXXXXXXXX
AWLYYWWG
1
XXXXX
A
WL
YY
WW
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42567B
SOIC−16 WB
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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