NCV8161BSN280T1G

DATA SHEET www.onsemi.com LDO Regulator - Ultra-Low Noise, High PSRR, RF and Analog Circuits MARKING DIAGRAM 5 5 450 mA 1 NCV8161 The NCV8161 is a linear regulator capable of supplying 450 mA output current. Designed to meet the requirements of RF and analog circuits, the NCV8161 device provides low noise, high PSRR, low quiescent current, and very good load/line transients. The device is designed to work with a 1 mF input and a 1 mF output ceramic capacitor. It is available in TSOP−5 and XDFN4 packages. • • • • • • • • • • • • Operating Input Voltage Range: 1.9 V to 5.5 V Available in Fixed Voltage Option: 1.8 V to 5.14 V ±2% Accuracy Over Temperature Ultra Low Quiescent Current Typ. 18 mA Standby Current: Typ. 0.1 mA Very Low Dropout: 225 mV at 450 mA Ultra High PSRR: Typ. 98 dB at 20 mA, f = 1 kHz Ultra Low Noise: 10 mVRMS Stable with a 1 mF Small Case Size Ceramic Capacitors Available in TSOP−5 and XDFN4 Packages NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable; Device Temperature Grade 1: −40°C to +125°C Ambient Operating Temperature Range These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant Typical Applications • • • • OUT XX M 1 XX = Specific Device Code M = Date Code PIN CONNECTIONS IN 1 GND 2 EN 3 5 OUT 4 NC/ADJ (Top View) IN EN 4 3 EPAD OUT VOUT IN XDFN4 CASE 711AJ 1 Parking Camera Modules Wireless Handsets, Wireless LAN, Bluetooth®, Zigbee® Automotive Infotainment Systems Other Battery Powered Applications VIN 1 XXX = Specific Device Code A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) 1 Features XXXAYWG G TSOP−5 CASE 483 2 GND (Top View) ORDERING INFORMATION See detailed ordering and shipping information on page 14 of this data sheet. NCV8161 CIN 1 mF Ceramic EN COUT 1 mF Ceramic ON OFF GND Figure 1. Typical Application Schematic © Semiconductor Components Industries, LLC, 2016 September, 2022 − Rev. 2 1 Publication Order Number: NCV8161/D NCV8161 IN EN ENABLE THERMAL LOGIC SHUTDOWN BANDGAP MOSFET REFERENCE INTEGRATED DRIVER WITH SOFT−START CURRENT LIMIT OUT * ACTIVE DISCHARGE Version A only EN GND Figure 2. Simplified Schematic Block Diagram PIN FUNCTION DESCRIPTION Pin No. TSOP−5 Pin No. XDFN4 Pin Name 1 4 IN 5 1 OUT 3 3 EN 2 2 GND Common ground connection 4 − N/C Not connected. This pin can be tied to ground to improve thermal dissipation. − EP EPAD Description Input voltage supply pin Regulated output voltage. The output should be bypassed with small 1 mF ceramic capacitor. Chip enable: Applying VEN < 0.4 V disables the regulator, Pulling VEN > 1.2 V enables the LDO. Exposed Pad. Exposed pad can be tied to ground plane for better power dissipation. www.onsemi.com 2 NCV8161 ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit VIN −0.3 V to 6 V Output Voltage VOUT −0.3 to VIN + 0.3, max. 6 V V Chip Enable Input VCE −0.3 to VIN + 0.3, max. 6 V V Output Short Circuit Duration tSC unlimited s Operating Ambient Temperature Range TA −40 to +125 °C Input Voltage (Note 1) Maximum Junction Temperature TJ 150 °C TSTG −55 to 150 °C ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V ESD Capability, Machine Model (Note 2) ESDMM 200 V Storage Temperature Range Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per EIA/JESD22−A114 ESD Machine Model tested per EIA/JESD22−A115 Latchup Current Maximum Rating tested per JEDEC standard: JESD78. THERMAL CHARACTERISTICS Rating Symbol Value Unit Thermal Characteristics, TSOP−5 (Note 3) Thermal Resistance, Junction−to−Air RqJA 218 °C/W Thermal Characteristics, XDFN4 (Note 3) Thermal Resistance, Junction−to−Air RqJA 198 °C/W 3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7 RECOMMENDED OPERATING CONDITIONS Parameter Symbol Min Max Unit Input Voltage VIN 1.9 5.5 V Junction Temperature TJ −40 125 °C Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 3 NCV8161 ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 125°C; VIN = VOUT(NOM) + 1 V; IOUT = 1 mA, CIN = COUT = 1 mF, unless otherwise noted. VEN = 1.2 V. Typical values are at TJ = +25°C (Note 4). Parameter Test Conditions Symbol Min VIN 1.9 −40°C ≤ TJ ≤ 125°C VOUT −2 VOUT(NOM) + 1 V ≤ VIN ≤ 5.5 V LineReg 0.02 LoadReg 0.001 0.005 TSOP−5 0.005 0.008 VOUT(NOM) = 1.8 V 325 450 195 290 185 275 VOUT(NOM) = 3.3 V 175 260 VOUT(NOM) = 1.8 V 365 480 260 345 240 330 225 305 Operating Input Voltage Output Voltage Accuracy Line Regulation Load Regulation Dropout Voltage (Note 5) IOUT = 1 mA to 450 mA IOUT = 450 mA (XDFN4) XDFN4 VOUT(NOM) = 2.8 V VOUT(NOM) = 3.0 V Dropout Voltage (Note 5) IOUT = 450 mA (TSOP−5) VOUT(NOM) = 2.8 V VOUT(NOM) = 3.0 V VDO VDO VOUT(NOM) = 3.3 V Max Unit 5.5 V +2 % %/V mV mV VOUT = 90% VOUT(NOM) ICL Short Circuit Current VOUT = 0 V ISC 690 Quiescent Current IOUT = 0 mA IQ 18 23 mA Shutdown Current VEN ≤ 0.4 V, VIN = 4.8 V IDIS 0.01 1 mA EN Input Voltage “H” VENH EN Input Voltage “L” VENL VEN = 4.8 V IEN EN Pull Down Current Turn−On Time Power Supply Rejection Ratio Output Voltage Noise Thermal Shutdown Threshold Active output discharge resistance Line transient (Note 6) f = 10 Hz to 100 kHz 0.4 0.2 0.5 V mA 120 ms f = 100 Hz f = 1 kHz f = 10 kHz f = 100 kHz PSRR 91 98 82 48 dB IOUT = 1 mA IOUT = 250 mA VN 14 10 mVRMS Temperature rising TSDH 160 °C Temperature falling TSDL 140 °C VEN < 0.4 V, Version A only RDIS 280 W VIN = (VOUT(NOM) + 1 V) to (VOUT(NOM) + 1.6 V) in 30 ms, IOUT = 1 mA VIN = (VOUT(NOM) + 1.6 V) to (VOUT(NOM) + 1 V) in 30 ms, IOUT = 1 mA Load transient (Note 6) mA 1.2 COUT = 1 mF, From assertion of VEN to VOUT = 95% VOUT(NOM) IOUT = 20 mA 700 %/mA Output Current Limit EN Pin Threshold Voltage 450 Typ IOUT = 1 mA to 450 mA in 10 ms IOUT = 450 mA to 1mA in 10 ms −1 TranLINE mV +1 TranLOAD −40 +40 mV Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C. Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible. 5. Dropout voltage is characterized when VOUT falls 100 mV below VOUT(NOM). 6. Guaranteed by design. www.onsemi.com 4 NCV8161 TYPICAL CHARACTERISTICS 2.520 1.820 1.815 2.515 VOUT, OUTPUT VOLTAGE (V) VOUT, OUTPUT VOLTAGE (V) IOUT = 10 mA 1.805 2.505 IOUT = 450 mA 1.800 IOUT = 450 mA 2.500 2.495 1.795 VIN = 2.8 V VOUT = 1.8 V CIN = 1 mF COUT = 1 mF 1.790 1.785 1.780 −40 −20 0 20 40 60 80 100 120 VIN = 3.5 V VOUT = 2.5 V CIN = 1 mF COUT = 1 mF 2.490 2.485 2.480 −40 −20 140 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 3. Output Voltage vs. Temperature − VOUT = 1.8 V − XDFN Package Figure 4. Output Voltage vs. Temperature − VOUT = 2.5 V − XDFN Package 0.010 REGLINE, LINE REGULATION (%/V) 3.33 3.32 3.31 IOUT = 10 mA 3.30 3.29 IOUT = 450 mA 3.28 VIN = 4.3 V VOUT = 3.3 V CIN = 1 mF COUT = 1 mF 3.27 3.26 3.25 −40 −20 0 20 40 60 80 100 120 140 0.009 0.008 0.007 0.006 0.005 0.004 VIN = 2.8 V VOUT = 1.8 V CIN = 1 mF COUT = 1 mF 0.003 0.002 0.001 0 −40 −20 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 5. Output Voltage vs. Temperature − VOUT = 3.3 V − XDFN Package Figure 6. Line Regulation vs. Temperature − VOUT = 1.8 V 0.010 REGLINE, LINE REGULATION (%/V) 0.0020 VIN = 4.3 V VOUT = 3.3 V CIN = 1 mF COUT = 1 mF 0.009 0.008 0.007 REGLOAD, LOAD REGULATION (%/mA) VOUT, OUTPUT VOLTAGE (V) IOUT = 10 mA 2.510 1.810 0.0018 0.0016 0.0014 0.0012 0.006 0.0010 0.005 0.0008 0.004 VIN = 2.8 V VOUT = 1.8 V CIN = 1 mF COUT = 1 mF 0.0006 0.003 0.002 0.0004 0.001 0 −40 −20 0.0002 0 20 40 60 80 100 120 140 0 −40 −20 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 7. Line Regulation vs. Temperature − VOUT = 3.3 V Figure 8. Load Regulation vs. Temperature − VOUT = 1.8 V www.onsemi.com 5 NCV8161 0.0020 2.0 0.0018 IGND, GROUND CURRENT (mA) REGLOAD, LOAD REGULATION (%/mA) TYPICAL CHARACTERISTICS 0.0016 0.0014 0.0012 0.0010 0.0008 0.0006 VIN = 4.3 V VOUT = 3.3 V CIN = 1 mF COUT = 1 mF 0.0004 0.0002 0 −40 −20 0 20 40 60 80 120 140 100 1.0 0.8 TJ = −40°C 0.6 VIN = 2.8 V VOUT = 1.8 V CIN = 1 mF COUT = 1 mF 0.4 0.2 0 0 50 100 150 200 250 300 350 400 450 500 Figure 10. Ground Current vs. Load Current − VOUT = 1.8 V 400 VDROP, DROPOUT VOLTAGE (V) IGND, GROUND CURRENT (mA) TJ = 25°C 1.2 Figure 9. Load Regulation vs. Temperature − VOUT = 3.3 V TJ = 125°C 1.6 1.4 TJ = 25°C 1.2 1.0 0.8 TJ = −40°C 0.6 VIN = 4.3 V VOUT = 3.3 V CIN = 1 mF COUT = 1 mF 0.4 0 50 100 150 200 250 300 350 400 450 500 360 TJ = 125°C 320 280 TJ = 25°C 240 200 TJ = −40°C 160 120 VOUT = 1.8 V CIN = 1 mF COUT = 1 mF 80 40 0 0 50 100 150 200 250 300 350 400 450 500 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) Figure 11. Ground Current vs. Load Current − VOUT = 3.3 V Figure 12. Dropout Voltage vs. Load Current − VOUT = 1.8 V 225 400 200 VDROP, DROPOUT VOLTAGE (mV) VDROP, DROPOUT VOLTAGE (V) 1.4 IOUT, OUTPUT CURRENT (mA) 1.8 TJ = 125°C 175 TJ = 25°C 150 125 100 TJ = −40°C 75 50 VOUT = 3.3 V CIN = 1 mF COUT = 1 mF 25 0 TJ = 125°C TJ, JUNCTION TEMPERATURE (°C) 2.0 0.2 0 1.8 1.6 0 50 100 150 200 250 300 350 400 450 500 360 320 IOUT = 450 mA 280 240 VOUT = 1.8 V CIN = 1 mF COUT = 1 mF 200 160 120 80 40 0 −40 −20 IOUT = 0 mA 0 20 40 60 80 100 120 140 IOUT, OUTPUT CURRENT (mA) TJ, JUNCTION TEMPERATURE (°C) Figure 13. Dropout Voltage vs. Load Current − VOUT = 3.3 V Figure 14. Dropout Voltage vs. Temperature− VOUT = 1.8 V www.onsemi.com 6 NCV8161 TYPICAL CHARACTERISTICS 750 740 225 200 ICL, CURRENT LIMIT (mA) IOUT = 450 mA 175 150 125 100 75 IOUT = 0 mA 50 VOUT = 3.3 V CIN = 1 mF COUT = 1 mF 25 0 −40 −20 0 20 40 60 80 100 120 730 720 710 700 690 680 140 VIN = 4.3 V VOUT = 90% VOUT(nom) CIN = 1 mF COUT = 1 mF 670 660 650 −40 −20 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) Figure 15. Dropout Voltage vs. Temperature− VOUT = 3.3 V Figure 16. Current Limit vs. Temperature VEN, ENABLE VOLTAGE THRESHOLD (V) TJ, JUNCTION TEMPERATURE (°C) 700 690 680 670 660 650 640 VIN = 4.3 V VOUT = 0 V (Short) CIN = 1 mF COUT = 1 mF 630 620 610 600 −40 −20 0 20 40 60 80 100 120 140 1.0 0.9 0.8 OFF −> ON 0.7 0.6 ON −> OFF 0.5 0.4 VIN = 4.3 V VOUT = 3.3 V CIN = 1 mF COUT = 1 mF 0.3 0.2 0.1 0 −40 −20 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 17. Short Circuit Current vs. Temperature Figure 18. Enable Threshold Voltage vs. Temperature 0.50 100 0.45 90 IDIS, DISABLE CURRENT (nA) IEN, ENABLE PIN CURRENT (mA) ISC, SHORT CIRCUIT CURRENT (mA) VDROP, DROPOUT VOLTAGE (mV) 250 0.40 0.35 0.30 0.25 0.20 VIN = 4.3 V VOUT = 3.3 V CIN = 1 mF COUT = 1 mF 0.15 0.10 0.05 0 −40 −20 0 20 40 60 80 100 120 140 80 70 VIN = 4.3 V VOUT = 3.3 V CIN = 1 mF COUT = 1 mF 60 50 40 30 20 10 0 −40 −20 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 19. Enable Current Temperature Figure 20. Disable Current vs. Temperature www.onsemi.com 7 NCV8161 RDIS, DISCHARGE RESISTIVITY (W) TYPICAL CHARACTERISTICS 300 290 280 270 260 250 240 230 VIN = 4.3 V VOUT = 3.3 V CIN = 1 mF COUT = 1 mF 220 210 200 −40 −20 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) Figure 21. Discharge Resistivity vs. Temperature OUTPUT VOLTAGE NOISE (nV/√Hz) 10,000 IOUT = 450 mA IOUT = 250 mA 1000 IOUT = 10 mA IOUT = 1 mA 100 10 1 RMS Output Noise (mV) VIN = 2.8 V VOUT = 1.8 V CIN = 1 mF COUT = 1 mF 0.01 0.1 1 10 100 IOUT 10 Hz − 100 kHz 100 Hz − 100 kHz 1 mA 14.62 14.10 10 mA 11.12 10.48 250 mA 10.37 9.82 450 mA 10.22 9.62 1000 FREQUENCY (kHz) Figure 22. Output Voltage Noise Spectral Density − VOUT = 1.8 V OUTPUT VOLTAGE NOISE (nV/√Hz) 10,000 IOUT = 250 mA IOUT = 450 mA 1000 IOUT = 10 mA 100 10 1 RMS Output Noise (mV) IOUT = 1 mA VIN = 4.3 V VOUT = 3.3 V CIN = 1 mF COUT = 1 mF 0.01 0.1 1 10 100 IOUT 10 Hz − 100 kHz 100 Hz − 100 kHz 1 mA 16.9 15.79 10 mA 12.64 11.13 250 mA 11.96 10.64 450 mA 11.50 10.40 1000 FREQUENCY (kHz) Figure 23. Output Voltage Noise Spectral Density − VOUT = 3.3 V www.onsemi.com 8 NCV8161 TYPICAL CHARACTERISTICS 120 120 VIN = 2.5 V VOUT = 1.8 V COUT = 1 mF 100 RR, RIPPLE REJECTION (dB) RR, RIPPLE REJECTION (dB) IOUT = 10 mA 80 60 IOUT = 20 mA IOUT = 100 mA 40 IOUT = 250 mA 20 0 0.1 1 10 100 1k VIN = 3.6 V VOUT = 3.3 V COUT = 1 mF 80 60 IOUT = 20 mA 40 IOUT = 100 mA IOUT = 250 mA 20 IOUT = 450 mA 0.01 IOUT = 10 mA 100 0 10k IOUT = 450 mA 0.01 0.1 FREQUENCY (kHz) 1 10 100 1k 10k FREQUENCY (kHz) Figure 24. Power Supply Rejection Ratio, VOUT = 1.8 V Figure 25. Power Supply Rejection Ratio, VOUT = 3.3 V 100 VIN Unstable Operation VOUT 1 V/div ESR (W) 10 1 VOUT = 2.8 V, CIN = 1 mF (MLCC) IOUT = 10 mA, COUT = 1 mF (MLCC) 0 50 100 150 200 250 300 350 400 450 500 4 ms/div IOUT, OUTPUT CURRENT (mA) Figure 27. Turn−on/off − Slow Rising VIN IINPUT VOUT 500 mV/div 200 mA/div VEN 1 V/div 1 V/div 500 mV/div Figure 26. Stability vs. ESR VIN = 2.8 V, VOUT = 1.8 V CIN = 1 mF (MLCC) COUT = 1 mF (MLCC) 200 mA/div 0.1 Stable Operation VEN IINPUT VOUT 100 ms/div VIN = 2.8 V, VOUT = 1.8 V CIN = 1 mF (MLCC) COUT = 1 mF (MLCC) 100 ms/div Figure 28. Enable Turn−on Response − COUT = 1 mF, IOUT = 10 mA Figure 29. Enable Turn−on Response − COUT = 1 mF, IOUT = 250 mA www.onsemi.com 9 NCV8161 TYPICAL CHARACTERISTICS 500 mV/div 10 mV/div 2.3 V VIN VOUT VOUT = 1.8 V, IOUT = 10 mA CIN = 1 mF (MLCC) COUT = 1 mF (MLCC) 3.8 V VIN VOUT VOUT = 3.3 V, IOUT = 10 mA CIN = 1 mF (MLCC) COUT = 1 mF (MLCC) 20 ms/div Figure 30. Line Transient Response − VOUT = 1.8 V Figure 31. Line Transient Response − VOUT = 3.3 V IOUT 200 mA/div 20 ms/div tRISE = 1 ms 100 mV/div 100 mV/div 200 mA/div 10 mV/div 500 mV/div 4.8 V 3.3 V VOUT VIN = 2.8 V, VOUT = 1.8 V CIN = 1 mF (MLCC) COUT = 1 mF (MLCC) IOUT tFALL = 1 ms VOUT VIN = 2.8 V, VOUT = 1.8 V CIN = 1 mF (MLCC) COUT = 1 mF (MLCC) 4 ms/div 20 ms/div Figure 32. Load Transient Response − 1 mA to 450 mA − VOUT = 1.8 V Figure 33. Load Transient Response − 450 mA to 1 mA − VOUT = 1.8 V 200 mA/div IOUT tRISE = 1 ms 100 mV/div 100 mV/div 200 mA/div IOUT VOUT VIN = 4.3 V, VOUT = 3.3 V CIN = 1 mF (MLCC) COUT = 1 mF (MLCC) tFALL = 1 ms VOUT VIN = 4.3 V, VOUT = 3.3 V CIN = 1 mF (MLCC) COUT = 1 mF (MLCC) 4 ms/div 20 ms/div Figure 34. Load Transient Response − 1 mA to 450 mA − VOUT = 3.3 V Figure 35. Load Transient Response − 450 mA to 1 mA − VOUT = 3.3 V www.onsemi.com 10 NCV8161 TYPICAL CHARACTERISTICS 500 mV/div TSD Cycling VEN IOUT VOUT Thermal Shutdown VOUT VIN = 5.5 V VOUT = 3.3 V CIN = 1 mF (MLCC) COUT = 1 mF (MLCC) COUT = 4.7 mF 1 V/div 1 V/div 500 mA/div Short Circuit Event Overheating VIN = 3.8 V VOUT = 2.8 V CIN = 1 mF (MLCC) COUT = 1 mF 10 ms/div 400 ms/div Figure 36. Short Circuit and Thermal Shutdown Figure 37. Enable Turn−off www.onsemi.com 11 NCV8161 APPLICATIONS INFORMATION General transient response or high frequency PSRR. It is not recommended to use tantalum capacitors on the output due to their large ESR. The equivalent series resistance of tantalum capacitors is also strongly dependent on the temperature, increasing at low temperature. The NCV8161 is an ultra−low noise 450 mA low dropout regulator designed to meet the requirements of RF applications and high performance analog circuits. The NCV8161 device provides very high PSRR and excellent dynamic response. In connection with low quiescent current this device is well suitable for battery powered application such as cell phones, tablets and other. The NCV8161 is fully protected in case of current overload, output short circuit and overheating. Enable Operation Input capacitor connected as close as possible is necessary for ensure device stability. The X7R or X5R capacitor should be used for reliable performance over temperature range. The value of the input capacitor should be 1 mF or greater to ensure the best dynamic performance. This capacitor will provide a low impedance path for unwanted AC signals or noise modulated onto constant input voltage. There is no requirement for the ESR of the input capacitor but it is recommended to use ceramic capacitors for their low ESR and ESL. A good input capacitor will limit the influence of input trace inductance and source resistance during sudden load current changes. The NCV8161 uses the EN pin to enable/disable its device and to deactivate/activate the active discharge function. If the EN pin voltage is 1.2 V the device is guaranteed to be enabled. The NCV8161 regulates the output voltage and the active discharge transistor is turned−off. The EN pin has internal pull−down current source with typ. value of 200 nA which assures that the device is turned−off when the EN pin is not connected. In the case where the EN function isn’t required the EN should be tied directly to IN. Output Decoupling (COUT) Output Current Limit Input Capacitor Selection (CIN) The NCV8161 requires an output capacitor connected as close as possible to the output pin of the regulator. The recommended capacitor value is 1 mF and X7R or X5R dielectric due to its low capacitance variations over the specified temperature range. The NCV8161 is designed to remain stable with minimum effective capacitance of 0.7 mF to account for changes with temperature, DC bias and package size. Especially for small package size capacitors such as 0201 the effective capacitance drops rapidly with the applied DC bias. Please refer Figure 38. Output Current is internally limited within the IC to a typical 700 mA. The NCV8161 will source this amount of current measured with a voltage drops on the 90% of the nominal VOUT. If the Output Voltage is directly shorted to ground (VOUT = 0 V), the short circuit protection will limit the output current to 690 mA (typ). The current limit and short circuit protection will work properly over whole temperature range and also input voltage range. There is no limitation for the short circuit duration. Thermal Shutdown When the die temperature exceeds the Thermal Shutdown threshold (TSD * 160°C typical), Thermal Shutdown event is detected and the device is disabled. The IC will remain in this state until the die temperature decreases below the Thermal Shutdown Reset threshold (TSDU − 140°C typical). Once the IC temperature falls below the 140°C the LDO is enabled again. The thermal shutdown feature provides the protection from a catastrophic device failure due to accidental overheating. This protection is not intended to be used as a substitute for proper heat sinking. Power Dissipation As power dissipated in the NCV8161 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and the ambient temperature affect the rate of junction temperature Figure 38. Capacity vs DC Bias Voltage There is no requirement for the minimum value of Equivalent Series Resistance (ESR) for the COUT but the maximum value of ESR should be less than 2 Ω. Larger output capacitors and lower ESR could improve the load www.onsemi.com 12 NCV8161 rise for the part. For reliable operation, junction temperature should be limited to +125°C. The maximum power dissipation the NCV8161 can handle is given by: P D [ V IN @ I GND ) I OUTǒV IN * V OUTǓ (eq. 1) q JA 1.0 220 qJA, 2 oz Cu 0.9 210 200 0.8 qJA, 1 oz Cu 0.7 190 PD(MAX), TA = 25°C, 2 oz Cu 0.6 180 PD(MAX), TA = 25°C, 1 oz Cu 170 0.5 160 0.4 150 0 100 200 300 400 500 600 700 PD(MAX), MAXIMUM POWER DISSIPATION (W) qJA, JUNCTION−TO−AMBIENT THERMAL RESISTANCE (°C/W) P D(MAX) + ƪ125oC * T Aƫ The power dissipated by the NCV8161 for given application conditions can be calculated from the following equations: 0.3 PCB COPPER AREA (mm2) 0.7 325 PD(MAX), TA = 25°C, 2 oz Cu 300 0.6 PD(MAX), TA = 25°C, 1 oz Cu 275 0.5 0.4 250 qJA, 1 oz Cu 225 0.3 qJA, 2 oz Cu 200 0.2 0.1 175 150 0 100 200 300 400 500 600 COPPER HEAT SPREADER AREA (mm2) Figure 40. qJA and PD (MAX) vs. Copper Area (TSOP−5) www.onsemi.com 13 700 0 PD(MAX), MAXIMUM POWER DISSIPATION (W) qJA, JUNCTION−TO−AMBIENT THERMAL RESISTANCE (°C/W) Figure 39. qJA and PD (MAX) vs. Copper Area (XDFN4) (eq. 2) NCV8161 Reverse Current Turn−On Time The PMOS pass transistor has an inherent body diode which will be forward biased in the case that VOUT > VIN. Due to this fact in cases, where the extended reverse current condition can be anticipated the device may require additional external protection. The turn−on time is defined as the time period from EN assertion to the point in which VOUT will reach 98% of its nominal value. This time is dependent on various application conditions such as VOUT(NOM), COUT, TA. Power Supply Rejection Ratio To obtain good transient performance and good regulation characteristics place CIN and COUT capacitors close to the device pins and make the PCB traces wide. In order to minimize the solution size, use 0402 or 0201 capacitors with appropriate capacity. Larger copper area connected to the pins will also improve the device thermal resistance. The actual power dissipation can be calculated from the equation above (Equation 2). Expose pad can be tied to the GND pin for improvement power dissipation and lower device temperature. PCB Layout Recommendations The NCV8161 features very high Power Supply Rejection ratio. If desired the PSRR at higher frequencies in the range 100 kHz – 10 MHz can be tuned by the selection of COUT capacitor and proper PCB layout. ORDERING INFORMATION Device Voltage Option Marking NCV8161ASN180T1G 1.8 V LKH NCV8161ASN280T1G 2.8 V LKL NCV8161ASN300T1G 3.0 V LKJ NCV8161ASN330T1G 3.3 V LKK NCV8161BSN180T1G 1.8 V LKM NCV8161BSN280T1G 2.8 V LKN NCV8161BSN300T1G 3.0 V LKP NCV8161BSN330T1G 3.3 V LKQ NCV8161AMX180TBG (Note 7) 1.8 V DN NCV8161AMX250TBG (Note 7) 2.5 V DP NCV8161AMX280TBG (Note 7) 2.8 V DQ NCV8161AMX290TBG (Note 7) 2.9 V D5 NCV8161AMX300TBG (Note 7) 3.0 V DT NCV8161AMX330TBG (Note 7) 3.3 V DD NCV8161BMX180TBG 1.8 V EN NCV8161BMX250TBG 2.5 V EP NCV8161BMX280TBG (Note 7) 2.8 V EQ NCV8161BMX300TBG 3.0 V ET NCV8161BMX330TBG 3.3 V ED Description Package Shipping† TSOP-5 (Pb-Free) 3000 / Tape & Reel XDFN4 (Pb-Free) 3000 or 5000 / Tape & Reel (Note 7) With Output Active Discharge Function Without Output Active Discharge Function With Output Active Discharge Function Without Output Active Discharge Function †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 7. Products processed after October 1, 2022 are shipped with quantity 5000 units / tape & reel. Bluetooth is a registered trademark of Bluetooth SIG. ZigBee is a registered trademark of ZigBee Alliance. www.onsemi.com 14 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSOP−5 CASE 483 ISSUE N 5 1 SCALE 2:1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSION A. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. D 5X NOTE 5 2X DATE 12 AUG 2020 0.20 C A B 0.10 T M 2X 0.20 T 5 B 1 4 2 B S 3 K DETAIL Z G A A TOP VIEW DIM A B C D G H J K M S DETAIL Z J C 0.05 H C SIDE VIEW SEATING PLANE END VIEW GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT* 0.95 0.037 MILLIMETERS MIN MAX 2.85 3.15 1.35 1.65 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 0_ 10 _ 2.50 3.00 1.9 0.074 5 5 XXXAYWG G 1 1 Analog 2.4 0.094 XXX = Specific Device Code A = Assembly Location Y = Year W = Work Week G = Pb−Free Package 1.0 0.039 XXX MG G Discrete/Logic XXX = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) 0.7 0.028 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the onsemi Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98ARB18753C TSOP−5 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2018 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS XDFN4 1.0x1.0, 0.65P CASE 711AJ ISSUE C GENERIC MARKING DIAGRAM* XX M 1 DOCUMENT NUMBER: DESCRIPTION: XX = Specific Device Code M = Date Code 98AON67179E XDFN4, 1.0X1.0, 0.65P DATE 08 MAR 2022 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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