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NCV8501DADJR2

NCV8501DADJR2

  • 厂商:

    ONSEMI(安森美)

  • 封装:

  • 描述:

    NCV8501DADJR2 - Micropower 150 mA LDO Linear Regulators with ENABLE, DELAY, RESET, and Monitor FLAG ...

  • 数据手册
  • 价格&库存
NCV8501DADJR2 数据手册
NCV8501 Series Micropower 150 mA LDO Linear Regulators with ENABLE, DELAY, RESET, and Monitor FLAG The NCV8501 is a family of precision micropower voltage regulators. Their output current capability is 150 mA. The family has output voltage options for adjustable, 2.5 V, 3.3 V, 5.0 V, 8.0 V, and 10 V. The output voltage is accurate within ±2.0% with a maximum dropout voltage of 0.6 V at 150 mA. Low quiescent current is a feature drawing only 90 mA with a 100 mA load. This part is ideal for any and all battery operated microprocessor equipment. Microprocessor control logic includes an active RESET (with DELAY), and a FLAG monitor which can be used to provide an early warning signal to the microprocessor of a potential impending RESET signal. The use of the FLAG monitor allows the microprocessor to finish any signal processing before the RESET s huts the microprocessor down. The active RESET circuit operates correctly at an output voltage as low as 1.0 V. The RESET function is activated during the power up sequence or during normal operation if the output voltage drops outside the regulation limits. The regulator is protected against reverse battery, short circuit, and thermal overload conditions. The device can withstand load dump transients making it suitable for use in automotive environments. The device has also been optimized for EMC conditions. Features x http://onsemi.com SO−8 D SUFFIX CASE 751 8 1 16 1 SOIC 16 LEAD WIDE BODY EXPOSED PAD PDW SUFFIX CASE 751AG MARKING DIAGRAMS SO−8 8 8501x ALYW G 16 8501x AWLYYWWG SOW−16 E PAD 1 1 • • • • • • • • • • • Output Voltage Options: Adjustable, 2.5 V, 3.3 V, 5.0 V, 8.0 V, 10 V ±2.0% Output Low 90 mA Quiescent Current Fixed or Adjustable Output Voltage Active RESET ENABLE 150 mA Output Current Capability Fault Protection ♦ +60 V Peak Transient Voltage ♦ −15 V Reverse Voltage ♦ Short Circuit ♦ Thermal Overload Early Warning through FLAG/MON Leads NCV Prefix for Automotive and Other Applications Requiring Site and Change Control Pb−Free Packages are Available = Voltage Ratings as Indicated Below: A = Adjustable 2 = 2.5 V 3 = 3.3 V 5 = 5.0 V 8 = 8.0 V 0 = 10 V A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. © Semiconductor Components Industries, LLC, 2007 February, 2007 − Rev. 26 1 Publication Order Number: NCV8501/D NCV8501 Series PIN CONNECTIONS, ADJUSTABLE OUTPUT VIN MON ENABLE NC 1 SO−8 8 VOUT VADJ FLAG GND SOW−16 E PAD 1 16 FLAG NC NC GND NC NC NC ENABLE VADJ VOUT NC NC NC NC VIN MON PIN CONNECTIONS, FIXED OUTPUT VIN MON ENABLE DELAY 1 SO−8 8 VOUT FLAG RESET GND FLAG VOUT NC NC NC NC VIN MON SOW−16 E PAD 1 16 RESET NC NC GND NC NC DELAY ENABLE VBAT 10 mF VIN VOUT 10 mF VDD NCV8501 DELAY CDELAY VADJ (Adjustable Output Only) RESET GND MON RFLG 10 k RRST 10 k ENABLE FLAG I/O Figure 1. Application Diagram http://onsemi.com 2 Microprocessor I/O NCV8501 Series MAXIMUM RATINGS* Rating VIN (dc) Peak Transient Voltage (46 V Load Dump @ VIN = 14 V) Operating Voltage VOUT (dc) Voltage Range (RESET, FLAG) Input Voltage Range (MON) Input Voltage Range (VAOJ) Input Voltage Range (ENABLE) ESD Susceptibility (Human Body Model) Junction Temperature, TJ Storage Temperature, TS Package Thermal Resistance, SO−8: Junction−to−Case, RqJC Junction−to−Ambient, RqJA Junction−to−Case, RqJC Junction−to−Ambient, RqJA Junction−to−Pin, RqJP (Note 1) Reflow: (SMD styles only) (Note 2) Value −15 to 45 60 45 −0.3 to 16 −0.3 to 10 −0.3 to 10 −0.3 to 16 −0.3 to 10** 2.0 −40 to +150 −55 to 150 45 165 15 56 35 240 peak 260 Peak (Pb−Free) (Note 3) Unit V V V V V V V kV °C °C °C/W °C/W °C/W °C/W °C/W °C Package Thermal Resistance, SOW−16 E PAD: Lead Temperature Soldering: Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. *During the voltage range which exceeds the maximum tested voltage of VIN, operation is assured, but not specified. Wider limits may apply. Thermal dissipation must be observed closely. **Reference Figure 14 for switched−battery ENABLE application. 1. Measured to pin 16. 2. 150 second maximum above 183°C, Pb−Free − 150 second maximum above 217°C. 3. −5°C / +0°C allowable conditions, applies to both Pb and Pb−Free devices. http://onsemi.com 3 NCV8501 Series ELECTRICAL CHARACTERISTICS (IOUT = 1.0 mA, ENABLE = 5.0 V, −40°C ≤ TJ ≤ 150°C; VIN dependent on voltage option (Note 4); unless otherwise specified.) Characteristic Output Stage Output Voltage for 2.5 V Option Output Voltage for 3.3 V Option Output Voltage for 5.0 V Option Output Voltage for 8.0 V Option Output Voltage for 10 V Option Output Voltage for Adjustable Option 6.5 V < VIN < 16 V, 100 mA ≤ IOUT ≤ 150 mA 5.5 V < VIN < 26 V, 100 mA ≤ IOUT ≤ 150 mA 7.3 V < VIN < 16 V, 100 mA ≤ IOUT ≤ 150 mA 5.5 V < VIN < 26 V, 100 mA ≤ IOUT ≤ 150 mA 9.0 V < VIN < 16 V, 100 mA ≤ IOUT ≤ 150 mA 6.0 V < VIN < 26 V, 100 mA ≤ IOUT ≤ 150 mA 9.0 V < VIN < 26 V, 100 mA ≤ IOUT ≤ 150 mA 11 V < VIN < 26 V, 100 mA ≤ IOUT ≤ 150 mA VOUT = VADJ (Unity Gain) 6.5 V < VIN < 16 V, 100 mA < IOUT < 150 mA 5.5 V < VIN < 26 V, 100 mA < IOUT < 150 mA IOUT = 150 mA IOUT = 1.0 mA VIN = 14 V, 5.0 mA ≤ IOUT ≤ 150 mA [VOUT(Typ) + 1.0] < VIN < 26 V, IOUT = 1.0 mA IOUT = 100 mA, VIN = 12 V, MON = VOUT − − − − − − IOUT = 75 mA, VIN = 14 V, MON = VOUT IOUT = 150 mA, VIN = 14 V, MON = VOUT ENABLE = 0 V, VIN = 12 V − VOUT = 0 V (Guaranteed by Design) − − − 151 40 150 90 90 90 100 100 50 4.0 12 12 300 190 180 125 125 125 150 150 75 6.0 19 30 − − − mA mA mA mA mA mA mA mA mA mA mA °C 2.450 2.425 3.234 3.201 4.90 4.85 7.76 9.7 1.254 1.242 − − −30 − 2.5 2.5 3.3 3.3 5.0 5.0 8.0 10 1.280 1.280 400 100 5.0 15 2.550 2.575 3.366 3.399 5.10 5.15 8.24 10.3 1.306 1.318 600 150 30 60 V V V V V V V V V V mV mV mV mV Test Conditions Min Typ Max Unit Dropout Voltage (VIN − VOUT) (5.0 V, 8.0 V, 10 V, and Adj. > 5.0 V Options Only) Load Regulation Line Regulation Quiescent Current, Low Load 2.5 V Option 3.3 V Option 5.0 V Option 8.0 V Option 10 V Option Adjustable Option Quiescent Current, Medium Load All Options Quiescent Current, High Load All Options Quiescent Current, (IQ) Sleep Mode Current Limit Short Circuit Output Current Thermal Shutdown Reset Function (RESET) RESET Threshold for 2.5 V Option HIGH (VRH) LOW (VRL) RESET Threshold for 3.3 V Option HIGH (VRH) LOW (VRL) RESET Threshold for 5.0 V Option HIGH (VRH) LOW (VRL) RESET Threshold for 8.0 V Option HIGH (VRH) LOW (VRL) 5.5 V ≤ VIN ≤ 26 V (Note 5) VOUT Increasing VOUT Decreasing 5.5 V ≤ VIN ≤ 26 V (Note 5) VOUT Increasing VOUT Decreasing VOUT Increasing VOUT Decreasing VOUT Increasing VOUT Decreasing 2.28 2.25 3.00 2.97 4.55 4.50 7.05 7.00 2.350 2.300 3.102 3.036 4.70 4.60 7.52 7.36 0.98 × VOUT 0.97 × VOUT 0.98 × VOUT 0.97 × VOUT 0.98 × VOUT 0.97 × VOUT 0.98 × VOUT 0.97 × VOUT V V V V V V V V 4. Voltage range specified in the Output Stage of the Electrical Characteristics in boldface type. 5. For VIN ≤ 5.5 V, a RESET = Low may occur with the output in regulation. http://onsemi.com 4 NCV8501 Series ELECTRICAL CHARACTERISTICS (IOUT = 1.0 mA, ENABLE = 5.0 V, −40°C ≤ TJ ≤ 150°C; VIN dependent on voltage option (Note 4); unless otherwise specified.) Characteristic Reset Function (RESET) RESET Threshold for 10 V Option HIGH (VRH) LOW (VRL) Output Voltage Low (VRLO) DELAY Switching Threshold (VDT) DELAY Low Voltage DELAY Charge Current DELAY Discharge Current FLAG/Monitor Monitor Threshold Hysteresis Input Current Output Saturation Voltage MON = 2.0 V MON = 0 V, IFLAG = 1.0 mA VADJ = 1.28 V Low High ENABLE = 5.0 V Increasing and Decreasing − 1.10 20 −0.5 − 1.20 50 0.1 0.1 1.31 100 0.5 0.4 V mV mA V VOUT Increasing VOUT Decreasing 1.0 V ≤ VOUT ≤ VRL, RRESET = 10 k − VOUT < RESET Threshold Low(min) DELAY = 1.0 V, VOUT > VRH DELAY = 1.0 V, VOUT = 1.5 V 8.60 8.50 − 1.4 − 1.5 5.0 9.40 9.20 0.1 1.8 − 2.5 − 0.98 × VOUT 0.97 × VOUT 0.4 2.2 0.1 3.5 − V V V V V mA mA Test Conditions Min Typ Max Unit Voltage Adjust (Adjustable Output only) Input Current ENABLE Input Threshold Input Current − 3.0 − − − 1.0 0.5 − 5.0 V V mA −0.5 − 0.5 mA 4. Voltage range specified in the Output Stage of the Electrical Characteristics in boldface type. 5. For VIN ≤ 5.5 V, a RESET = Low may occur with the output in regulation. http://onsemi.com 5 NCV8501 Series PACKAGE PIN DESCRIPTION, ADJUSTABLE OUTPUT Package Pin Number SO−8 1 2 3 4 5 6 7 8 SOW−16 E PAD 7 8 9 3−6, 10−12, 14, 15 13 16 1 2 Pin Symbol VIN MON ENABLE NC GND FLAG VADJ VOUT Input Voltage. Function Monitor. Input for early warning comparator. If not needed connect to VOUT. ENABLE control for the IC. A high powers the device up. No connection. Ground. All GND leads must be connected to Ground. Open collector output from early warning comparator. Voltage Adjust. A resistor divider from VOUT to this lead sets the output voltage. ±2.0%, 150 mA output. PACKAGE PIN DESCRIPTION, FIXED OUTPUT Package Pin Number SO−8 1 2 3 4 5 6 7 8 − SOW−16 E PAD 7 8 9 10 13 16 1 2 3−6, 11, 12, 14, 15 Pin Symbol VIN MON ENABLE DELAY GND RESET FLAG VOUT NC Input Voltage. Function Monitor. Input for early warning comparator. If not needed connect to VOUT. ENABLE control for the IC. A high powers the device up. Timing capacitor for RESET function. Ground. All GND leads must be connected to Ground. Active reset (accurate to VOUT ≥ 1.0 V) Open collector output from early warning comparator. ±2.0%, 150 mA output. No connection. http://onsemi.com 6 NCV8501 Series TYPICAL PERFORMANCE CHARACTERISTICS 5.01 VOUT = 5.0 V VIN = 14 V IOUT = 5.0 mA 5.00 VOUT (V) VOUT (V) 3.35 3.34 3.33 3.32 3.31 3.30 3.29 3.28 4.98 −40 −25 −10 5 20 35 50 65 Temperature (°C) 80 95 110 125 3.27 −40 −25 −10 5 20 35 50 65 Temperature (°C) 80 95 110 125 VOUT = 3.3 V VIN = 14 V IOUT = 5.0 mA 4.99 Figure 2. Output Voltage vs. Temperature 1.2 1.0 0.8 IQ (mA) 0.6 0.4 0.2 0 0 5 10 15 IOUT (mA) 20 25 14 12 +125°C +25°C −40°C 10 IQ (mA) 8 6 4 2 0 0 Figure 3. Output Voltage vs. Temperature VIN = 12 V VIN = 12 V +125°C +25°C −40°C 15 30 45 60 75 90 IOUT (mA) 105 120 135 140 Figure 4. Quiescent Current vs. Output Current Figure 5. Quiescent Current vs. Output Current 7 6 5 IQ (mA) 4 3 2 1 0 6 8 10 12 14 IOUT = 50 mA IOUT = 10 mA 16 18 VIN (V) 20 22 24 26 IOUT = 100 mA IQ (mA) T = 25°C 120 T = 25°C 100 80 60 49 20 0 IOUT = 100 mA 6 8 10 12 14 16 18 VIN (V) 20 22 24 26 Figure 6. Quiescent Current vs. Input Voltage Figure 7. Quiescent Current vs. Input Voltage http://onsemi.com 7 NCV8501 Series TYPICAL PERFORMANCE CHARACTERISTICS 450 400 Quiescent Current (mA) Dropout Voltage (mV) 350 300 250 200 150 100 50 0 0 25 50 VOUT = 5.0 V, 8.0 V, or 10 V 75 IOUT (mA) 100 125 150 +125°C 16 14 12 10 8 6 4 2 0 −40 −25 −10 5 20 35 50 65 Temperature (°C) 80 95 110 125 VIN = 12 V +25°C −40°C Figure 8. Dropout Voltage vs. Output Current Figure 9. Sleep Mode IQ vs. Temperature 1000 Unstable Region 100 10 V ESR (W) 2.5 V 3.3 V 1.0 Stable Region 0.1 CVOUT = 10 mF 0.01 0 10 20 30 40 50 60 70 80 90 100 OUTPUT CURRENT (mA) 5V 10 8V 1000 Unstable Region 100 CVout = 0.1 mF ESR (W) 10 1.0 Stable Region 0.1 0.01 CVout = 10 mF 0 10 20 30 40 50 60 70 80 OUTPUT CURRENT (mA) 90 100 110 Figure 10. Output Stability with Output Voltage Change Figure 11. Output Stability with Output Capacitor Change http://onsemi.com 8 NCV8501 Series VOUT Current Source (Circuit Bias) IBIAS Current Limit Sense VIN ENABLE + + − VBG RESET + − IBIAS +− VBG 1.8 V Thermal Protection Bandgap Reference VBG + 20 k Adjustable Version only VADJ GND Error Amplifier Fixed Voltage only 3.0 mA Delay IBIAS VBG IBIAS FLAG MON − Figure 12. Block Diagram http://onsemi.com 9 NCV8501 Series CIRCUIT DESCRIPTION REGULATOR CONTROL FUNCTIONS The NCV8501 contains the microprocessor compatible control function RESET (Figure 13). The DELAY lead provides source current (typically 2.5 mA) to the external DELAY capacitor during the following proceedings: 1. During Power Up (once the regulation threshold has been verified). 2. After a reset event has occurred and the device is back in regulation. The DELAY capacitor is discharged when the regulation (RESET threshold) has been violated. This is a latched incident. The capacitor will fully discharge and wait for the device to regulate before going through the delay time event again. FLAG/Monitor Function VIN RESET Threshold DELAY Threshold (VDT) VOUT DELAY RESET Td Td Figure 13. Reset and Delay Circuit Wave Forms RESET Function A RESET signal (low voltage) is generated as the IC powers up until VOUT is within 6.0% of the regulated output voltage, or when VOUT drops out of regulation,and is lower than 8.0% below the regulated output voltage. Hysteresis is included in the function to minimize oscillations. The RESET output is an open collector NPN transistor, controlled by a low voltage detection circuit. The circuit is functionally independent of the rest of the IC thereby guaranteeing that the RESET signal is valid for VOUT as low as 1.0 V. ENABLE Function An on−chip comparator is provided to perform an early warning to the microprocessor of a possible reset signal. The reset signal typically turns the microprocessor off instantaneously. This can cause unpredictable results with the microprocessor. The signal received from the FLAG pin will allow the microprocessor time to complete its present task before shutting down. This function is performed by a comparator referenced to the bandgap reference. The actual trip point can be programmed externally using a resistor divider to the input monitor (MON) (Figure 15). The typical threshold is 1.20 V on the MON pin. VBAT VIN MON RADJ VOUT VCC COUT I/O RESET mP The part stays in a low IQ sleep mode when the ENABLE pin is held low. The part has an internal pull down if the pin is left floating. This is intended for failure modes only. An external connection (active pulldown, resistor, or switch) for normal operation is recommended. The integrity of the ENABLE pin allows it to be tied directly to the battery line through an external resistor. It will withstand load dump potentials in this configuration. VBAT 10 k VIN VOUT NCV8501 FLAG RESET DELAY GND Figure 15. FLAG/Monitor Function Voltage Adjust NCV8501 ENABLE GND Figure 16 shows the device setup for a user configurable output voltage. The feedback to the VADJ pin is taken from a voltage divider referenced to the output voltage. The loop is balanced around the Unity Gain threshold (1.28 V typical). VOUT ≈5.0 V 15 k 1.28 V 5.1 k COUT Figure 14. ENABLE Function DELAY Function NCV8501 VADJ The reset delay circuit provides a programmable (by external capacitor) delay on the RESET output lead. Figure 16. Adjustable Output Voltage http://onsemi.com 10 NCV8501 Series APPLICATION NOTES VIN NCV8501 VIN VADJ VBAT C2 0.1 mF R1 294 k R2 100 k VOUT MJD31C >1 Amp 5.0 V CIN* 0.1 mF VOUT NCV8501 RESET RRST COUT** 10 mF C1 47 mF *CIN required if regulator is located far from the power supply filter **COUT required for stability. Capacitor must operate at minimum temperature expected Figure 17. Additional Output Current Adding Capability Figure 19. Test and Application Circuit Showing Output Compensation Figure 17 shows how the adjustable version of parts can be used with an external pass transistor for additional current capability. The setup as shown will provide greater than 1 Amp of output current. FLAG MONITOR Figure 18 shows the FLAG Monitor waveforms as a result of the circuit depicted in Figure 15. As the output voltage falls (VOUT), the Monitor threshold is crossed. This causes the voltage on the FLAG output to go low sending a warning signal to the microprocessor that a RESET signal may occur in a short period of time. TWARNING is the time the microprocessor has to complete the function it is currently working on and get ready for the RESET shutdown signal. VOUT SETTING THE DELAY TIME The delay time is controlled by the Reset Delay Low Voltage, Delay Switching Threshold, and the Delay Charge Current. The delay follows the equation: tDELAY + [CDELAY(Vdt * Reset Delay Low Voltage)] Delay Charge Current Example: Using CDELAY = 33 nF. Assume reset Delay Low Voltage = 0. Use the typical value for Vdt = 1.8 V. Use the typical value for Delay Charge Current = 2.5 mA. tDELAY + [33 nF(1.8 * 0)] + 23.8 ms 2.5 mA MON FLAG Monitor Ref. Voltage STABILITY CONSIDERATIONS The output or compensation capacitor helps determine three main characteristics of a linear regulator: start−up delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. The value for the output capacitor COUT shown in Figure 19 should work for most applications, however it is not necessarily the optimized solution. RESET FLAG TWARNING Figure 18. FLAG Monitor Circuit Waveform http://onsemi.com 11 NCV8501 Series Thermal Resistance, Junction to Ambient, RqJA, (°C/W) CALCULATING POWER DISSIPATION IN A SINGLE OUTPUT LINEAR REGULATOR The maximum power dissipation for a single output regulator (Figure 20) is: PD(max) + [VIN(max) * VOUT(min)] IOUT(max) ) VIN(max)IQ (eq. 1) 100 90 80 70 60 50 40 0 200 400 600 Copper Area (mm2) 800 where: VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current for the application, and IQ is the quiescent current the regulator consumes at IOUT(max). Once the value of PD(max) is known, the maximum permissible value of RqJA can be calculated: T RQJA + 150°C * A PD (eq. 2) Figure 21. 16 Lead SOW (Exposed Pad), qJA as a Function of the Pad Copper Area (2 oz. Cu Thickness), Board Material = 0.0625, G−10/R−4 The value of RqJA can then be compared with those in the package section of the data sheet. Those packages with RqJA’s less than the calculated value in Equation 2 will keep the die temperature below 150°C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. IIN VIN SMART REGULATOR® IOUT VOUT HEATSINKS A heatsink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RqJA: RqJA + RqJC ) RqCS ) RqSA (eq. 3) } Control Features IQ Figure 20. Single Output Regulator with Key Performance Parameters Labeled where: RqJC = the junction−to−case thermal resistance, RqCS = the case−to−heatsink thermal resistance, and RqSA = the heatsink−to−ambient thermal resistance. RqJC appears in the package section of the data sheet. Like RqJA, it too is a function of package type. RqCS and RqSA are functions of the package type, heatsink and the interface between them. These values appear in heatsink data sheets of heatsink manufacturers. http://onsemi.com 12 NCV8501 Series ORDERING INFORMATION Device NCV8501DADJ NCV8501DADJG NCV8501DADJR2 NCV8501DADJR2G NCV8501PDWADJ NCV8501PDWADJG NCV8501PDWADJR2 NCV8501PDWADJR2G NCV8501D25 NCV8501D25G NCV8501D25R2 NCV8501D25R2G NCV8501PDW25 NCV8501PDW25G NCV8501PDW25R2 NCV8501PDW25R2G NCV8501D33 NCV8501D33G NCV8501D33R2 NCV8501D33R2G NCV8501PDW33 NCV8501PDW33G NCV8501PDW33R2 NCV8501PDW33R2G NCV8501D50 NCV8501D50G NCV8501D50R2 NCV8501D50R2G NCV8501PDW50 NCV8501PDW50G NCV8501PDW50R2 NCV8501PDW50R2G NCV8501D80 Output Voltage Adjustable Adjustable Adjustable Adjustable Adjustable Adjustable Adjustable Adjustable 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 5.0 V 5.0 V 5.0 V 5.0 V 5.0 V 5.0 V 5.0 V 5.0 V 8.0 V Package SO−8 SO−8 (Pb−Free) SO−8 SO−8 (Pb−Free) SOW−16 Exposed Pad SOW−16 Exposed Pad (Pb−Free) SOW−16 Exposed Pad SOW−16 Exposed Pad (Pb−Free) SO−8 SO−8 (Pb−Free) SO−8 SO−8 (Pb−Free) SOW−16 Exposed Pad SOW−16 Exposed Pad (Pb−Free) SOW−16 Exposed Pad SOW−16 Exposed Pad (Pb−Free) SO−8 SO−8 (Pb−Free) SO−8 SO−8 (Pb−Free) SOW−16 Exposed Pad SOW−16 Exposed Pad (Pb−Free) SOW−16 Exposed Pad SOW−16 Exposed Pad (Pb−Free) SO−8 SO−8 (Pb−Free) SO−8 SO−8 (Pb−Free) SOW−16 Exposed Pad SOW−16 Exposed Pad (Pb−Free) SOW−16 Exposed Pad SOW−16 Exposed Pad (Pb−Free) SO−8 Shipping † 98 Units/Rail 98 Units/Rail 2500 Tape & Reel 2500 Tape & Reel 47 Units/Rail 47 Units/Rail 1000 Tape & Reel 1000 Tape & Reel 98 Units/Rail 98 Units/Rail 2500 Tape & Reel 2500 Tape & Reel 47 Units/Rail 47 Units/Rail 1000 Tape & Reel 1000 Tape & Reel 98 Units/Rail 98 Units/Rail 2500 Tape & Reel 2500 Tape & Reel 47 Units/Rail 47 Units/Rail 1000 Tape & Reel 1000 Tape & Reel 98 Units/Rail 98 Units/Rail 2500 Tape & Reel 2500 Tape & Reel 47 Units/Rail 47 Units/Rail 1000 Tape & Reel 1000 Tape & Reel 98 Units/Rail †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. http://onsemi.com 13 NCV8501 Series ORDERING INFORMATION Device NCV8501D80G NCV8501D80R2 NCV8501D80R2G NCV8501PDW80 NCV8501PDW80G NCV8501PDW80R2 NCV8501PDW80R2G NCV8501D100 NCV8501D100G NCV8501D100R2 NCV8501D100R2G NCV8501PDW100 NCV8501PDW100G NCV8501PDW100R2 NCV8501PDW100R2G Output Voltage 8.0 V 8.0 V 8.0 V 8.0 V 8.0 V 8.0 V 8.0 V 10 V 10 V 10 V 10 V 10 V 10 V 10 V 10 V Package SO−8 (Pb−Free) SO−8 SO−8 (Pb−Free) SOW−16 Exposed Pad SOW−16 Exposed Pad (Pb−Free) SOW−16 Exposed Pad SOW−16 Exposed Pad (Pb−Free) SO−8 SO−8 (Pb−free) SO−8 SO−8 (Pb−Free) SOW−16 Exposed Pad SOW−16 Exposed Pad (Pb−Free) SOW−16 Exposed Pad SOW−16 Exposed Pad (Pb−Free) Shipping † 98 Units/Rail 2500 Tape & Reel 2500 Tape & Reel 47 Units/Rail 47 Units/Rail 1000 Tape & Reel 1000 Tape & Reel 98 Units/Rail 98 Units/Rail 2500 Tape & Reel 2500 Tape & Reel 47 Units/Rail 47 Units/Rail 1000 Tape & Reel 1000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. http://onsemi.com 14 NCV8501 Series PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AH −X− A 8 5 B 1 S 4 0.25 (0.010) M Y M −Y− G K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 C −Z− H D 0.25 (0.010) M SEATING PLANE N X 45 _ 0.10 (0.004) M J ZY S X S DIM A B C D G H J K M N S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 15 NCV8501 Series PACKAGE DIMENSIONS SOIC 16 LEAD WIDE BODY, EXPOSED PAD PDW SUFFIX CASE 751AG−01 − U− ISSUE O M 16 1 8 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751R−01 OBSOLETE, NEW STANDARD 751R−02. MILLIMETERS MIN MAX 10.15 10.45 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 3.31 3.51 0.25 0.32 0.00 0.10 4.58 4.78 0_ 7_ 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.400 0.411 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.130 0.138 0.010 0.012 0.000 0.004 0.180 0.188 0_ 7_ 0.395 0.415 0.010 0.029 A P 0.25 (0.010) M W M B −W− R x 45 _ PIN 1 I.D. G TOP SIDE 14 PL DETAIL E C 0.10 (0.004) T −T− D 16 PL 0.25 (0.010) H 1 8 M F K TU S SEATING PLANE W S J DETAIL E EXPOSED PAD SOLDERING FOOTPRINT* L 0.350 0.175 0.050 DIM A B C D F G H J K L M P R 16 9 Exposed Pad BACK SIDE C L 0.200 0.074 0.188 C L 0.376 0.024 0.145 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 16 NCV8501/D
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