NCV8505 Series
LDO Linear Regulators Micropower, ENABLE,
DELAY, RESET
400 mA
The NCV8505 is a family of precision micropower voltage
regulators. Their output current capability is 400 mA. The family has
output voltage options for Adjustable, 2.5 V, 3.3 V and 5.0 V.
The output voltage is accurate within ± 2.0% with a maximum
dropout voltage of 0.6 V at 400 mA. Low quiescent current is a feature
drawing less than 1.0 mA with ENABLE = 0 V. With ENABLE = 5.0 V,
the part only draws 200 mA with 100 mA load. This part is ideal for any
and all battery operated microprocessor equipment.
Microprocessor control logic includes an active RESET (with
DELAY).
The active RESET circuit operates correctly at an output voltage as
low as 1.0 V. The RESET function is activated during the power up
sequence or during normal operation if the output voltage drops below
the regulation limits.
The regulator is protected against reverse battery, short circuit, and
thermal overload conditions. The device can withstand load dump
transients making it suitable for use in automotive environments. The
device has also been optimized for EMC conditions.
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
Output Voltage Options: Adjustable, 2.5 V, 3.3 V, 5.0 V
± 2.0% Output
Low < 1.0 mA Sleep Current
Low 200 mA Quiescent Current
Fixed or Adjustable Output Voltage
Active RESET
ENABLE
400 mA Output Current Capability
Fault Protection
♦ +60 V Peak Transient Voltage
♦ −15 V Reverse Voltage
♦ Short Circuit
♦ Thermal Overload
NCV Prefix for Automotive and Other Applications Requiring Site
and Change Control
AEC Qualified
PPAP Capable
These are Pb−Free Devices
© Semiconductor Components Industries, LLC, 2009
September, 2019 − Rev. 12
1
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MARKING
DIAGRAM
1
D2PAK−7
DPS SUFFIX
CASE 936AB
NC
V8505x
AWLYWWG
1
x
= Voltage Ratings as Indicated Below:
A = Adjustable
2 = 2.5 V
3 = 3.3 V
5 = 5.0 V
A
= Assembly Location
WL = Wafer Lot
Y
= Year
WW = Work Week
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
Publication Order Number:
NCV8505/D
NCV8505 Series
PIN CONNECTIONS
ADJUSTABLE OUTPUT
Tab = GND
Lead
1. DELAY
2. ENABLE
3. RESET
4. GND
5. VADJ
6. VOUT
7. VIN
1
IQ
Tab = GND
Lead
1. DELAY
2. ENABLE
3. RESET
4. GND
5. SENSE
6. VOUT
7. VIN
1
SENSE
(Fixed Output Only)
VIN
VOUT
VDD
33 mF
10 mF
NCV8505
DELAY
CDELAY
Microprocessor
VBAT
FIXED OUTPUT
RRST
5.1 k
VADJ
(Adjustable
Output Only)
ENABLE
RESET
I/O
GND
Figure 1. Application Diagram
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2
NCV8505 Series
MAXIMUM RATINGS
Rating
Value
Unit
−15 to 45
V
Peak Transient Voltage (46 V Load Dump @ VIN = 14 V)
60
V
Operating Voltage
45
V
−0.3 to 16
V
Voltage Range (RESET, DELAY)
−0.3 to 10
V
Input Voltage Range:
VADJ
−0.3 to 16
V
Input Voltage Range (ENABLE)
−0.3 to 10*
V
4.0
200
kV
V
−40 to +150
°C
VIN (DC)
VOUT (DC)
ESD Susceptibility
(Human Body Model)
(Machine Model)
Junction Temperature, TJ
Storage Temperature, TS
Package Thermal Resistance, 7 Lead D2PAK
−55 to 150
°C
2.0
10−50**
°C/W
°C/W
240 peak (Note 2)
°C
Junction−to−Case, RqJC
Junction−to−Ambient, RqJA
Lead Temperature Soldering:
Reflow: (SMD styles only) (Note 1)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. 60 second maximum above 183°C.
2. −5°C/+0°C allowable conditions.
*Reference Figure 16 for switched−battery ENABLE application.
**Depending on thermal properties of substrate, RqJA = RqJC + RqCA.
ELECTRICAL CHARACTERISTICS (IOUT = 1.0 mA, ENABLE = 5.0 V, −40°C ≤ TJ ≤ 150°C; VIN = dependent on voltage option (Note 3);
unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
Output Stage
Output Voltage for 2.5 V Option (VO)
6.5 V < VIN < 16 V, 1.0 mA ≤ IOUT ≤ 400 mA
4.5 V < VIN < 26 V, 1.0 mA ≤ IOUT ≤ 400 mA
2.450
2.425
2.5
2.5
2.550
2.575
V
V
Output Voltage for 3.3 V Option (VO)
7.3 V < VIN < 16 V, 1.0 mA ≤ IOUT ≤ 400 mA
4.5 V < VIN < 26 V, 1.0 mA ≤ IOUT ≤ 400 mA
3.234
3.201
3.3
3.3
3.366
3.399
V
V
Output Voltage for 5.0 V Option (VO)
9.0 V < VIN < 16 V, 1.0 mA ≤ IOUT ≤ 400 mA
6.0 V < VIN < 26 V, 1.0 mA ≤ IOUT ≤ 400 mA
4.90
4.85
5.0
5.0
5.10
5.15
V
V
Output Voltage for Adjustable Option (VO)
VOUT = VADJ (Unity Gain)
6.5 V < VIN < 16 V, 1.0 mA < IOUT < 400 mA
4.5 V < VIN < 26 V, 1.0 mA < IOUT < 400 mA
1.274
1.261
1.300
1.300
1.326
1.339
V
V
Dropout Voltage (VIN − VOUT)
(5.0 V and Adj. > 5.0 V Options Only)
IOUT = 400 mA
IOUT = 1.0 mA
−
−
400
30
600
150
mV
mV
Load Regulation
VIN = 14 V, 5.0 mA ≤ IOUT ≤ 400 mA
−30
5.0
30
mV
Line Regulation (2.5 V, 3.3 V, and
Adjustable Options)
4.5 V < VIN < 26 V, IOUT = 1.0 mA
−
5.0
25
mV
Line Regulation (5.0 V Option)
6.0 V < VIN < 26 V, IOUT = 1.0 mA
−
5.0
25
mV
Quiescent Current, (IQ) Active Mode
IOUT = 100 mA, VIN = 12 V
IOUT = 75 mA, VIN = 14 V
IOUT ≤ 400 mA, VIN = 14 V
−
−
−
200
2.5
25
350
5.0
45
mA
mA
mA
Quiescent Current, (IQ) Sleep Mode
ENABLE = 0 V, VIN = 12 V, −40°C ≤ TJ ≤ 125°C
−
−
1.0
mA
−
425
800
−
mA
Current Limit
Short Circuit Output Current
VOUT = 0 V
100
500
−
mA
Thermal Shutdown
(Guaranteed by Design)
150
180
−
°C
3. Voltage range specified in the Output Stage of the Electrical Characteristics in boldface type.
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3
NCV8505 Series
ELECTRICAL CHARACTERISTICS (continued) (IOUT = 1.0 mA, ENABLE = 5.0 V, −40°C ≤ TJ ≤ 150°C; VIN = dependent on
voltage option (Note 4); unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
2.35
2.30
25
−
−
−
1.0 × VO
−
−
V
V
mV
3.10
3.00
35
−
−
−
1.0 × VO
−
−
V
V
mV
4.70
4.60
50
−
−
−
1.0 × VO
−
−
V
V
mV
1.22
1.19
10
−
−
−
1.0 × VO
−
−
V
V
mV
−
0.1
0.4
V
Reset Function (RESET)
RESET Threshold for 2.5 V Option
HIGH (VRH)
LOW (VRL)
Hysteresis
VIN = 4.5 V (Note 5) (Note 6)
VOUT Increasing
VOUT Decreasing
RESET Threshold for 3.3 V Option
HIGH (VRH)
LOW (VRL)
Hysteresis
VIN = 4.5 V (Note 5) (Note 6)
VOUT Increasing
VOUT Decreasing
RESET Threshold for 5.0 V Option
HIGH (VRH)
LOW (VRL)
Hysteresis
VIN = 6.0 V (Note 6)
VOUT Increasing
VOUT Decreasing
RESET Threshold for Adjustable Option
HIGH (VRH)
LOW (VRL)
Hysteresis
VIN = 4.5 V (Note 5) (Note 6)
VOUT Increasing
VOUT Decreasing
RESET Output Voltage
Low (VRLO)
VIN = Minimum (Note 6) (Note 7)
1.0 V ≤ VOUT ≤ VRL, RRESET = 5.1 k
DELAY Switching Threshold (VDT)
(2.5 V, 3.3 V, and 5.0 V Options)
VIN = Minimum (Note 6) (Note 7)
1.4
1.8
2.2
V
DELAY Switching Threshold (VDT)
(Adjustable Option)
VIN = Minimum (Note 6) (Note 7)
1.0
1.3
1.6
V
DELAY Low Voltage
VIN = Minimum (Note 6) (Note 7)
VOUT < RESET Threshold Low(min)
−
−
0.2
V
DELAY Charge Current
VIN = Minimum (Note 6) (Note 7)
DELAY = 1.0 V, VOUT > VRH
2.5
4.0
5.5
mA
DELAY Discharge Current
VIN = Minimum (Note 6) (Note 7)
DELAY = 1.0 V, VOUT < VRL
5.0
−
−
mA
VADJ = 1.25 V, VIN = Minimum (Note 6) (Note 7)
−0.5
−
0.5
mA
Input Threshold
Low, VIN = 14 V (Note 6)
High, VIN = 14 V (Note 6)
−
2.0
−
−
1.0
−
V
V
Input Current
ENABLE = 5.0 V, VIN = 14 V (Note 6)
−
30
75
mA
Voltage Adjust (Adjustable Output only)
Input Current
ENABLE
4.
5.
6.
7.
Voltage range specified in the Output Stage of the Electrical Characteristics in boldface type.
For VIN ≤ 4.5 V, a RESET = Low may occur with the output in regulation.
Part is guaranteed by design to meet specification over the entire VIN voltage range, but is production tested only at the specified VIN voltage.
Minimum VIN = 4.5 V for 2.5 V, 3.3 V, and Adjustable options. Minimum VIN = 6.0 V for 5.0 V option.
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4
NCV8505 Series
PACKAGE PIN DESCRIPTION, ADJUSTABLE OUTPUT
Pin Number
Pin Symbol
Function
1
DELAY
2
ENABLE
3
RESET
4
GND
Ground. All GND leads must be connected to Ground.
5
VADJ
Voltage Adjust. A resistor divider from VOUT to this lead sets the output voltage.
6
VOUT
±2.0%, 400 mA output.
7
VIN
Timing capacitor for RESET function.
ENABLE control for the IC. A high powers the device up.
Active reset (accurate to VOUT ≥ 1.0 V)
Input Voltage.
PACKAGE PIN DESCRIPTION, FIXED OUTPUT
Pin Number
Pin Symbol
1
DELAY
2
ENABLE
3
RESET
4
GND
5
SENSE
6
VOUT
7
VIN
Function
Timing capacitor for RESET function.
ENABLE control for the IC. A high powers the device up.
Active reset (accurate to VOUT ≥ 1.0 V)
Ground. All GND leads must be connected to Ground.
Kelvin connection which allows remote sensing of output voltage for improved regulation. If
remote sensing is not desired, connect to VOUT.
±2.0%, 400 mA output.
Input Voltage.
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5
NCV8505 Series
VOUT
VIN
+
−
ENABLE
Current Source
(Circuit Bias)
SENSE
1.5 V
IBIAS
Current Limit
Sense
IBIAS
+ −
DELAY
+
VBG
−
RESET
VBG −18 mV
−
Thermal
Protection
4.0 mA
Bandgap
Reference
IBIAS
Error Amplifier
+
1.8 V (Fixed Versions)
1.3 V (Adjustable Version)
VBG
Figure 2. Block Diagram
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6
Fixed Versions only
15 k
Adjustable
Version only
VADJ
GND
NCV8505 Series
TYPICAL PERFORMANCE CHARACTERISTICS
3.35
VOUT = 5.0 V
VIN = 14 V
IOUT = 5.0 mA
Vout, OUTPUT VOLTAGE (V)
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
Vout, OUTPUT VOLTAGE (V)
5.10
VOUT = 3.3 V
VIN = 14 V
IOUT = 5.0 mA
3.33
3.31
3.29
3.27
3.25
4.92
4.90
−40 −20
0
3.23
−40 −20
20 40
60 80 100 120 140 160
TEMPERATURE (°C)
Figure 3. 5 V Output Voltage vs. Temperature
Vout, OUTPUT VOLTAGE (V)
2.53
2.52
2.51
2.50
2.49
2.48
2.47
DROPOUT VOLTAGE (mV)
600
VOUT = 2.5 V
VIN = 14 V
IOUT = 5.0 mA
2.54
2.46
500
125 °C
400
25 °C
300
200
−40 °C
100
5 V and Adj. > 5 V options only
2.45
−40 −20
0
0
20 40
60 80 100 120 140 160
TEMPERATURE (°C)
Figure 5. 2.5 V Output Voltage vs. Temperature
0
50
300
100 150
200
250
Iout, OUTPUT CURRENT (mA)
350
400
Figure 6. Dropout Voltage vs. Output Current
3.0
5.0
4.5
2.5
4.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
20 40
60 80 100 120 140 160
TEMPERATURE (°C)
Figure 4. 3.3 V Output Voltage vs. Temperature
2.55
3.5
3.0
2.5
2.0
1.5
125 °C
1.0
25 °C
0.5
0.0
0
4
8
1.5
−40 °C
25 °C
125 °C
1.0
0.5
IOUT = 1 mA
−40 °C
0
2.0
12
16
20
0.0
1.4
24
IOUT = 1 mA
1.6
1.8
2.0
2.2
2.4
2.6
2.8
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 7. Output Voltage vs. Input Voltage
Figure 8. Output Voltage vs. Input Voltage
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7
3.0
NCV8505 Series
TYPICAL PERFORMANCE CHARACTERISTICS
100
Unstable Region
CVOUT = 33 mF*
Unstable Region
3.3 V
10
2.5 V
10
ESR (W)
ESR (W)
100
5.0 V
1.0
Unstable Region
VIN = 14 V
CVOUT = 10 mF
0.01
300
100 150 200
250
Iout, OUTPUT CURRENT (mA)
50
0
350
0.1
400
Figure 9. Output Stability with Output Voltage Change
+25°C
−40°C
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
5
10
40
15 20
25 30 35
IOUT, OUTPUT CURRENT (mA)
45
+125°C
+25°C
−40°C
30
20
10
6
Iout = 100 mA
Iout = 50 mA
Iout = 10 mA
0
6
8
10
12 14
16 18 20
VIN, INPUT VOLTAGE (V)
22
24
50
0
100 150 200 250 300 350 400 450 500
IOUT, OUTPUT CURRENT (mA)
210
T = 25°C
8
2
400
Figure 12. Quiescent Current vs. Output Current
10
4
350
40
0
50
IQ, QUIESCENT CURRENT (mA)
IQ, QUIESCENT CURRENT (mA)
Iout = 200 mA
5 V version
300
100 150 200
250
Iout, OUTPUT CURRENT (mA)
50
50
Figure 11. Quiescent Current vs. Output Current
12
0
60
+125°C
1.6
*There is no unstable lower
region for the 33 mF capacitor
Figure 10. Output Stability with Output Capacitor
Change
IQ, QUIESCENT CURRENT (mA)
IQ, QUIESCENT CURRENT (mA)
2.0
1.8
CVOUT = 0.1 mF
1.0
Stable Region
0.1
Stable Region
205
200
190
185
180
175
26
Figure 13. Quiescent Current vs. Input Voltage
Iout = 100 mA
195
T = 25°C
8
6
10
12 14
16 18 20
VIN, INPUT VOLTAGE (V)
22
24
26
Figure 14. Quiescent Current vs. Input Voltage
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NCV8505 Series
CIRCUIT DESCRIPTION
REGULATOR CONTROL FUNCTIONS
The NCV8505 contains the microprocessor compatible
control function RESET (Figure 15).
DELAY Function
The reset delay circuit provides a programmable (by
external capacitor) delay on the RESET output lead.
The DELAY lead provides source current (typically 4.0 mA)
to the external DELAY capacitor during the following
proceedings:
1. During Power Up (once the regulation threshold
has been verified).
2. After a reset event has occurred and the device is
back in regulation. The DELAY capacitor is
discharged when the regulation (RESET threshold)
has been violated. This is a latched incident. The
capacitor will fully discharge and wait for the
device to regulate before going through the delay
time event again.
VIN
RESET
Threshold
VOUT
DELAY
Threshold
(VDT)
DELAY
RESET
Td
Td
Figure 15. Reset and Delay Circuit Wave Forms
Voltage Adjust
RESET Function
Figure 17 shows the device setup for a user configurable
output voltage. The feedback to the VADJ pin is taken from
a voltage divider referenced to the output voltage. The loop
is balanced around the Unity Gain threshold (1.30 V
typical).
A RESET signal (low voltage) is generated as the IC
powers up until VOUT is within 1.5% of the regulated output
voltage, or when VOUT drops out of regulation,and is lower
than 4.0% below the regulated output voltage. Hysteresis is
included in the function to minimize oscillations.
The RESET output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC thereby
guaranteeing that the RESET signal is valid for VOUT as low
as 1.0 V.
NCV8505
VADJ
The part stays in a low IQ sleep mode when the ENABLE
pin is held low. The part has an internal pull down if the pin
is left floating.
The integrity of the ENABLE pin allows it to be tied to the
battery line through an external resistor. It will withstand
load dump potentials in this configuration.
10 k
15 k
COUT
1.28 V
5.1 k
ENABLE Function
VBAT
Up to 45 V
≈5.0 V
VOUT
Figure 17. Adjustable Output Voltage
VOUT
VIN
NCV8505
ENABLE
GND
Figure 16. ENABLE Function
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NCV8505 Series
APPLICATION NOTES
SETTING THE DELAY TIME
The delay time is controlled by the Reset Delay Low
Voltage, Delay Switching Threshold, and the Delay Charge
Current. The delay follows the equation:
tDELAY +
PD(max) + [VIN(max) * VOUT(min)] IOUT(max)
) VIN(max)IQ
where:
VIN(max) is the maximum input voltage,
VOUT(min) is the minimum output voltage,
IOUT(max) is the maximum output current for the
application, and
IQ is the quiescent current the regulator consumes at
IOUT(max).
Once the value of PD(max) is known, the maximum
permissible value of RqJA can be calculated:
ƪCDELAY(Vdt * Reset Delay Low Voltage)ƫ
Delay Charge Current
Example:
Using CDELAY = 33 nF.
Assume reset Delay Low Voltage = 0.
Use the typical value for Vdt = 1.8 V (2.5 V, 3.3 V, and
5.0 V options).
Use the typical value for Delay Charge Current = 4.2 mA.
tDELAY +
ƪ33 nF(1.8 * 0)ƫ
4.2 mA
o
T
RqJA + 150 C * A
PD
+ 14 ms
NCV8505
RRST
IOUT
IIN
VIN
SMART
REGULATOR®
VOUT
} Control
Features
IQ
Figure 19. Single Output Regulator with Key
Performance Parameters Labeled
HEAT SINKS
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of RqJA:
VOUT
CIN*
0.1 mF
(2)
The value of RqJA can then be compared with those in the
package section of the data sheet. Those packages with
RqJA’s less than the calculated value in equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
STABILITY CONSIDERATIONS
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: start−up
delay, load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum or
aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause
instability. The aluminum electrolytic capacitor is the least
expensive solution, but, if the circuit operates at low
temperatures (−25°C to −40°C), both the value and ESR of
the capacitor will vary considerably. The capacitor
manufacturers data sheet usually provides this information.
The value for the output capacitor COUT shown in Figure 18
should work for most applications, however it is not
necessarily the optimized solution.
VIN
(1)
COUT**
33 mF
RESET
RqJA + RqJC ) RqCS ) RqSA
*CIN required if regulator is located far from the power supply
filter.
**COUT required for stability. Capacitor must operate at minimum
temperature expected.
(3)
where:
RqJC = the junction−to−case thermal resistance,
RqCS = the case−to−heatsink thermal resistance, and
RqSA = the heatsink−to−ambient thermal resistance.
RqJC appears in the package section of the data sheet. Like
RqJA, it too is a function of package type. RqCS and RqSA are
functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heat sink manufacturers.
Figure 18. Test and Application Circuit Showing
Output Compensation
CALCULATING POWER DISSIPATION IN A
SINGLE OUTPUT LINEAR REGULATOR
The maximum power dissipation for a single output
regulator (Figure 19) is:
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10
NCV8505 Series
ORDERING INFORMATION
Device
Output Voltage
NCV8505D2TADJG
NCV8505D2TADJR4G
Adjustable
NCV8505D2T25G
NCV8505D2T25R4G
2.5 V
NCV8505D2T33G
NCV8505D2T33R4G
3.3 V
NCV8505D2T50G
NCV8505D2T50R4G
5.0 V
Package
Shipping†
D2PAK−7
(Pb−Free)
50 Units / Rail
D2PAK−7
(Pb−Free)
750 Tape & Reel
D2PAK−7
(Pb−Free)
50 Units / Rail
D2PAK−7
(Pb−Free)
750 Tape & Reel
D2PAK−7
(Pb−Free)
50 Units / Rail
D2PAK−7
(Pb−Free)
750 Tape & Reel
D2PAK−7
(Pb−Free)
50 Units / Rail
D2PAK−7
(Pb−Free)
750 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
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11
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
D2PAK−7 (SHORT LEAD)
CASE 936AB−01
ISSUE B
DATE 08 SEP 2009
A
1
SCALE 1:1
E
L1
B
A
0.10
A
E/2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH AND GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED
0.005 MAXIMUM PER SIDE. THESE DIMENSIONS
TO BE MEASURED AT DATUM H.
4. THERMAL PAD CONTOUR OPTIONAL WITHIN
DIMENSIONS E, L1, D1, AND E1. DIMENSIONS
D1 AND E1 ESTABLISH A MINIMUM MOUNTING
SURFACE FOR THE THERMAL PAD.
SEATING
PLANE
M
B A
M
E1
c2
D1
D
7X
H
DETAIL C
e
b
0.13
M
B A
VIEW A−A
c
A
M
B
H
SEATING
PLANE
A1
RECOMMENDED
SOLDERING FOOTPRINT*
L
0.424
INCHES
MIN
MAX
0.170
0.180
0.000
0.010
0.026
0.036
0.017
0.026
0.045
0.055
0.325
0.368
0.270
−−−
0.380
0.420
0.245
−−−
0.050 BSC
0.539
0.579
0.058
0.078
−−−
0.066
0.010 BSC
0°
8°
MILLIMETERS
MIN
MAX
4.32
4.57
0.00
0.25
0.66
0.91
0.43
0.66
1.14
1.40
8.25
9.53
6.86
−−−
9.65
10.67
6.22
−−−
1.27 BSC
13.69
14.71
1.47
1.98
−−−
1.68
0.25 BSC
0°
8°
GENERIC
MARKING DIAGRAM*
M
L3
DIM
A
A1
b
c
c2
D
D1
E
E1
e
H
L
L1
L3
M
GAUGE
PLANE
XX
XXXXXXXXX
AWLYWWG
DETAIL C
0.310
0.584
1
XXXXX
A
WL
Y
WW
G
0.136
7X
0.050
PITCH
0.040
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14119D
D2PAK−7 (SHORT LEAD)
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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