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NCV8508CPD501R2G

NCV8508CPD501R2G

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    SOIC8_150MIL_EP

  • 描述:

    NCV8508CPD501R2G

  • 数据手册
  • 价格&库存
NCV8508CPD501R2G 数据手册
LDO Regulator - Watchdog, Wake Up and Reset 5.0 V, 250 mA NCV8508C The NCV8508C is a precision micropower Low Dropout (LDO) voltage regulator. The part contains many of the required features for powering microprocessors. Its robustness makes it suitable for severe automotive environments. In addition, the NCV8508C is ideal for use in battery operated, microprocessor controlled equipment because of its low quiescent current. www.onsemi.com MARKING DIAGRAMS 8 Features • • • • • • • • • • 8 1 Output Voltage Option: 5.0 V Output Voltage Accuracy: ±2% Output Current up to 250 mA Low Dropout Voltage Low Quiescent Current of 76 mA Micropower Compatible Control Functions: ♦ Watchdog ♦ RESET ♦ Wake Up Protection Features: ♦ Thermal Shutdown ♦ Current Limitation NCV Prefix for Automotive and Other Applications Requiring Site and Change Control AEC−Q100 Grade 1 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant 508yCx ALYW G SOIC−8 EP PD SUFFIX CASE 751AC x y A L Y W G 1 = Voltage Option 5 − 5.0 V = Timing Option 1 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information on page 18 of this data sheet. Applications (for safety applications refer to Figure 26) • Body and Chassis • Instrument and Clusters • Engine Control Unit VBAT CIN 0.1 mF VOUT VIN WDI Delay RDelay 60 kW GND RESET Wake Up COUT 1.0 mF VDD I/O RESET I/O Microprocessor NCV8508C MRA4004T3 *CIN required if regulator is located far from power supply filter. If extremely fast input voltage transients are expected then appropriate input filter must be used. The filter can be composed of several capacitors in parallel Figure 1. Application Circuit © Semiconductor Components Industries, LLC, 2013 July, 2021 − Rev. 0 1 Publication Order Number: NCV8508C/D NCV8508C PIN CONNECTIONS Delay 1 8 GND RESET Wake Up Sense WDI VOUT VIN SOIC−8 EP PACKAGE PIN DESCRIPTION PACKAGE PIN # PIN SYMBOL FUNCTION 1 Delay Delay Timing. Buffered reference voltage used to create timing current for RESET and Watchdog threshold frequency from RDelay. 2 GND Power Supply Ground. 3 Sense Kelvin connection which allows remote sensing of the output voltage for improved regulation. Connect to VOUT if remote sensing is not required. 4 VOUT Regulated Output Voltage. 5 VIN Positive Power Supply. Connect capacitor to ground. 6 WDI CMOS compatible Watchdog Input. The watchdog function monitors the falling edge of the incoming signal. 7 Wake Up 8 RESET EPAD EPAD Continuously generated signal that interrupts the microprocessor from sleep mode. CMOS compatible output lead RESET goes low whenever VOUT drops by more than 7.0% from nominal, or during the absence of a correct Watchdog signal. Connect to Ground potential or leave unconnected. www.onsemi.com 2 NCV8508C VIN VOUT Ilimiter Sense TSD FB Rail Reference VREF + − + − UVLO WDI Watchdog + Wake Up Logic Buffer Reset Driver RESET Iref Delay + − Timing Circuit GND Figure 2. Block Diagram www.onsemi.com 3 Wake Up Driver Wake Up NCV8508C MAXIMUM RATINGS Rating Symbol Min Max Unit DC Voltage (Note 1) − Input Voltage VIN −0.3 40 V Peak Transient Voltage (Load Dump) (Note 2) − Input Voltage US * − 45 V Output Voltage VOUT −0.3 7 V Sense Voltage Sense −0.3 7 V RESET Output Voltage Powered chip or connected external components to chip Pin to Ground only, all other pins left disconnected VRESET −0.3 −0.3 VOUT +7.0 RESET Output Current (RESET may be incidentally shorted either to VOUT or to GND without damage) IRESET − Internally Limited −0.3 −0.3 VOUT +7.0 V mA Wake Up Voltage Powered chip or connected external components to chip Pin to Ground only, all other pins left disconnected VWU V Watchdog Input Voltage VWDI −0.3 7 V Delay Timing Voltage VDelay −0.3 3.6 V Operating Junction Temperature TJ −40 150 °C Storage Temperature Range TS −55 150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. Load Dump Test B (with centralized load dump suppression) according to ISO16750-2 standard. Guaranteed by design. Not tested in production. Passed Class A according to ISO16750−1. ESD CAPABILITY (Note 3) Rating Symbol Min Max Unit ESD Capability, Human Body Model ESDHBM −2 2 kV ESD Capability, Charged Device Model ESDCDM −1 1 kV 3. This device series incorporates ESD protection and is tested by the following methods: ESD HBM tested per AEC−Q100−002 (JS−001−2017). Field Induced Charge Device Model ESD characterization is not performed on plastic molded packages with body sizes 2 × 2 mm due to the inability of a small package body to acquire and retain enough charge to meet the minimum CDM discharge current waveform characteristic defined in JEDEC JS−002−2018. LEAD SOLDERING TEMPERATURE AND MSL (Note 4) Symbol Rating Moisture Sensitivity Level SOIC−8 EP MSL Value 2 4. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. THERMAL CHARACTERISTICS See Package Thermal Data Section (Page 15) www.onsemi.com 4 Unit − NCV8508C ELECTRICAL CHARACTERISTICS VIN = 13.5 V, CIN = 0.1 mF, COUT = 1 mF, RDelay = 60 kW, Min and Max values are valid for temperature range −40°C ≤ TJ ≤ 150°C unless noted otherwise and are guaranteed by test, design or statical correlation. Typical values are referenced to TJ = 25°C (Note 5). Test Conditions Symbol Min Typ Max Unit Output Voltage VIN = 6 V to 28 V, IOUT = 0.1 mA to 150 mA VOUT 4.9 5.0 5.1 V Line Regulation VIN = 6 V to 28 V, IOUT = 5.0 mA Regline −20 − 20 mV Load Regulation IOUT = 0.1 mA to 150 mA Regload −30 − 30 mV Current Limit VOUT = 96% of VOUT_nom ILIM 255 505 800 mA Dropout Voltage (Note 6) IOUT = 150 mA VDO − 355 700 mV IOUT = 0 mA IOUT = 0.1 mA Iq − − 74 76 83 85 mA Vth(RO) 90 93 95 % VOUT_nom Parameter OUTPUT QUIESCENT CURRENT Quiescent Current, Iq = IIN − IOUT RESET OUTPUT Output Voltage Reset Threshold Reset Output Low Voltage Rload = 10 kW to VOUT, VOUT = 1.0 V VROL − 0.025 0.4 V Reset Output High Voltage Rload = 10 kW to GND VROH 4.50 4.86 − V Power On Reset Delay Time RDelay = 60 kW, IOUT = 5 mA RDelay = 120 kW, IOUT = 5 mA RDelay = 500 kW, IOUT = 5 mA tRD 2 − − 3.1 6.2 26 4 − − ms tRR − 20 − ms Threshold Voltage WDIhigh 30 50 70 % VOUT Hysteresis (Note 7) WDIhys 25 100 − mV − 1.1 2 mA TWUP 18 − − 24 47 194 32 − − ms tWUDC 45 50 55 % Reset Reaction Time (Note 7) WATCHDOG INPUT Input Current WDI = 6 V WAKE UP OUTPUT Wake Up Period RDelay = 60 kW RDelay = 120 kW RDelay = 500 kW Wake Up Duty Cycle Nominal RESET HIGH to Wakeup Rising Delay Time 50% RESET rising edge to 50% Wake Up edge RDelay = 60 kW RDelay = 120 kW RDelay = 500 kW tRHWU Wake Up Response to Watchdog Input 50% WDI falling edge to 50% Wake Up falling edge tWUWH Wake Up Response to RESET 50% RESET falling edge to 50% Wake Up falling edge VOUT = VOUT_nom → 90% of VOUT_nom tWURT ms 9 − − 12 23.5 97 16 − − − 0.80 2 ms ms − 0.012 1 Output Low Rload = 10 kW to VOUT, VOUT ≥ 1.0 V VWUL − 0.085 0.4 V Output High Rload = 10 kW to GND VWUH 4.5 4.86 − V RDelay = 60 kW, 120 kW, 500 kW VDelay − 0.48 − V DELAY Output Voltage www.onsemi.com 5 NCV8508C ELECTRICAL CHARACTERISTICS (continued) VIN = 13.5 V, CIN = 0.1 mF, COUT = 1 mF, RDelay = 60 kW, Min and Max values are valid for temperature range −40°C ≤ TJ ≤ 150°C unless noted otherwise and are guaranteed by test, design or statical correlation. Typical values are referenced to TJ = 25°C (Note 5). Parameter Test Conditions Symbol Min Typ Max Unit Thermal Shutdown Threshold (Note 7) TSD 150 175 210 °C Thermal Shutdown Hysteresis (Note 7) TSH − 8 − °C THERMAL SHUTDOWN Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 5. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA ≈ TJ. Low duty cyclepulse techniques are used during testing to maintain the junction temperature as close to ambient as possible 6. Measured when the output voltage has dropped 100 mV from the nominal value. 7. Values based on design and/or characterization. www.onsemi.com 6 NCV8508C TIMING DIAGRAMS VIN RESET Wake Up Duty Cycle = 50% Wake Up RESET High to Wake Up Delay Time Wake Up Duty Cycle will be 50% when the WDI pulse occurs at the low state of the Wake Up Signal. WDI VOUT POR Power Up Min WDI falling edge delay after Wake Up rising edge Microprocessor Sleep Mode Normal Operation with Varying Watchdog Signal Figure 3. Power Up, Sleep Mode and Normal Operation VIN RESET Delay Time RESET Wake Up RESET High to Wake Up Delay Time WDI VOUT POR Wake Up Period Figure 4. Error Condition: Watchdog Remains Low and a RESET Is Issued RESET Wake Up Wake Up Period Wake Up Response to Reset WDI VIN RESET Threshold VOUT POR VOUT Decreasing Power Down Figure 5. Power Down and Restart Sequence www.onsemi.com 7 POR Wake Up Response to WDI NCV8508C TYPICAL PERFORMANCE CHARACTERISTICS 250 Iq, QUIESCENT CURRENT (mA) Iq, QUIESCENT CURRENT (mA) 90 85 80 75 70 65 −40 −20 VIN = 13.5 V IOUT = 100 mA 200 150 100 50 0 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 6. Quiescent Current vs. Junction Temperature 160 TJ = 25°C TJ = 125°C 140 TJ = −40°C 120 100 80 VIN = 13.5 V 0 50 100 150 200 IOUT, OUTPUT CURRENT (mA) 35 40 5.06 5.04 5.02 5.00 4.98 4.96 4.94 VIN = 13.5 V IOUT = 100 mA 4.92 4.90 250 −40 −20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) Figure 9. Output Voltage vs. Junction Temperature 1000 VDO, DROPOUT VOLTAGE (mV) 6 VOUT, OUTPUT VOLTAGE (V) 10 15 20 25 30 VIN, INPUT VOLTAGE (V) 5.08 Figure 8. Quiescent Current vs. Output Current 5 4 3 TJ = 125°C 2 TJ = 25°C 1 TJ = −40°C IOUT = 100 mA 0 5 5.10 VOUT, OUTPUT VOLTAGE (V) Iq, QUIESCENT CURRENT (mA) 0 Figure 7. Quiescent Current vs. Input Voltage 180 60 TJ = 25°C IOUT = 100 mA 0 1 2 3 4 5 6 VIN, INPUT VOLTAGE (V) 7 900 800 700 500 TJ = 25°C 400 300 TJ = −40°C 200 100 0 8 TJ = 125°C 600 VIN = 13.5 V 0 Figure 10. Output Voltage vs. Input Voltage 50 100 150 200 IOUT, OUTPUT CURRENT (mA) 250 Figure 11. Dropout Voltage vs. Output Current www.onsemi.com 8 NCV8508C TYPICAL PERFORMANCE CHARACTERISTICS 600 ILIM, ISC CURRENT LIMIT (mA) VDO, DROPOUT VOLTAGE (mV) 700 600 500 IOUT = 150 mA 400 300 200 100 ILIM @ VOUT = 96% VOUT_nom 500 400 300 200 100 VIN = 13.5 V 0 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) 0 −40 −20 160 Figure 12. Dropout Voltage vs. Junction Temperature VOUT, OUTPUT VOLTAGE (V) ILIM, ISC CURRENT LIMIT (mA) ILIM @ VOUT = 96% VOUT_nom 400 300 200 ISC @ VOUT = 0 V 100 TJ = 25°C 0 5 10 15 20 25 30 VIN, INPUT VOLTAGE (V) 35 4 3 2 1 0 40 VIN = 13.5 V TJ = 25°C 0 Figure 14. Output Current Limit vs. Input Voltage 100 200 300 400 500 IOUT, OUTPUT CURRENT (mA) 600 Figure 15. Foldback Characteristic of Output Voltage 30 5 4 3 2 VIN = 13.5 V RDelay = 60 kW 1 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) tRD, POWER ON RESET DELAY TIME (ms) 6 tRD, POWER ON RESET DELAY TIME (ms) 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (°C) 5 500 0 VIN = 13.5 V Figure 13. Output Current Limit vs. Junction Temperature 600 0 ISC @ VOUT = 0 V 160 25 20 15 10 5 0 0 Figure 16. Reset Delay Time vs. Junction Temperature VIN = 13.5 V TJ = 25°C 100 200 300 400 RDelay, RESET DELAY RESISTOR (kW) 500 Figure 17. Reset Delay Time vs. Reset Delay Resistor www.onsemi.com 9 NCV8508C TYPICAL PERFORMANCE CHARACTERISTICS 200 TWUP, WAKE UP PERIOD (ms) TWUP, WAKE UP PERIOD (ms) 35 30 25 20 15 10 VIN = 13.5 V RDelay = 60 kW 0 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) 40 VIN = 13.5 V TJ = 25°C 0 100 300 400 500 Figure 19. Wakeup Period vs. Reset Delay Resistor COUT = 1 mF Unstable Region 10 COUT = 4.7 mF 300 ESR (W) 400 200 RDelay, RESET DELAY RESISTOR (kW) 500 Stable Region 1 COUT = 22 mF 200 0.1 VIN = 13.5 V COUT = 1.0 mF − 100 mF TJ = 25°C COUT = 100 mF 100 0 0 80 100 VIN = 13.5 V trise/fall = 1 ms TJ = 25°C 50 100 150 200 0.01 250 0 IOUT, OUTPUT CURRENT (mA) 50 100 150 200 IOUT, OUTPUT CURRENT (mA) Figure 21. Output Stability with Output Capacitor ESR Figure 20. Load Transient Response 100 90 80 IOUT = 150 mA 70 PSRR (dB) VOUT, TRANSIENT UNDERSHOOT (mV) 600 120 0 160 Figure 18. Wakeup Period vs. Junction Temperature 700 160 60 IOUT = 100 mA 50 40 30 20 VIN = 13.5 V ± 0.5 Vpp COUT = 1.0 mF 10 0 10 100 1000 10000 100000 f, FREQUENCY (Hz) Figure 22. PSRR vs. Frequency www.onsemi.com 10 1000000 250 NCV8508C TYPICAL PERFORMANCE CHARACTERISTICS 70 VIN, INPUT VOLTAGE (V) 60 5.2 VOUT 50 40 30 4.8 IOUT = 5 mA trise/fall = 1 ms COUT = 4.7 mF TJ = 25°C 28 V 20 10 5 4.999 V 6V 0 −100 4.6 4.4 4.2 VIN 0 100 200 300 400 500 TIME (ms) 600 700 800 VOUT, OUTPUT VOLTAGE (V) 5.4 5.168 V 4 Figure 23. Line Transients 5.4 5.194 V 300 VOUT 250 VIN = 13.5 mA trise/fall = 1 ms COUT = 4.7 mF TJ = 25°C 4.796 V 200 150 150 mA 100 5 4.8 4.6 4.4 50 IOUT 5 mA 0 −100 5.2 0 100 200 300 400 TIME (ms) 500 600 Figure 24. Load Transients www.onsemi.com 11 700 4.2 4 800 VOUT, OUTPUT VOLTAGE (V) IOUT, OUTPUT CURRENT (mA) 350 NCV8508C DEFINITIONS General Current Limit and Short Circuit Current Limit All measurements are performed using short pulse low duty cycle techniques to maintain junction temperature as close as possible to ambient temperature. Current Limit is value of output current by which output voltage drops below 96% of its nominal value. Short Circuit Current Limit is output current value measured with output of the regulator shorted to ground. Output voltage The output voltage parameter is defined for specific temperature, input voltage and output current values or specified over Line, Load and Temperature ranges. PSRR Power Supply Rejection Ratio is defined as ratio of output voltage and input voltage ripple. It is measured in decibels (dB). Line Regulation The change in output voltage for a change in input voltage measured for specific output current over operating ambient temperature range. Line Transient Response Typical output voltage overshoot and undershoot response when the input voltage is excited with a given slope. Load Regulation The change in output voltage for a change in output current measured for specific input voltage over operating ambient temperature range. Load Transient Response Typical output voltage overshoot and undershoot response when the output current is excited with a given slope between low−load and high−load conditions. Dropout Voltage The input to output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. It is measured when the output drops 100 mV below its nominal value. The junction temperature, load current, and minimum input supply requirements affect the dropout level. Thermal Protection Quiescent and Disable Currents Maximum Package Power Dissipation Quiescent Current (Iq) is the difference between the input current (measured through the LDO input pin) and the output load current. The power dissipation level is maximum allowed power dissipation for particular package or power dissipation at which the junction temperature reaches its maximum operating value, whichever is lower. Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 175°C, the regulator turns off. This feature is provided to prevent failures from accidental overheating. www.onsemi.com 12 NCV8508C OPERATING DESCRIPTION General 3. RESET will switch low if the regulator does not receive a Watchdog input signal within a Wake Up period 4. Regardless of output voltage, RESET will switch low if the regulator input voltage VIN, falls below a level required to sustain the internal control circuits. The specific voltage is temperature dependent, and is approximately 4.65 V at 25°C The NCV8508C is a precision micropower voltage regulator featuring low quiescent current (126 mA typical at 150 mA load) and low dropout voltage (355 mV typical at 150 mA). Integrated microprocessor control functions include Watchdog, Wake Up and RESET. The combination of low quiescent current and comprehensive microprocessor interface functions make the NCV8508C ideal for use in both battery operated and automotive applications. The NCV8508C is internally protected against short circuit and thermal runaway conditions. No external components are required to engage these protective mechanisms. The device continues to operate through 45 V input transients, an important consideration in automotive environments. The Wake Up output is pulled low during a RESET regardless of the cause of the RESET. After the RESET returns high, the Wake Up cycle begins again (see Figure 5). The Reset Delay Time, Wake Up signal period and RESET HIGH to Wake Up Rising Delay Time are all set by one external resistor, RDelay, according to the following equations: Wake Up and Watchdog To reduce battery drain, a microprocessor or microcontroller can transition to a low current consumption mode (sleep mode) when code execution is suspended or complete. The NCV8508C Wake Up signal is generated and output periodically to interrupt sleep mode. The nominal Wake Up output is a 5 V square wave (generated from VOUT) with a duty cycle of 50%, at a frequency determined by external timing resistor RDelay. In response to the rising edge of the Wake Up signal, the microprocessor will subsequently output a Watchdog pulse and check its inputs to decide if it should resume normal operation or remain in sleep mode. The NCV8508C responds to the falling edge of the Watchdog signal, which it expects at least once during each Wake Up period. Minimum WDI pulse width must be higher than 1 ms and WDI falling edge must not occur during 5 ms after Wake Up signal rising edge, otherwise WDI falling edge may not be accepted by watchdog logic. This provides higher robustness of watchdog logic against glitch pulses and disturbances in the application. When the correct Watchdog signal is received, the Wake Up output is forced low. Other Watchdog pulses received within the same cycle are ignored. The Watchdog circuitry continuously monitors the input Watchdog signal (WDI) from the microprocessor. The absence of a falling edge on the Watchdog input during one Wake Up cycle will cause a Reset pulse to be output at the end of the Wake Up cycle (see Figure 5). As output voltage falls, the output will maintain its current state down to VOUT = 1 V. A Reset signal (active low) is asserted for any of four conditions: 1. During power up, RESET is held low until the output voltage is in regulation 2. During operation, if the output voltage falls below the Reset Threshold Voltage, RESET switches low, and will remain low until both the output voltage has recovered and the Reset delay timer cycle has completed following that recovery T WUP + (3.95 10 *7) R Delay (eq. 1) t RD + (5.20 10 *8) R Delay (eq. 2) t RHWU + (1.96 10 *7) R Delay (eq. 3) Thermal Considerations As power in the NCV8508C increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material and the ambient temperature affect the rate of junction temperature rise for the part. When the NCV8508C has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power applications. The maximum dissipation the NCV8508C can handle is given by: P D(MAX) + [T J(MAX) ) T A] (eq. 4) R qJA Since TJ is not recommended to exceed 150°C, then the NCV8508C (SOIC−8 EP) soldered on 645 mm2, 1 oz copper area, FR4 can dissipate up to 1.48 W when the ambient temperature (TA) is 25°C. See Figure 25 for RqJA versus PCB copper area. The power dissipated by the NCV8508C can be calculated from the following equations: P D + V IN I q@I OUT ) I OUT (V IN * V OUT) (eq. 5) or V IN(MAX) + P D(MAX) ) (I OUT I OUT ) I q V OUT) (eq. 6) The value of RqJA can then be compared with those in the package section of the data sheet. Those packages with RqJA less than the calculated value in Equation 4 will keep the die temperature below 150°C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. www.onsemi.com 13 RqJA, THERMAL RESISTANCE (°C/W) NCV8508C R qJA + R qJC ) R qCS ) R qSA 160 140 where: 120 RqJC = the junction−to−case thermal resistance, 1 oz, Single Layer 100 RqCS = the case−to−heatsink thermal resistance, and RqSA = the heatsink−to−ambient thermal resistance. 80 RqJC appears in the package section of the data sheet. Like RqJA, it too is a function of package type. RqCS and RqSA are functions of the package type, heatsink and the interface between them. These values appear in data sheets of heatsink manufacturers. 2 oz, Single Layer 60 40 20 0 (eq. 7) 0 100 200 300 400 500 600 700 Hints VIN and GND printed circuit board traces should be as wide as possible. When the impedance of these traces is high, there is a chance to pick up noise or cause the regulator to malfunction. Place external components, especially the output capacitor, as close as possible to the NCV8508C and make traces as short as possible. The NCV8508C is not developed in compliance with ISO26262 standard. If application is safety critical then the below application example diagram shown in Figure 26 can be used. COPPER HEAT SPREADER AREA (mm2) Figure 25. Thermal Resistance vs. PCB Copper Area (SOIC−8 EP) Heatsinks A heatsink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RqJA: VBAT VIN VOUT VOUT VDD COUT CIN VCC RESET Voltage Supervisor NCV8508C (e.g. NCV30X, NCV809) I/O Microprocessor GND Delay RDelay WDI I/O RESET I/O Wake Up I/O GND Figure 26. Application Diagram www.onsemi.com 14 NCV8508C RECOMMEND THERMAL DATA FOR SOIC−8 EP PACKAGE Parameter Test Conditions Typical Value Unit Min−Pad Board (Note 8) 1”−pad Board (Note 9) Junction−to−Lead (psi−JL, YJL) 88.3 39.9 °C/W Junction−to−Lead (psi−JPad, YJp) 21.0 22.3 °C/W Junction−to−Ambient (RqJA, qJA) 139.6 76.8 °C/W Pad is Soldered to PCB Copper 8. 1 oz. copper, 54 mm2 copper area, 0.062” thick FR4. 9. 1 oz. copper, 717 mm2 copper area, 0.062” thick FR4. 8−SOIC EP Half Symmetry Top view With and without mold compound Bottom view With mold compound Copper Pad Layout 25 x 25mm Figure 27. Internal Construction of the Package and PCB Layout for Multiple Pad Area www.onsemi.com 15 NCV8508C Table 1. SOIC 8−Lead EP Thermal RC Network Models 54 mm2 717 mm2 54 mm2 Cauer Network 717 mm2 Cu Area Foster Network C’s C’s Units Tau Tau Units 1 1.21E−06 1.21E−06 Ws/°C 1.00E−06 1.00E−06 s 2 4.64E−06 4.64E−06 Ws/°C 1.00E−05 1.00E−05 s 3 1.33E−05 1.33E−05 Ws/°C 1.00E−04 1.00E−04 s 4 6.61E−05 6.61E−05 Ws/°C 4.44E−04 4.44E−04 s 5 5.80E−04 5.82E−04 Ws/°C 1.48E−03 1.48E−03 s 6 8.28E−03 8.64E−03 Ws/°C 3.30E−02 3.30E−02 s 7 2.56E−02 3.14E−02 Ws/°C 6.00E−01 6.00E−01 s 8 1.42E−01 5.01E−01 Ws/°C 4.00E+00 4.00E+00 s 9 3.81E−01 1.98E+00 Ws/°C 1.16E+01 4.83E+01 s 10 1.38E+00 2.93E+01 Ws/°C 5.85E+01 2.37E+02 s R’s R’s R’s R’s 1 1.061 1.061 °C/W 0.627 0.627 °C/W 2 2.502 2.502 °C/W 1.357 1.357 °C/W 3 7.018 7.016 °C/W 4.290 4.290 °C/W 4 5.901 5.896 °C/W 6.946 6.946 °C/W 5 2.261 2.247 °C/W 5.026 5.026 °C/W 6 5.048 4.657 °C/W 3.000 3.000 °C/W 7 21.735 15.845 °C/W 15.000 15.000 °C/W 8 41.592 9.514 °C/W 11.494 7.797 °C/W 9 25.463 20.786 °C/W 34.982 20.473 °C/W 10 27.050 7.289 °C/W 56.911 12.298 °C/W NOTE: Bold face items in the Cauer network above, represent the package without the external thermal system. The Bold face items in the Foster network are computed by the square root of time constant R(t) = 225 * sqrt(time(sec)). The constant is derived based on the active area of the device with silicon and epoxy at the interface of the heat generation. The Cauer networks generally have physical significance and may be divided between nodes to separate thermal behavior due to one portion of the network from another. The Foster networks, though when sorted by time constant (as above) bear a rough correlation with the Cauer networks, are really only convenient mathematical models. Cauer networks can be easily implemented using circuit simulating tools, whereas Foster networks may be more easily implemented using mathematical tools (for instance, in a spreadsheet program), according to the following formula: n R(t) + S Ri ǒ1−e−tńtaui Ǔ i+1 www.onsemi.com 16 NCV8508C R1 Junction C1 R2 C2 R3 Rn C3 Cn Time constants are not simple RC products. Amplitudes of mathematical solution are not the resistance values. Ambient (thermal ground) Figure 28. Grounded Capacitor Thermal Network (“Cauer” Ladder) R1 Junction C1 R2 C2 R3 Rn C3 Cn Each rung is exactly characterized by its RC−product time constant; amplitudes are the resistances. Ambient (thermal ground) Figure 29. Non−Grounded Capacitor Thermal Ladder (“Foster” Ladder) 1000 Cu Area 55 mm2, 1 oz R(t) (°C/W) 100 Cu Area 717 mm2, 1 oz 10 1 0.1 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PULSE TIME (s) Figure 30. SOIC−8 EP Single Pulse Heating Curve 100 55% Duty Cycle 20% R(t) (°C/W) 10 10% 5% 1% 1 Single Pulse Cu Area 717 mm2, 1 oz 0.1 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 PULSE TIME (s) Figure 31. SOIC−8 EP Thermal Duty Cycle Curves on 1” Spreader Test Board www.onsemi.com 17 100 1000 NCV8508C ORDERING INFORMATION Device NCV8508CPD501R2G Output Voltage Timing Option Package Shipping† 5.0 V 1 SOIC−8 EP (Pb−Free) 2500 / Tape & Reel NOTE: Contact factory for other options. †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 18 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−8 EP CASE 751AC ISSUE E 8 1 SCALE 1:1 DATE 05 OCT 2022 GENERIC MARKING DIAGRAM* 8 XXXXX AYWWG G 1 DOCUMENT NUMBER: DESCRIPTION: XXXXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package 98AON14029D SOIC−8 EP *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present and may be in either location. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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NCV8508CPD501R2G 价格&库存

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NCV8508CPD501R2G
  •  国内价格
  • 1+19.72250

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