NCV8570BSN28T1G

NCV8570B 200 mA, Ultra Low Noise, High PSRR, LDO, Linear Voltage Regulator The NCV8570B is a 200 mA Low Dropout, Linear Voltage Regulator with ultra low noise characteristics. It’s low noise combined with high Power Supply Rejection Ratio (PSRR) make it especially suited for use in RF, audio or imaging applications. The device is manufactured in an advanced BiCMOS process to provide a powerful combination of low noise and excellent dynamic performance but with very low ground current consumption at full loads. The NCV8570B is stable with small, low value capacitors allowing designers to minimise the total PCB space occupied by the solution. The device is packaged in a small 2x2.2mm DFN6 package as well as in a TSOP-5 package. Features http://onsemi.com MARKING DIAGRAMS 6 DFN6, 2x2.2 MN SUFFIX CASE 506BA 1 XX MG G 1 XX = Specific Device Code M = Date Code G = Pb−Free Package* (*Note: Microdot may be in either location) 5 5 1 TSOP−5 SN SUFFIX CASE 483 XXXAYWG G 1 • • • • • • • • • • • • • • • • • • Ultra Low Noise (typ. 10 mVrms @ VOUT = 1.8 V) Very High PSRR (typ. 82 dB @ 1 kHz) Excellent Line and Load Regulation Stable with Ceramic Output Capacitors as low as 1 mF Very Low Ground Current (typ. 75 mA @ IOUT = 200 mA) Low Sleep Mode Current (max. 1 mA) Active Discharge Circuit Current Limit and Thermal Shutdown Protection AEC Qualified PPAP Capable NCV Prefix for Automotive and Other Applications Requiring AEC−Q100 Qualified Site and Change Controls Output Voltage Options: ♦ 1.8 V, 2.8 V, 3.0 V, 3.3 V ♦ Contact Factory for Other Voltage Options These are Pb−Free Devices Satellite and HD Radio Portable/Built−in DVD Entertainment Systems Noise Sensitive Applications (RF, Video, Audio) GPS Systems Camera for Lane Change Detection and Reverse View XXX = Specific Device Code A = Assembly Location Y = Year W = Work Week G = Pb−Free Package* (*Note: Microdot may be in either location) PIN CONNECTIONS EN GND IN 1 2 3 (Top View) 1 IN GND EN (Top View) BYP 5 OUT 6 BYP 5 GND 4 OUT Applications ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 19 of this data sheet. © Semiconductor Components Industries, LLC, 2011 May, 2011 − Rev. 1 1 Publication Order Number: NCV8570B/D NCV8570B DFN6 2x2.2 VIN 3 1 CIN 1 mF ON OFF IN NCV8570B EN GND 2, 5, EPAD BYP OUT 4 6 Cnoise 10 nF COUT 1 mF VOUT Figure 1. NCV8570B Typical Application Schematic RDIS RPD Figure 2. Simplified Block Diagram PIN FUNCTION DESCRIPTION Pin No. DFN6 1 Pin No. TSOP−5 3 Pin Name EN Description Enable pin: This pin allows on/off control of the regulator. To disable the device, connect to GND. If this function is not in use, connect to Vin. Internal 5 MW Pull Down resistor is connected between EN and GND. Power Supply Ground (Pins are fused for the DFN6 package). Pins 2, 5 and EPAD are connected together through the lead frame in the DFN6 package. Power Supply Input Voltage Regulated Output Voltage Noise reduction pin. (Connect 10 nF or 100 nF capacitor to GND) 2, 5, EPAD 3 4 6 2 1 5 4 GND IN OUT BYP http://onsemi.com 2 NCV8570B MAXIMUM RATINGS Rating Input Voltage (Note 2) Chip Enable Voltage Noise Reduction Voltage Output Voltage Output Short−Circuit Duration Maximum Junction Temperature Storage Temperature Range TJ(max) TSTG Symbol IN EN BYP OUT Value −0.3 V to 6 V −0.3 V to VIN +0.3 V −0.3 V to VIN +0.3 V −0.3 V to VIN +0.3 V Infinity 125 −55 to 150 °C °C V V Unit V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V tested per MIL−STD−883, Method 3015 Machine Model Method 200 V This device meets or exceeds AEC−Q100 standard. THERMAL CHARACTERISTICS Rating Package Thermal Resistance, DFN6: (Notes 2, 3) Junction−to−Case (Pin 2) Junction−to−Ambient Package Thermal Resistance, TSOP−5: (Notes 2, 3) Junction−to−Case (Pin 2) Junction−to−Ambient 2. Refer to APPLICATION INFORMATION for Safe Operating Area 3. Single component mounted on 1 oz, FR4 PCB with 645mm2 Cu area. Symbol YJL2 RqJA YJL2 RqJA Value 108 153 92 204 Unit °C/W °C/W http://onsemi.com 3 NCV8570B ELECTRICAL CHARACTERISTICS VIN = VOUT + 0.5 V or 2.5 V (whichever is greater), VEN = 1.2 V, CIN = COUT = 1 mF, Cnoise = 10 nF, IOUT = 1 mA, TJ = −40°C to 125°C, unless otherwise specified (Note 4) Parameter REGULATOR OUTPUT Input Voltage Range Output Voltage 1.8 V VIN = (VOUT + 0.5 V) to 5.5 V 2.8 V IOUT = 1 mA to 200 mA 3.0 V 3.3 V VIN = VOUT +1.0 V, IOUT = 1 mA to 150 mA f = 120 Hz f = 1 kHz f = 10 kHz VIN VOUT 2.5 1.755 2.730 2.925 3.2175 (−2.5%) − − − −0.1 − − − 200 205 − − − − − − − − − − − 80 82 63 − 0.2 10 15 310 320 90 85 80 120 115 110 5.5 1.845 2.870 3.075 3.3825 (+2.5%) − − − 0.1 5.0 − − 470 490 165 150 145 205 190 185 V V Test Conditions Symbol Min Typ Max Unit Power Supply Ripple Rejection PSRR dB Line Regulation Load Regulation Output Noise Voltage VIN = (VOUT +0.5 V) to 5.5 V, IOUT = 1 mA IOUT = 1 mA to 200 mA VOUT = 1.8 V, Cnoise = 100 nF f = 10 Hz to 100 kHz, Cnoise = 10 nF IOUT = 1 mA to 150 mA VOUT = VOUT(NOM) – 0.1 V VOUT = 0V IOUT= 150 mA VOUT(NOM) = 2.8 V VOUT(NOM) = 3.0 V VOUT(NOM) = 3.3 V VOUT(NOM) = 2.8 V VOUT(NOM) = 3.0 V VOUT(NOM) = 3.3 V DVOUT / DVIN DVOUT / DIOUT VN %/V mV mVRMS Output Current Limit Output Short Circuit Current Dropout Voltage (Note 5) ILIM ISC VDO mA mA mV Dropout Voltage (Note 5) IOUT= 200 mA VDO mV GENERAL Ground Current Disable Current Thermal Shutdown IOUT = 1 mA IOUT = 200 mA VEN = 0 V Shutdown, Temperature Increasing Reset, Temperature Decreasing OUTPUT ENABLE Enable Threshold Low High Vth(EN) RPD(EN) − 1.2 2.5 − − 5.0 0.4 − 10 V MW IGND IDIS TSDU TSDD − − − − − 70 75 0.1 150 135 110 130 1.0 − − mA mA °C °C Internal Pull−Down Resistance (Note 6) TIMING Turn−On Time Turn−Off Time IOUT = 10 mA, VOUT = 0.975 VOUT(NOM) Cnoise = 10nF/100nF, VOUT = 0.1 VOUT(NOM) Cnoise = 10 nF Cnoise = 100 nF IOUT = 1 mA IOUT = 10 mA tON tOFF − − − − 0.4 4.0 2.0 0.6 − − − − ms ms 4. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 5. Measured when the output voltage falls 100 mV below the nominal output voltage (nominal output voltage is the voltage at the output measured under the condition VIN = VOUT + 0.5 V). In the case of devices having the nominal output voltage VOUT = 1.8 V the minimum input to output voltage differential is given by the VIN(MIN) = 2.5 V. 6. Expected to disable the device when EN pin is floating. http://onsemi.com 4 NCV8570B TYPICAL CHARACTERISTICS 1.836 Vout, OUTPUT VOLTAGE (V) 1.824 1.812 1.800 1.788 1.776 1.764 −40 VIN = 2.5 V, CIN = COUT = 1 mF, Cnoise = 10 nF −20 0 20 40 60 80 100 120 Figure 3. Output Voltage vs. Junction Temperature, VOUT = 1.8 V 2.8560 Vout, OUTPUT VOLTAGE (V) 2.8373 2.8187 2.8000 2.7813 2.7627 2.7440 −40 −20 0 20 40 VIN = 3.3 V, CIN = COUT = 1 mF, Cnoise = 10 nF 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) Figure 4. Output Voltage vs. Junction Temperature, VOUT = 2.8 V 3.06 Vout, OUTPUT VOLTAGE (V) 3.04 3.02 3.00 2.98 2.96 2.94 −40 −20 0 20 40 VIN = 3.5 V, CIN = COUT = 1 mF, Cnoise = 10 nF 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) Figure 5. Output Voltage vs. Junction Temperature, VOUT = 3.0 V http://onsemi.com 5 TJ, JUNCTION TEMPERATURE (°C) NCV8570B TYPICAL CHARACTERISTICS 3.3660 Vout, OUTPUT VOLTAGE (V) 3.3440 3.3220 3.3000 3.2780 3.2560 3.2340 −40 VIN = 3.8 V, CIN = COUT = 1 mF, Cnoise = 10 nF −20 0 20 40 60 80 100 120 VDO, DROPOUT VOLTAGE (mV) 180 150 120 90 60 TJ = −40°C 30 0 0 CIN = COUT = 1 mF, Cnoise = 10 nF TJ = 25°C TJ = 125°C 40 80 120 160 200 Figure 6. Output Voltage vs. Junction Temperature, VOUT = 3.3 V 180 VDO, DROPOUT VOLTAGE (mV) 150 120 90 60 30 0 0 TJ = −40°C 180 VDO, DROPOUT VOLTAGE (mV) 150 120 TJ, JUNCTION TEMPERATURE (°C) Figure 7. Dropout Voltage vs. Output Current, VOUT = 2.8 V IOUT, OUTPUT CURRENT (mA) CIN = COUT = 1 mF, Cnoise = 10 nF CIN = COUT = 1 mF, Cnoise = 10 nF TJ = 25°C TJ = 125°C TJ = 25°C 90 TJ = 125°C 60 30 0 0 TJ = −40°C 40 80 120 160 200 40 80 120 160 200 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) Figure 8. Dropout Voltage vs. Output Current, VOUT = 3.0 V Figure 9. Dropout Voltage vs. Output Current, VOUT = 3.3 V http://onsemi.com 6 NCV8570B TYPICAL CHARACTERISTICS 100 90 80 70 PSRR (dB) 60 50 40 30 20 10 0 10 TA = 25°C, Cnoise = 10 nF, COUT = 1 mF, VOUT = 1.8 V, VIN = 3.0 VDC ± 50 mVAC 100 1k 10k FREQUENCY (Hz) 100k 1M PSRR (dB) IOUT = 150 mA IOUT = 200 mA IOUT = 10 mA 110 100 90 80 70 60 50 40 30 IOUT = 150 mA IOUT = 200 mA IOUT = 10 mA TA = 25°C, Cnoise = 100 nF, 20 COUT = 1 mF, 10 VOUT = 1.8 V, VIN = 3.0 VDC ± 50 mVAC 0 10 100 1k 10k FREQUENCY (Hz) 100k 1M Figure 10. PSRR vs. Frequency, 1.8 V Output Voltage Option, COUT = 1 mF, Cnoise = 10 nF 100 90 80 70 PSRR (dB) PSRR (dB) 60 50 40 30 20 10 0 10 IOUT = 150 mA IOUT = 200 mA TA = 25°C, Cnoise = 10 nF, COUT = 4.7 mF, VOUT = 1.8 V, VIN = 3.0 VDC ± 50 mVAC 100 1k 10k FREQUENCY (Hz) 100k 1M IOUT = 10 mA 120 110 100 90 80 70 60 50 40 30 Figure 11. PSRR vs. Frequency, 1.8 V Output Voltage Option, COUT = 1mF, Cnoise = 100nF IOUT = 10 mA IOUT = 150 mA IOUT = 200 mA TA = 25°C, Cnoise = 100 nF, 20 COUT = 4.7 mF, 10 VOUT = 1.8 V, VIN = 3.0 VDC ± 50 mVAC 0 10 100 1k 10k FREQUENCY (Hz) 100k 1M Figure 12. PSRR vs. Frequency, 1.8 V Output Voltage Option, COUT = 4.7 mF, Cnoise = 10 nF 110 100 90 80 PSRR (dB) 70 60 50 40 30 20 10 0 10 IOUT = 200 mA TA = 25°C, Cnoise = 10 nF, COUT = 1 mF, VOUT = 2.8 V, VIN = 3.3 VDC ± 50 mVAC 100 1k 10k 100k 1M FREQUENCY (Hz) IOUT = 10 mA IOUT = 150 mA PSRR (dB) 110 100 90 80 70 60 50 40 30 20 10 0 10 Figure 13. PSRR vs. Frequency, 1.8V Output Voltage Option, COUT = 4.7mF, Cnoise = 100nF IOUT = 10 mA IOUT = 150 mA IOUT = 200 mA TA = 25°C, Cnoise = 100 nF, COUT = 1 mF, VOUT = 2.8 V, VIN = 3.3 VDC ± 50 mVAC 100 1k 10k FREQUENCY (Hz) 100k 1M Figure 14. PSRR vs. Frequency, 2.8 V Output Voltage Option, COUT = 1 mF, Cnoise = 10 nF Figure 15. PSRR vs. Frequency, 2.8 V Output Voltage Option, COUT = 1 mF, Cnoise = 100 nF http://onsemi.com 7 NCV8570B TYPICAL CHARACTERISTICS 110 100 90 80 PSRR (dB) PSRR (dB) 70 60 50 40 30 20 10 0 10 IOUT = 200 mA TA = 25°C, Cnoise = 10 nF, COUT = 4.7 mF, VOUT = 2.8 V, VIN = 3.3 VDC ± 50 mVAC 100 1k 10k 100k 1M FREQUENCY (Hz) IOUT = 150 mA IOUT = 10 mA 110 100 90 80 70 60 50 40 30 20 10 0 10 IOUT = 200 mA TA = 25°C, Cnoise = 100 nF, COUT = 4.7 mF, VOUT = 2.8 V, VIN = 3.3 VDC ± 50 mVAC 100 1k 10k 100k 1M FREQUENCY (Hz) IOUT = 150 mA IOUT = 10 mA Figure 16. PSRR vs. Frequency, 2.8 V Output Voltage Option, COUT = 4.7 mF, Cnoise = 10 nF 10 OUTPUT VOLTAGE NOISE (mV/√HZ) 10 OUTPUT VOLTAGE NOISE (mV/√HZ) Figure 17. PSRR vs. Frequency, 2.8 V Output Voltage Option, COUT = 4.7 mF, Cnoise = 100 nF VOUT = 3.3 V 10 Hz − 100 kHz Integral Noise: Vn = 25.3 mVrms VOUT = 2.8 V 10 Hz − 100 kHz Integral Noise: Vn = 22.6 mVrms VOUT = 1.8 V 10 Hz − 100 kHz Integral Noise: Vn = 14.9 mVrms VOUT = 3.3 V 10 Hz − 100 kHz Integral Noise: Vn = 11.9 mVrms 1.0 1.0 IOUT = 50 mA, COUT = 1 mF, Cnoise = 100 nF VIN = VOUT = +0.5 V or 2.5 V, whichever is higher VOUT = 2.8 V 10 Hz − 100 kHz Integral Noise: Vn = 11.7 mVrms 0.10 VOUT = 1.8 V 10 Hz − 100 kHz Integral Noise: Vn = 9.4 mVrms 10 100 1k 10k 100k 1M FREQUENCY (Hz) 0.10 0.01 10 IOUT = 50 mA, COUT = 1 mF, Cnoise = 10 nF VIN = VOUT = +0.5 V or 2.5 V, whichever is higher 100 1k 10k 100k 1M 0.01 FREQUENCY (Hz) Figure 18. Output Noise vs. Frequency, COUT = 1 mF, Cnoise = 10 nF, IOUT = 50 mA 10 OUTPUT VOLTAGE NOISE (mV/√HZ) VOUT = 3.3 V 10 Hz − 100 kHz Integral Noise: Vn = 22.85 mVrms VOUT = 2.8 V 10 Hz − 100 kHz Integral Noise: Vn = 22.7 mVrms VOUT = 1.8 V 10 Hz − 100 kHz Integral Noise: Vn = 15 mVrms 10 OUTPUT VOLTAGE NOISE (mV/√HZ) Figure 19. Output Noise vs. Frequency, COUT = 1 mF, Cnoise = 100 nF, IOUT = 50 mA VOUT = 3.3 V 10 Hz − 100 kHz Integral Noise: Vn = 12 mVrms IOUT = 200 mA, COUT = 1 mF, Cnoise = 100 nF VIN = VOUT = +0.5 V or 2.5 V, whichever is higher 1.0 1.0 0.10 I OUT = 200 mA, COUT = 1 mF, Cnoise = 10 nF VIN = VOUT = +0.5 V or 2.5 V, whichever is higher 0.01 10 100 1k 10k FREQUENCY (Hz) 0.10 VOUT = 2.8 V 10 Hz − 100 kHz Integral Noise: Vn = 11.7 mVrms 100k 1M 0.01 VOUT = 1.8 V 10 Hz − 100 kHz Integral Noise: Vn = 9.5 mVrms 10 100 1k 10k FREQUENCY (Hz) 100k 1M Figure 20. Output Noise vs. Frequency, COUT = 1 mF, Cnoise = 10 nF, IOUT = 200 mA Figure 21. Output Noise vs. Frequency, COUT = 1 mF, Cnoise = 100 nF, IOUT = 200 mA http://onsemi.com 8 NCV8570B TYPICAL CHARACTERISTICS 35 10 HZ to 100 kHz RMS OUTPUT NOISE (mVrms) 30 25 20 15 10 5 20 10 HZ to 100 kHz RMS OUTPUT NOISE (mVrms) 18 16 14 12 10 8 6 4 2 0 1 3 TA = 25°C, Cnoise = 100 nF, VOUT = 3.3 V, IOUT = 200 mA VIN = 3.8 V 5 7 9 11 13 15 17 COUT, OUTPUT CAPACITOR (mF) 19 21 TA = 25°C, COUT = 1 mF, VOUT = 3.3 V, IOUT = 200 mA VIN = 3.8 V 0 50 100 150 200 250 300 350 400 450 500 Cnoise, NOISE BYPASS CAPACITOR (nF) Figure 22. Output Noise vs. Noise Bypass Capacitance, COUT = 1 mF, VOUT = 3.3 V, IOUT = 200 mA 30 26 24 22 20 18 16 14 12 10 0 VOUT = 1.8 V TA = 25°C, Cnoise = 10 nF, COUT = 1 mF, VIN = VOUT + 0.5 V or 2.5 V, whichever is higher 25 75 100 125 150 IOUT, OUTPUT CURRENT (mA) 50 175 VOUT = 3.3 V VOUT = 2.8 V 10 HZ to 100 kHz RMS OUTPUT NOISE (mVrms) 10 HZ to 100 kHz RMS OUTPUT NOISE (mVrms) 28 15 14 13 12 11 10 9 8 7 6 5 0 Figure 23. Output Noise vs. Output Capacitance, Cnoise = 100 nF, VOUT = 3.3 V, IOUT = 200 mA VOUT = 3.3 V VOUT = 2.8 V VOUT = 1.8 V TA = 25°C, Cnoise = 100 nF, COUT = 1 mF, VIN = VOUT + 0.5 V or 2.5 V, whichever is higher 25 50 75 100 125 150 IOUT, OUTPUT CURRENT (mA) 175 200 200 Figure 24. Output Noise vs. Load Current, Cnoise = 10 nF, COUT = 1 mF Figure 25. Output Noise vs. Load Current, Cnoise = 100 nF, COUT = 1 mF 300 200 mA 1 mA 100 0 1.85 1.80 1.75 1.70 1.65 1.60 0 COUT = 4.7 mF, VIN = 2.5 V, Cnoise = 100 nF, dIOUT/dt = 200 mA / 1 ms 40 80 120 160 200 240 280 320 360 400 t, TIME (ms) Figure 26. Load Transient Response, VOUT = 1.8 V, COUT = 4.7 mF, Cnoise = 100 nF http://onsemi.com 9 IOUT, OUTPUT CURRENT (mA) 200 VOUT, OUTPUT VOLTAGE (V) NCV8570B TYPICAL CHARACTERISTICS 300 200 mA 100 0 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) 200 VOUT, OUTPUT VOLTAGE (V) 1 mA 1.90 1.85 1.80 1.75 1.70 1.65 1.60 0 40 COUT = 1 mF, VIN = 2.5 V, Cnoise = 100 nF, dIOUT/dt = 200 mA / 1 ms 80 120 160 200 240 280 320 360 400 t, TIME (ms) Figure 27. Load Transient Response, VOUT = 1.8 V, COUT = 1 mF, Cnoise = 100 nF 300 200 VOUT, OUTPUT VOLTAGE (V) 200 mA 1 mA 3.40 3.35 3.30 3.25 3.20 3.15 3.10 0 40 COUT = 4.7 mF, VIN = 3.8 V, Cnoise = 100 nF, dIOUT/dt = 200 mA / 1 ms 80 120 160 200 240 280 320 360 400 t, TIME (ms) 100 0 Figure 28. Load Transient Response, VOUT = 3.3 V, COUT = 4.7 mF, Cnoise = 100 nF 300 200 VOUT, OUTPUT VOLTAGE (V) 200 mA 1 mA 100 0 3.40 3.35 3.30 3.25 3.20 3.15 3.10 0 40 COUT = 1 mF, VIN = 3.8 V, Cnoise = 100 nF, dIOUT/dt = 200 mA / 1 ms 80 120 160 200 240 280 320 360 400 t, TIME (ms) Figure 29. Load Transient Response, VOUT = 3.3 V, COUT = 1 mF, Cnoise = 100 nF http://onsemi.com 10 NCV8570B TYPICAL CHARACTERISTICS 4.0 VOUT, OUTPUT VOLTAGE (V) VIN = 3.5 V VIN = 2.5 V 1.810 1.805 1.800 1.795 1.790 1.785 1.780 0 COUT = 1 mF, VIN = 2.5 V, Cnoise = 100 nF, IOUT = 30 mA, dVIN/dt = 1 V / 1 ms 20 40 60 80 100 120 140 160 180 200 t, TIME (ms) 3.5 2.5 VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) 3.0 Figure 30. Line Transient Response, VOUT = 1.8 V, COUT = 1 mF, IOUT = 30 mA 4.0 VOUT, OUTPUT VOLTAGE (V) VIN = 3.5 V VIN = 2.5 V 1.810 1.805 1.800 1.795 1.790 1.785 1.780 0 COUT = 1 mF, VIN = 2.5 V, Cnoise = 100 nF, IOUT = 200 mA, dVIN/dt = 1 V / 1 ms 20 40 60 80 100 120 140 160 180 200 t, TIME (ms) 3.5 3.0 2.5 Figure 31. Line Transient Response, VOUT = 1.8 V, COUT = 1 mF, IOUT = 200 mA 5.0 4.5 VOUT, OUTPUT VOLTAGE (V) VIN = 4.5 V VIN = 3.5 V 3.010 3.005 3.000 2.995 2.990 2.985 2.980 0 COUT = 1 mF, VIN = 3.5 V, Cnoise = 100 nF, IOUT = 30 mA, dVIN/dt = 1 V / 1 ms 20 40 60 80 100 120 140 160 180 200 t, TIME (ms) 4.0 3.5 Figure 32. Line Transient Response, VOUT = 3.0 V, COUT = 1 mF, IOUT = 30 mA http://onsemi.com 11 NCV8570B TYPICAL CHARACTERISTICS 5.0 VOUT, OUTPUT VOLTAGE (V) 4.5 VIN = 3.5 V 3.010 3.005 3.000 2.995 2.990 2.985 2.980 0 COUT = 1 mF, VIN = 3.5 V, Cnoise = 100 nF, IOUT = 200 mA, dVIN/dt = 1 V / 1 ms 20 40 60 80 100 120 140 160 180 200 t, TIME (ms) 3.5 VIN, INPUT VOLTAGE (V) VEN, ENABLE VOLTAGE (V) VEN, ENABLE VOLTAGE (V) VIN = 4.5 V 4.0 Figure 33. Line Transient Response, VOUT = 3.0 V, COUT = 1 mF, IOUT = 200 mA 5.7 VOUT, OUTPUT VOLTAGE (V) VEN = 3.8 V VEN = 0 V 4.0 3.0 2.0 1.0 0.0 −1.0 0 2 4 Cnoise = 220 nF Cnoise = 100 nF COUT = 1 mF, VIN = 3.8 V 12 14 16 Cnoise = 10 nF 3.8 1.9 0.0 Cnoise = 47 nF 6 8 10 t, TIME (ms) Figure 34. Turn−On Response VOUT = 3.3 V, COUT = 1 mF, IOUT = 30 mA 5.25 VOUT, OUTPUT VOLTAGE (V) VEN = 3.5 V VEN = 0 V 4.0 3.0 2.0 1.0 0.0 −1.0 0 2 4 Cnoise = 220 nF Cnoise = 100 nF Cnoise = 47 nF 6 8 10 t, TIME (ms) COUT = 1 mF, VIN = 3.5 V 14 16 Cnoise = 10 nF 3.50 1.75 0.00 12 Figure 35. Turn−On Response VOUT = 3 V, COUT = 1 mF, IOUT = 30 mA http://onsemi.com 12 NCV8570B TYPICAL CHARACTERISTICS 3 VOUT, OUTPUT VOLTAGE (V) 1 VEN = 0 V 2.0 1.5 1.0 0.5 0.0 −0.5 0 1 2 3 Cnoise = 10 nF Cnoise = 220 nF Cnoise = 100 nF Cnoise = 47 nF 4 5 6 7 t, TIME (ms) 0 VEN, ENABLE VOLTAGE (V) VEN, ENABLE VOLTAGE (V) VEN, ENABLE VOLTAGE (V) VEN = 2.5 V 2 COUT = 1 mF, VIN = 2.5 V 8 9 10 Figure 36. Turn−On Response VOUT = 1.8 V, COUT = 1 mF, IOUT = 30 mA 5.7 Cnoise = 10 nF, TJ = 25°C VEN = 0 V 3.8 1.9 0.0 VEN = 3.8 V VOUT, OUTPUT VOLTAGE (V) 4.0 3.0 2.0 1.0 0.0 −1.0 0 1 RRLOAD = 22 W RRLOAD = 110 W RRLOAD = 3.3 kW 2 3 4 5 6 t, TIME (ms) 7 8 9 10 Figure 37. Turn−Off Response VOUT = 3.3 V, COUT = 1 mF VEN = 3.5 V VOUT, OUTPUT VOLTAGE (V) Cnoise = 10 nF, TJ = 25°C VEN = 0 V 5.25 3.50 1.75 0.00 RRLOAD = 20 W 3.0 2.0 1.0 0.0 −1.0 0 1 2 3 4 5 6 t, TIME (ms) 7 8 9 10 RRLOAD = 100 W RRLOAD = 3 kW Figure 38. Turn−Off Response VOUT = 3 V, COUT = 1 mF http://onsemi.com 13 NCV8570B TYPICAL CHARACTERISTICS 3.75 2.5 0 tON, TURN−ON TIME (ms) 1.25 VEN = 0 V VEN, ENABLE VOLTAGE (V) 12 10 8 VOUT = 3.3 V 6 4 VOUT = 1.8 V 2 0 VOUT = 3 V VEN = 2.5 V VOUT, OUTPUT VOLTAGE (V) Cnoise = 10 nF, TJ = 25°C TJ = 25°C, IOUT = 0 mA − 200 mA 2.0 1.5 1.0 0.5 0.0 1 RRLOAD = 12 W RRLOAD = 60 W RRLOAD = 1.8 kW −0.5 0 2 3 4 5 6 t, TIME (ms) 7 8 9 10 0 Figure 39. Turn−Off Response VOUT = 1.8 V, COUT = 1 mF IOUT, OUTPUT CURRENT (mA) ISC, SHORT−CIRCUIT CURRENT (mA) 800 VOUT, OUTPUT VOLTAGE (V) IOUT = 325 mA IOUT = 1 mA Cnoise = 100 nF IOUT = 1 mA 4 3 2 1 0 0.1 0.2 0.3 VOUT = 0 V 0.4 0.5 0.6 t, TIME (ms) 0.7 0.8 0.9 1.0 Short−Circuit Normal Operation VOUT = 3 V 600 400 200 0 350 Figure 40. Turn−On Time vs. Noise Bypass Capacitance, COUT = 1 mF, IOUT = 0 mA − 200 mA VIN = VOUT + 0.5 V, 333 CIN = COUT = 1 mF, Cnoise = 10 nF 317 300 283 267 250 −40 20 40 60 80 100 120 140 160 180 200 220 240 Cnoise, NOISE BYPASS CAPACITANCE (nF) VOUT = 3.3 V VOUT = 1.8 V −1 0.0 −20 Figure 41. Short−Circuit Protection, VOUT = 3 V, COUT = 1 mF, Cnoise = 100 nF 400 VOUT, OUTPUT VOLTAGE (V) Thermal Shutdown IOUT = 200 mA Normal Operation VOUT = 3 V 300 200 100 0 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0.00 0 Figure 42. Short−Circuit Current vs. Junction Temperature, VOUT = 1.8 V, 3.3 V 0 20 40 60 80 100 TJ, JUNCTION TEMPERATURE (°C) 120 IOUT, OUTPUT CURRENT (mA) VOUT, OUTPUT VOLTAGE (V) 4.0 3.0 2.0 1.0 0 1.0 2.0 3.0 4.0 5.0 TJ = 25°C TJ = −40°C TJ = 125°C 0.5 1 1.5 2 2.5 3 3.5 IOUT = 10 mA Cnoise = 100 nF 4 4.5 5 5.5 IOUT = 200 mA Cnoise = 100 nF 6.0 7.0 8.0 9.0 10.0 −1.0 0.0 VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) Figure 43. Thermal Shutdown Protection VOUT = 3 V, Cnoise = 100 nF, COUT = 1 mF Figure 44. Output Voltage vs. Input Voltage, VOUT = 1.8 V, COUT = 1 mF http://onsemi.com 14 NCV8570B TYPICAL CHARACTERISTICS 3.00 2.75 VOUT, OUTPUT VOLTAGE (V) 2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0 0 0.5 1 1.5 2 TJ = 25°C TJ = −40°C TJ = 125°C 2.5 3 3.5 IOUT = 10 mA Cnoise = 100 nF 4 4.5 5 VOUT, OUTPUT VOLTAGE (V) 3.50 3.25 3.00 2.75 2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0 TJ = 25°C TJ = −40°C TJ = 125°C IOUT = 10 mA Cnoise = 100 nF 4 4.5 5 5.5 5.5 0 0.5 1 1.5 2 2.5 3 3.5 VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) Figure 45. Output Voltage vs. Input Voltage, VOUT = 2.8 V, COUT = 1 mF 1.8091 VOUT, OUTPUT VOLTAGE (V) 1.8090 1.8089 1.8088 1.8087 1.8086 1.8085 1.8084 1.8083 1.8082 1.8081 2.5 3 3.5 4 4.5 5 VOUT, OUTPUT VOLTAGE (V) TJ = 25°C IOUT = 10 mA Cnoise = 100 nF 2.8038 2.8037 2.8036 2.8035 2.8034 2.8033 2.8032 2.8031 2.8030 2.8029 2.8028 3 Figure 46. Output Voltage vs. Input Voltage, VOUT = 3.3 V, COUT = 1 mF TJ = 25°C IOUT = 10 mA Cnoise = 100 nF 5.5 3.5 4 4.5 5 5.5 VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) Figure 47. Output Voltage vs. Input Voltage, VOUT = 1.8 V, COUT = 1 mF 3.3129 3.3127 3.3126 3.3125 3.3124 3.3123 3.3122 3.3121 3.3120 3.3119 3.5 4 4.5 VIN, INPUT VOLTAGE (V) 5 5.5 IQ, QUIESCENT CURRENT (mA) VOUT, OUTPUT VOLTAGE (V) 3.3128 TJ = 25°C IOUT = 10 mA Cnoise = 100 nF 90 80 70 60 50 40 30 20 10 0 0 Figure 48. Output Voltage vs. Input Voltage, VOUT = 2.8 V, COUT = 1 mF TJ = 125°C TJ = 25°C TJ = −40°C VOUT = 2.8 V COUT = 1 mF 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 VIN, INPUT VOLTAGE (V) Figure 49. Output Voltage vs. Input Voltage, VOUT = 3.3 V, COUT = 1 mF http://onsemi.com 15 Figure 50. Quiescent Current vs. Input Voltage, VOUT = 2.8 V, COUT = 1 mF NCV8570B TYPICAL CHARACTERISTICS 100 IQ, QUIESCENT CURRENT (mA) 80 70 60 50 40 30 20 10 0 0 0.5 1 1.5 2 2.5 3 3.5 TJ = −40°C VOUT = 3.3 V COUT = 1 mF 4 4.5 5 5.5 TJ = 125°C TJ = 25°C IQ, QUIESCENT CURRENT (mA) 90 100 90 80 70 60 50 40 30 20 0 20 40 60 80 CIN = COUT = 1 mF, Cnoise = 10 nF 100 120 140 160 180 200 IOUT, OUTPUT CURRENT (mA) TJ = 125°C TJ = 25°C TJ = −40°C VIN, INPUT VOLTAGE (V) Figure 51. Quiescent Current vs. Input Voltage, VOUT = 3.3 V, COUT = 1 mF 100 IQ, QUIESCENT CURRENT (mA) IQ, QUIESCENT CURRENT (mA) 90 80 70 60 50 40 30 20 0 20 40 60 80 CIN = COUT = 1 mF, Cnoise = 10 nF 100 120 140 160 180 200 TJ = 125°C TJ = 25°C TJ = −40°C 100 90 80 70 60 50 40 30 20 0 Figure 52. Quiescent Current vs. Output Current, VOUT = 3.3 V TJ = 125°C TJ = 25°C TJ = −40°C CIN = COUT = 1 mF, Cnoise = 10 nF 20 40 60 80 100 120 140 160 180 200 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) Figure 53. Quiescent Current vs. Output Current, VOUT = 3.0 V COUT ESR, OUTPUT CAPACITOR (W) 110 IQ, QUIESCENT CURRENT (mA) 100 90 80 70 60 50 40 30 20 0 20 CIN = COUT = 1 mF, Cnoise = 10 nF 40 60 80 100 120 140 160 180 200 IOUT, OUTPUT CURRENT (mA) TJ = 25°C TJ = −40°C TJ = 125°C 10 Figure 54. Quiescent Current vs. Output Current, VOUT = 2.8 V Unstable Operation Region 1 VOUT = 2.8 V VOUT = 3.3 V VOUT = 1.8 V 0.1 Stable Operation Region VOUT = 1.8 V, 2.8 V, 3.3 V, CIN = COUT = 1 mF, Cnoise = 10 nF, VIN = VOUT + 0.5 V or 2.5 V whichever is higher. 0.01 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 IOUT, OUTPUT CURRENT (A) Figure 55. Quiescent Current vs. Output Current, VOUT = 1.8 V Figure 56. Output Capacitor ESR vs. Output Current http://onsemi.com 16 NCV8570B APPLICATIONS INFORMATION General The NCV8570B is a high performance 200 mA low dropout linear regulator. This device delivers excellent noise and dynamic performance consuming only 75 mA (typ) quiescent current at full load, with the PSRR of (typ) 82 dB at 1 kHz. Excellent load transient performance and small package size makes the device ideal for portable applications. Logic EN input provides ON/OFF control of the output voltage. When the EN is low the device consumes as low as typically 0.1 mA. Access to the major contributor of noise within the integrated circuit – Bandgap Reference is provided through the BYP pin. This allows bypassing the source of noise by the noise reduction capacitor and reaching noise levels below 10 mVRMS. The device is fully protected in case of output short circuit condition and overheating assuring a very robust design. It is recommended to connect a 1 mF ceramic capacitor between IN pin and GND pin of the device. This capacitor will provide a low impedance path for unwanted AC signals or noise present on the input voltage. The input capacitor will also limit the influence of input trace inductances and Power Supply resistance during sudden load current changes. Higher capacitances will improve the line transient response. Output Capacitor Requirements (COUT) Input Capacitor Requirements (CIN) internal 5 MW pull−down resistor (RPD) assures that the device is turned off when EN pin is not connected. The device can be used as a simple regulator without use of the chip enable feature by tying the EN to the IN pin. Active Discharge Active discharge circuitry has been implemented to insure a fast VOUT turn off time. When EN goes low, the active discharge transistor turns on creating a path to discharge the output capacitor COUT through 1 kW (RDIS) resistor. Turn−On Time The Turn−On time of the regulator is defined as the time needed to reach the output voltage which is 98% VOUT after assertion of the EN pin. This time is determined by the noise bypass capacitance Cnoise and nominal output voltage level VOUT according the following formula: t ON [s] + C noise [F] @ V OUT [V] 68 @ 10 −6 [A] (eq. 1) Example: Using Cnoise = 100 nF, VOUT = 3 V, COUT = 1 mF, t ON + 100 @ 10 −9 @ 3 68 @ 10 −6 + 4.41 ms The Turn−On time is independent of the load current and output capacitor COUT. To avoid output voltage overshoot during Turn−On please select Cnoise ≥ 10 nF. Current Limit The NCV8570B has been designed to work with low ESR ceramic capacitors on the output. The device will also work with other types of capacitors until the minimum value of capacitance is assured and the capacitor ESR is within the specified range. Generally it is recommended to use 1 mF or larger X5R or X7R ceramic capacitor on the output pin. The Cnoise capacitor is connected directly to the high impedance node. Any loading on this pin like the connection of oscilloscope probe, or the Cnoise capacitor leakage will cause a voltage drop in regulated output voltage. The minimum recommended value of noise bypass capacitor is 10 nF. Values below 10 nF should be avoided due to possible Turn−On overshoot. Particular value should be chosen based on the output noise requirements (Figure 22). Larger values of Cnoise will improve the output noise and PSRR but will increase the regulator Turn−On time. Enable Operation Noise Bypass Capacitor Requirements (Cnoise) Output Current is internally limited within the IC to a typical 310 mA. The NCV8570B will source this amount of current measured with a voltage 100 mV lower than the typical operating output voltage. If the Output Voltage is directly shorted to ground (VOUT = 0 V), the short circuit protection will limit the output current to 320 mA (typ). The current limit and short circuit protection will work properly up to VIN = 5.5 V at TA = 25°C. There is no limitation for the short circuit duration. Thermal Shutdown The enable function is controlled by the logic pin EN. The voltage threshold of this pin is set between 0.4 V and 1.2 V. Voltage lower than 0.4 V guarantees the device is off. Voltage higher than 1.2 V guarantees the device is on. The NCV8570B enters a sleep mode when in the off state drawing less than typically 0.1 mA of quiescent current. The When the die temperature exceeds the Thermal Shutdown threshold (TSDU − 150°C typical), Thermal Shutdown event is detected and the output (VOUT) is turned off. The IC will remain in this state until the die temperature decreases below the Thermal Shutdown Reset threshold (TSDU − 135°C typical). Once the IC temperature falls below the 135°C the LDO is turned−on again. The thermal shutdown feature provides the protection from a catastrophic device failure due to accidental overheating. This protection is not intended to be used as a substitute for proper heat sinking. Reverse Current The PMOS pass transistor has an inherent body diode which will conduct the current in case that the VOUT > VIN. http://onsemi.com 17 NCV8570B Such condition could exist in the case of pulling the VIN voltage to ground. Then the output capacitor voltage will be partially discharged through the PMOS body diode. It have been verified that the device will not be damaged if the output capacitance is less than 22 mF. If however larger output capacitors are used or extended reverse current condition is anticipated the device may require additional external protection against the excessive reverse current. Output Noise 100 nF from the BYP pin to ground. For more information please refer to Figures 22 through 24. Minimum Load Current NCV8570B does not require any minimum load current for stability. The minimum load current is assured by the internal circuitry. Power Dissipation If we neglect the noise coming from the (IN) input pin of the LDO, the main contributor of noise present on the output pin (OUT) is the internal bandgap reference. This is because any noise which is generated at this node will be subsequently amplified through the error amplifier and the PMOS pass device. Access to the bandgap reference node is supplied through the BYP pin. For the 1.8 V output voltage option Noise can be reduced from a typical value of 15 mVrms by using 10 nF to less than 10 mVrms by using a PD(MAX), MAXIMUM POWER DISSIPATION (W) 310 qJA, JUNCTION−TO−AMBIENT THERMAL RESISTANCE (°C/W) 290 270 250 230 210 190 170 150 0 100 PD(MAX), TA = 25°C, 1 oz Cu Thickness PD(MAX), TA = 25°C, 2 oz Cu Thickness 0.60 0.55 0.50 0.45 0.40 0.35 0.30 0.25 0.20 700 For given ambient temperature TA and thermal resistance RqJA the maximum device power dissipation can be calculated by: P D(MAX) + T J(MAX) * T A q JA (eq. 2) The actual power dissipation can be calculated by the formula: P D + V IN * V OUT I OUT ) V INI GND 280 qJA, JUNCTION−TO−AMBIENT THERMAL RESISTANCE (°C/W) 260 240 220 200 180 160 140 120 100 80 0 qJA, 1 oz Cu Thickness qJA, 2 oz Cu Thickness 100 200 300 400 500 PCB COPPER AREA (mm2) 600 PD(MAX), TA = 25°C, 1 oz Cu Thickness PD(MAX), TA = 25°C, 2 oz Cu Thickness (eq. 3) PD(MAX), MAXIMUM POWER DISSIPATION (W) 0.80 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40 0.35 0.30 700 qJA, 1 oz Cu Thickness qJA, 2 oz Cu Thickness 200 300 400 500 PCB COPPER AREA (mm2) 600 Figure 57. Thermal Resistance and Maximum Power Dissipation vs. Copper Area (TSOP−5) Load Regulation Figure 58. Thermal Resistance and Maximum Power Dissipation vs. Copper Area (DFN6) The NCV8570B features very good load regulation of 5 mV Max. in 0 mA to 200 mA range. In order to achieve this very good load regulation a special attention to PCB design is necessary. The trace resistance from the OUT pin to the point of load can easily approach 100 mW which will cause 20 mV voltage drop at full load current, deteriorating the excellent load regulation. Line Regulation In the frequency range from 10 Hz up to about 10 kHz the larger noise bypass capacitor Cnoise will help to improve the PSRR. At the frequencies above 10 kHz the addition of higher COUT output capacitor will result in improved PSRR. PCB Layout Recommendations The NCV8570B features very good line regulation of 0.6mV/V (typ). Furthermore the detailed Output Voltage vs. Input Voltage characteristics (Figures 47 through 49) show that up to VIN = 5 V the Output Voltage deviation is typically less than 250 mV for 1.8 V output voltage option and less than 150 mV for higher output voltage options. Above the VIN = 5 V the output voltage falls rapidly which leads to the typical 0.6 mV/V. Power Supply Rejection Ratio Connect the input (CIN), output (COUT) and noise bypass capacitors (Cnoise) as close as possible to the device pins. The Cnoise capacitor is connected to high impedance BYP pin and thus the length of the trace between the capacitor and the pin should be as small as possible to avoid noise pickup. In order to minimize the solution size use 0402 or 0603 capacitors. To obtain small transient variations and good regulation characteristics place CIN and COUT capacitors close to the device pins and make the PCB traces wide. Larger copper area connected to the pins will also improve the device thermal resistance. The NCV8570B features excellent Power Supply Rejection ratio. The PSRR can be tuned by selecting proper Cnoise and COUT capacitors. http://onsemi.com 18 NCV8570B ORDERING INFORMATION Device NCV8570BMN180R2G NCV8570BMN280R2G NCV8570BMN300R2G NCV8570BMN330R2G NCV8570BSN18T1G NCV8570BSN28T1G NCV8570BSN30T1G NCV8570BSN33T1G Nominal Output Voltage 1.8 V 2.8 V 3.0 V 3.3 V 1.8 V 2.8 V 3.0 V 3.3 V Marking AK AL AM AN ADK ADM ADN ADP TSOP−5 (Pb−Free) 3000 / Tape & Reel DFN6 2 x 2.2 (Pb−Free) 3000 / Tape & Reel Package Shipping† †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 19 NCV8570B PACKAGE DIMENSIONS DFN6 2x2.2, 0.65P CASE 506BA−01 ISSUE A D A B L1 E DETAIL A L L NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 b D D2 E E2 e K L L1 MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 0.30 2.00 BSC 1.10 1.30 2.20 BSC 0.70 0.90 0.65 BSC 0.20 −−− 0.25 0.35 0.00 0.10 PIN ONE REFERENCE 2X 0.10 C 2X 0.10 C A 0.10 C 7X DETAIL B ALTERNATE CONSTRUCTIONS DETAIL B 0.08 C SIDE VIEW A1 D2 e 1 3 6X C SEATING PLANE DETAIL A 6X L L1 E2 1 6X K 6 4 6X b 0.10 C A B 0.05 C NOTE 3 BOTTOM VIEW *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 20 ÇÇÇ ÉÉÉ ÉÉÉ A1 PACKAGE OUTLINE ÉÉ ÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ALTERNATE TERMINAL CONSTRUCTIONS TOP VIEW EXPOSED Cu MOLD CMPD A3 SOLDERING FOOTPRINT* 1.36 0.58 6X 0.96 2.50 0.35 0.65 PITCH DIMENSIONS: MILLIMETERS NCV8570B PACKAGE DIMENSIONS TSOP−5 CASE 483−02 ISSUE H NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. DIM A B C D G H J K L M S MILLIMETERS MIN MAX 3.00 BSC 1.50 BSC 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 NOTE 5 2X D 5X 0.20 C A B M 0.10 T 0.20 T L A 5 1 2 4 3 2X B S K DETAIL Z G DETAIL Z C 0.05 H T SEATING PLANE J SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 mm inches SCALE 10:1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 21 NCV8570B/D