NCV8570SN33T1G

NCV8570 200 mA, Ultra Low Noise, High PSRR, BiCMOS RF LDO Regulator Noise sensitive RF applications such as Power Amplifiers in satellite radios, infotainment equipment, and precision instrumentation for automotive applications require very clean power supplies. The NCV8570 is 200 mA LDO that provides the engineer with a very stable, accurate voltage with ultra low noise and very high Power Supply Rejection Ratio (PSRR) suitable for RF applications. In order to optimize performance for battery operated portable applications, the NCV8570 employs an advanced BiCMOS process to combine the benefits of low noise and superior dynamic performance of bipolar elements with very low ground current consumption at full loads offered by CMOS. Furthermore, in order to provide a small footprint for space−conscious applications, the NCV8570 is stable with small, low value capacitors and is available in very small DFN6 2x2.2 and TSOP−5 packages. Features http://onsemi.com MARKING DIAGRAMS 6 DFN6, 2x2.2 MN SUFFIX CASE 506BA 1 XX = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) 5 5 1 TSOP−5 SN SUFFIX CASE 483 1 XXX = Specific Device Code A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) XXXAYWG G • Output Voltage Options: • • • • • • • • • • • • • • • • − 1.8 V, 2.5 V, 2.75 V, 2.8 V, 3.0 V, 3.3 V − Contact Factory for Other Voltage Options Output Current Limit 200 mA Ultra Low Noise (typ 15 mVrms) Very High PSRR (typ 80 dB) Stable with Ceramic Output Capacitors as low as 1 mF Low Sleep Mode Current (max 1 mA) Active Discharge Circuit Current Limit Protection Thermal Shutdown Protection AEC Qualified PPAP Capable These are Pb−Free Devices Satellite and HD Radio Noise Sensitive Applications (Video, Audio) Analog Power Supplies Portable/Built−in DVD Entertainment Systems GPS Vin Cin Vin Vout NCV8570 CE Cnoise GND Vout Cnoise Cout PIN ASSIGNMENTS CE GND Vin 1 2 3 6 5 4 Cnoise GND Vout Typical Applications 1 Vin GND CE (Top View) 5 Vout Cnoise (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. Figure 1. Typical Application Schematic © Semiconductor Components Industries, LLC, 2009 November, 2009 − Rev. 3 1 Publication Order Number: NCV8570/D É É XXMG G NCV8570 Vin Bandgap Reference Voltage Cnoise CE Vout Current Limit Figure 2. Simplified Block Diagram PIN FUNCTION DESCRIPTION Pin No. DFN6 1 TSOP−5 3 Pin Name CE Description Chip Enable: This pin allows on/off control of the regulator. To disable the device, connect to GND. If this function is not in use, connect to Vin. Internal 5 MW Pull Down resistor is connected between CE and GND. Power Supply Ground (Pins are fused for the DFN package) Power Supply Input Voltage Regulated Output Voltage Noise reduction pin. (Connect 100 nF or 10 nF capacitor to GND) 2, 5, EPAD 3 4 6 2 1 5 4 GND Vin Vout Cnoise MAXIMUM RATINGS Rating Input Voltage (Note 1) Chip Enable Voltage Noise Reduction Voltage Output Voltage Maximum Junction Temperature (Note 1) Storage Temperature Range Symbol Vin VCE VCnoise Vout TJ(max) TSTG Value −0.3 V to 6 V −0.3 V to Vin +0.3 V −0.3 V to Vin +0.3 V −0.3 V to Vin +0.3 V 150 −55 to 150 Unit V V V V °C °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. NOTE: This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL−STD−883, Method 3015 Machine Model Method 200 V This device series meets or exceeds AEC Q100 standard. THERMAL CHARACTERISTICS Rating Package Thermal Resistance, DFN6: (Note 1) Junction−to−Lead (pin 2) Junction−to−Ambient Package Thermal Resistance, TSOP−5: (Note 1) Junction−to−Lead (pin 5) Junction−to−Ambient Symbol RqJA Value 37 120 109 220 Unit °C/W 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area http://onsemi.com 2 + − Active Discharge GND RqJA °C/W NCV8570 ELECTRICAL CHARACTERISTICS (Vin = Vout + 0.5 V, VCE = 1.2 V, Cin = 0.1 mF, Cout = 1 mF, Cnoise = 10 nF, TA = −40°C to 85°C, unless otherwise specified (Note 2)) Characteristic REGULATOR OUTPUT Input Voltage Output Voltage (Note 3) 1.8 V 2.5 V 2.75 V 2.8 V 3.0 V 3.3 V 1.8 V 2.5 V 2.75 V 2.8 V 3.0 V 3.3 V Vin = (Vout +0.5 V) to 5.5 V Iout = 1 mA Vin Vout 2.5 1.764 2.450 2.695 2.744 2.940 3.234 (−2%) 1.746 2.425 2.6675 2.716 2.910 3.201 (−3%) − − − Regline Regload Vn − − ILIM ISC VDO 200 210 − − − − − − − − − − − − − − − − 1.2 2.5 15 20 310 320 105 105 105 100 100 170 150 150 140 130 70 110 0.1 150 20 − − 5 − − 470 490 155 155 155 150 150 215 205 205 200 200 90 220 1 − − 0.4 − 10 mA mA mV −0.2 − − − − − − − − − − − − − − 5.5 1.836 2.550 2.805 2.856 3.060 3.366 (+2%) 1.854 2.575 2.8325 2.884 3.090 3.399 (+3%) − − − 0.2 25 %/V mV mVrms V V Test Conditions Symbol Min Typ Max Unit Output Voltage (Note 3) Vin = (Vout +0.5 V) to 5.5 V Iout = 1 mA to 200 mA Vout V Power Supply Ripple Rejection Vin = Vout +1.0 V + 0.5 Vp−p Iout = 1 mA to 150 mA f = 120 Hz Cnoise = 100nF f = 1 kHz f = 10 kHz Vin = (Vout +0.5 V) to 5.5 V, Iout = 1 mA Iout = 1 mA to 200 mA f = 10 Hz to 100 kHz Iout = 1 mA to 150 mA Cnoise = 100 nF Cnoise = 10 nF Vout = Vout(nom) – 0.1 V Vout = 0 V 2.5 V 2.75 V 2.8 V 3.0 V 3.3 V 2.5 V 2.75 V 2.8 V 3.0 V 3.3 V Iout = 150 mA PSRR 80 80 65 − 12 dB Line Regulation Load Regulation Output Noise Voltage Output Current Limit Output Short Circuit Current Dropout Voltage (Note 4, 5) Dropout Voltage (Note 6) Iout = 200 mA VDO mV GENERAL Ground Current Disable Current Thermal Shutdown Threshold (Note 4) Thermal Shutdown Hysteresis (Note 4) CHIP ENABLE Input Threshold Low High Vth(CE) RPD(CE) V MW Iout = 1 mA Iout = 200 mA VCE = 0 V IGND IDIS TSD TSH mA mA °C °C Internal Pull−Down Resistance (Note 7) http://onsemi.com 3 NCV8570 ELECTRICAL CHARACTERISTICS (Vin = Vout + 0.5 V, VCE = 1.2 V, Cin = 0.1 mF, Cout = 1 mF, Cnoise = 10 nF, TA = −40°C to 85°C, unless otherwise specified (Note 2)) Characteristic TIMING Turn−on Time Turn−off Time Iout = 150 mA Cnoise = 10 nF/100 nF Cnoise = 10 nF Cnoise = 100 nF Iout = 1 mA Iout = 10 mA ton toff − − − − 0.4 4 800 200 − − − − ms ms Test Conditions Symbol Min Typ Max Unit 2. Performance guaranteed over the indicated operating temperature range by design and/or characterization, production tested at TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 3. Contact factory for other voltage options. 4. Guaranteed by design and characterization. 5. Characterized when output voltage falls 100 mV below the regulated voltage at Vin = Vout + 1 V if Vout < 2.5 V, then VDO = Vin − Vout at Vin = 2.5 V. 6. Measured when output voltage falls 100 mV below the regulated voltage at Vin = Vout + 0.5 V if Vout < 2.5 V, then VDO = Vin − Vout at Vin = 2.5 V. 7. Expected to disable device when CE pin is floating. http://onsemi.com 4 NCV8570 TYPICAL CHARACTERISTICS 1.820 Vout, OUTPUT VOLTAGE (V) Vout, OUTPUT VOLTAGE (V) 1.815 1.810 Iout = 1 mA Iout = 150 mA Vout = 1.8 V 2.520 2.515 2.510 2.505 2.500 2.495 2.490 2.485 2.480 −40 −20 0 20 40 60 80 100 Iout = 150 mA Iout = 1 mA Vout = 2.5 V 1.805 1.800 1.795 1.790 1.785 1.780 −40 −20 0 20 40 60 80 100 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 3. Output Voltage vs. Temperature (Vout = 1.8 V) 2.760 Vout, OUTPUT VOLTAGE (V) Vout, OUTPUT VOLTAGE (V) 2.755 2.750 2.745 2.740 2.735 2.730 2.725 2.720 −40 −20 0 20 40 60 80 Iout = 1 mA Iout = 150 mA Vout = 2.75 V 2.820 2.815 2.810 2.805 2.800 2.795 2.790 2.785 2.780 −40 Figure 4. Output Voltage vs. Temperature (Vout = 2.5 V) Vout = 2.8 V Iout = 1 mA Iout = 150 mA 100 −20 0 20 40 60 80 100 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 5. Output Voltage vs. Temperature (Vout = 2.75 V) 3.020 Vout, OUTPUT VOLTAGE (V) Vout, OUTPUT VOLTAGE (V) 3.015 3.010 3.005 Iout = 1 mA Iout = 150 mA Vout = 3.0 V 3.320 3.315 3.310 3.305 3.300 3.295 3.290 3.285 3.280 −40 Figure 6. Output Voltage vs. Temperature (Vout = 2.8 V) Vout = 3.3 V 3.000 2.995 2.990 2.985 2.980 −40 −20 0 20 40 60 Iout = 1 mA Iout = 150 mA 80 100 −20 0 20 40 60 80 100 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 7. Output Voltage vs. Temperature (Vout = 3.0 V) Figure 8. Output Voltage vs. Temperature (Vout = 3.3 V) http://onsemi.com 5 NCV8570 TYPICAL CHARACTERISTICS 4.0 Vout, OUTPUT VOLTAGE (V) 3.3 V 3.0 V 2.8 V 2.5 V 1.8 V IGND, GROUND CURRENT (mA) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0 1.0 2.0 3.0 4.0 TA = 25°C Iout = 1 mA 5.0 6.0 140 130 120 110 100 90 80 70 60 50 40 −40 −20 0 20 40 60 80 100 Iout = 1 mA Iout = 150 mA Vin, INPUT VOLTAGE (V) TA, AMBIENT TEMPERATURE (°C) Figure 9. Output Voltage vs. Input Voltage 200 VDO, DROPOUT VOLTAGE (mV) IGND, GROUND CURRENT (mA) 180 160 140 120 100 80 60 40 20 0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 Vout = 1.8 V Iout = 1 mA Vout = 2.5 V TA = 25°C Vout = 2.8 V Vout = 3.3 V Vout = 3.0 V Iout = 150 mA 135 130 125 120 115 110 105 100 95 90 85 0 Figure 10. Ground Current vs. Temperature Vout = 2.5 V TA = 85°C TA = 25°C TA = −40°C 25 50 75 100 125 150 Vin, INPUT VOLTAGE (V) Iout, OUTPUT CURRENT (mA) Figure 11. Ground Current vs. Input Voltage 125 VDO, DROPOUT VOLTAGE (mV) 115 110 105 100 95 90 85 80 75 TA = −40°C TA = 25°C VDO, DROPOUT VOLTAGE (mV) 120 Vout = 2.8 V TA = 85°C 125 120 115 110 105 100 95 90 85 80 75 Figure 12. Dropout Voltage vs. Output Current Vout = 3.0 V TA = 85°C TA = 25°C TA = −40°C 0 25 50 75 100 125 150 0 25 50 75 100 125 150 Iout, OUTPUT CURRENT (mA) Iout, OUTPUT CURRENT (mA) Figure 13. Dropout Voltage vs. Output Current Figure 14. Dropout Voltage vs. Output Current http://onsemi.com 6 NCV8570 TYPICAL CHARACTERISTICS 125 VDO, DROPOUT VOLTAGE (mV) 120 115 110 105 100 95 90 85 80 75 0 25 50 75 100 125 150 TA = −40°C TA = 25°C Vout = 3.3 V TA = 85°C Iout, OUTPUT CURRENT (mA) Figure 15. Dropout Voltage vs. Output Current ISC, SHORT CIRCUIT CURRENT LIMIT (mA) 340 ILIM, CURRENT LIMIT (mA) 330 320 310 300 290 280 −40 350 340 330 320 310 300 290 −40 −20 0 20 40 60 80 100 −20 0 20 40 60 80 100 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 16. Current Limit vs. Temperature 0 −20 −30 PSRR (dB) −40 −50 −60 −70 −80 −90 −100 Cnoise = 100 nF 10 100 1,000 f, FREQUENCY (Hz) 10,000 Cnoise = 10 nF Vn, NOISE DENSITY (nV/√Hz) −10 TA = 25°C Vout = 1.8 V Iout = 150 mA 700 600 500 400 300 200 100 0 10 Figure 17. Short Circuit Current vs. Temperature TA = 25°C Vout = 1.8 V Iout = 150 mA Cnoise = 100 nF 100,000 100 1,000 FREQUENCY (Hz) 10,000 100,000 Figure 18. PSRR vs. Frequency Figure 19. Noise Density vs. Frequency http://onsemi.com 7 NCV8570 TYPICAL CHARACTERISTICS 4.2 V VCE 1 V/div Vin 500 mV/div 3.6 V TA = 25°C Vout = 1.8 V Iout = 150 mA Cout = 1 mF Vout 10 mV/div TA = 25°C Vout 1 V/div Vin = 4 V Iout = 150 mA Cnoise = 0 nF TIME (20 ms/div) TIME (100 ms/div) Figure 20. Enable Voltage and Output Voltage vs. Time (Start−Up) 10 ESR of OUTPUT CAPACITOR (W) TA = 25°C Figure 21. Line Transient Unstable Region Vout = 3.0 V Iout 100 mA/div 1 Vout = 1.8 V Stable Region Vout 50 mV/div Vin = 2.8 V Vout = 1.8 V Cout = 1 mF 0.1 Cout = 1 mF to 10 mF 0 25 50 75 100 125 150 0.01 TIME (40 ms/div) Iout, OUTPUT CURRENT (mA) Figure 22. Load Transient Figure 23. Output Capacitor ESR vs. Output Current http://onsemi.com 8 NCV8570 APPLICATION INFORMATION General Output Noise The NCV8570 is a 200 mA (current limited) linear regulator with a logic input for on/off control for the high speed turn−off output voltage. Access to the major contributor of noise within the integrated circuit is provided as the focus for noise reduction within the linear regulator system. Power Up/Down During power up, the NCV8570 maintains a high impedance output (Vout) until sufficient voltage is present on Vin to power the internal bandgap reference voltage. When sufficient voltage is supplied (approx 1.2 V), Vout will start to turn on (assume CE shorted to Vin), linearly increasing until the output regulation voltage has been reached. Active discharge circuitry has been implemented to insure a fast turn off time. Then CE goes low, the active discharge transistor turns on creating a fast discharge of the output voltage. Power to drive this circuitry is drawn from the output node. This is to maintain the lowest quiescent current when in the sleep mode (VCE = 0.4 V). This circuitry subsequently turns off when the output voltage discharges. CE (chip enable) The main contributor for noise present on the output pin Vout is the reference voltage node. This is because any noise which is generated at this node will be subsequently amplified through the error amplifier and the PMOS pass device. Access to the reference voltage node is supplied directly through the Cnoise pin. Noise can be reduced from a typical value of 20 mVrms by using 10 nF to 15 mVrms by using a 100 nF from the Cnoise pin to ground. A bypass capacitor is recommended for good noise performance and better load transient response. Thermal Shutdown The enable function is controller by the logic pin CE. The voltage threshold of this pin is set between 0.4 V and 1.2 V. A voltage lower than 0.4 V guarantees the device is off. A voltage higher than 1.2 V guarantees the device is on. The NCV8570 enters a sleep mode when in the off state drawing less than 1 mA of quiescent current. The device can be used as a simple regulator without use of the chip enable feature by tying the CE pin to the Vin pin. Current Limit When the die temperature exceeds the Thermal Shutdown threshold, a Thermal Shutdown (TSD) event is detected and the output (Vout) is turned off. There is no effect from the active discharge circuitry. The IC will remain in this state until the die temperature moves below the shutdown threshold (150°C typical) minus the hysteresis factor (20°C typical). This feature provides protection from a catastrophic device failure due to accidental overheating. It is not intended to be used as a substitute for proper heat sinking. The maximum device power dissipation can be calculated by: PD + TJ * TA R qJA Thermal resistance value versus copper area and package is shown in Figure 24. 380 RqJA, THERMAL RESISTANCE JUNCTION−TO−AMBIENT (°C/W) 330 280 230 180 130 80 TSOP−5 (1 oz) Output Current is internally limited within the IC to a minimum of 200 mA. The design is set to a higher value to allow for variation in processing and the temperature coefficient of the parameter. The NCV8570 will source this amount of current measured with a voltage 100 mV lower than the typical operating output voltage. The specification for short circuit current limit (@ Vout = 0 V) is specified at 320 mA (typ). There is no additional circuitry to lower the current limit at low output voltages. This number is provided for informational purposes only. Output Capacitor TSOP−5 (2 oz) DFN6 2x2.2 (1 oz) DFN6 2x2.2 (2 oz) 0 100 200 300 400 (mm2) 500 600 700 The NCV8570 has been designed to work with low ESR ceramic capacitors. There is no ESR lower limit for stability for the recommended 1 mF output capacitor. Stable region for Output capacitor ESR vs Output Current is shown in Figure 23. Typical characteristics were measured with Murata ceramic capacitors. GRM219R71E105K (1 mF, 25 V, X7R, 0805) and GRM21BR71A106K (10 mF, 10 V, X7R, 0805). PCB COPPER AREA Figure 24. RqJA vs. PCB Copper Area (TSOP−5 for comparison only) http://onsemi.com 9 NCV8570 ORDERING INFORMATION Device NCV8570MN180R2G NCV8570MN250R2G NCV8570MN275R2G NCV8570MN280R2G NCV8570MN300R2G NCV8570MN330R2G NCV8570SN18T1G NCV8570SN25T1G NCV8570SN275T1G NCV8570SN28T1G NCV8570SN30T1G NCV8570SN33T1G Nominal Output Voltage 1.8 V 2.5 V 2.75 V 2.8 V 3.0 V 3.3 V 1.8 V 2.5 V 2.75 V 2.8 V 3.0 V 3.3 V Marking MT MU MV MW MX MY ACV ACW ACX ACY ACZ AC2 TSOP−5 (Pb−Free) 3000 / Tape & Reel DFN6 2x2.2 (Pb−Free) 3000 / Tape & Reel Package Shipping† †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 10 NCV8570 PACKAGE DIMENSIONS TSOP−5 CASE 483−02 ISSUE H NOTE 5 2X D 5X 0.20 C A B M 0.10 T 0.20 T L A 5 1 2 4 3 2X B S K DETAIL Z G NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. DIM A B C D G H J K L M S MILLIMETERS MIN MAX 3.00 BSC 1.50 BSC 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 DETAIL Z C 0.05 H T SEATING PLANE J SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 mm inches SCALE 10:1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 11 NCV8570 PACKAGE DIMENSIONS 6 PIN DFN, 2x2.2, 0.65P CASE 506BA−01 ISSUE A D A B L1 E DETAIL A ALTERNATE TERMINAL CONSTRUCTIONS L L 2X 0.10 C 2X 0.10 C A 0.10 C 7X DETAIL B A1 DETAIL B ALTERNATE CONSTRUCTIONS 0.08 C SIDE VIEW A1 D2 e 1 3 6X C SEATING PLANE PACKAGE OUTLINE DETAIL A 6X L L1 E2 1 6X K 6 4 6X b 0.10 C A B 0.05 C NOTE 3 BOTTOM VIEW *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. The products described herein (NCV8570), may be covered by one or more U.S. patents. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 12 ÇÇ ÇÇ ÉÉ 0.96 0.35 ÉÉ ÉÉ ÉÉ ÉÉÉ ÉÉÉ PIN ONE REFERENCE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 b D D2 E E2 e K L L1 MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 0.30 2.00 BSC 1.10 1.30 2.20 BSC 0.70 0.90 0.65 BSC 0.20 −−− 0.25 0.35 0.00 0.10 TOP VIEW EXPOSED Cu MOLD CMPD A3 SOLDERING FOOTPRINT* 1.36 0.58 6X 2.50 0.65 PITCH DIMENSIONS: MILLIMETERS NCV8570/D