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LD0 Regulator with RESET
and Delay Time Select,
Ultra Low Iq, 150 mA
NCV8760C
The NCV8760C is a precision ultra low Iq low dropout voltage
regulator. Quiescent currents as low as 18 mA typical make it ideal for
automotive applications requiring low quiescent current. Integrated
control features such as Reset and Delay Time Select make it ideal for
powering microprocessors.
It is available with a fixed output voltage of 5.0 V and 3.3 V and
regulates within ±2.0%.
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MARKING
DIAGRAMS
Features
•
•
•
•
•
•
•
•
•
•
Output Voltage Options: 3.3 V and 5 V
Output Voltage Accuracy: ±2.0%
Output Current up to 150 mA
Microprocessor Compatible Control Functions:
♦ Delay Time Select
♦ RESET Output
Low Dropout Voltage
Ultra Low Quiescent Current of 18 mA Typical
Protection Features:
♦ Thermal Shutdown
♦ Current Limitation
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
EMC Compliant
These Devices are Pb−Free and RoHS Compliant
Applications (for safety applications refer to Figure 29)
1
5
DPAK 5−PIN
DT SUFFIX
CASE 175AA
760yCxG
ALYWW
1
x
y
A
L
Y
WW
G
= 5 for 5 V Output, 3 for 3.3 V Output
= 1 for 8 ms, 128 ms Reset Delay,
= 2 for 8 ms, 32 ms Reset Delay
= 3 for 16 ms, 64 ms Reset Delay
= 4 for 32 ms, 128 ms Reset Delay
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the
dimensions section on page 13 of this data sheet.
• Automotive:
Body Control Module
Instruments and Clusters
♦ Occupant Protection and Comfort
♦ Conventional Powertrain
Battery Powered Consumer Electronics
♦
♦
•
VBAT
VIN
CIN
0.1 mF
COUT
2.2 mF
NCV8760C
DT
DT
VDD
VOUT
GND
RRO
5 kW
RO
Microprocessor
I/O
Figure 1. Application Diagram
© Semiconductor Components Industries, LLC, 2018
July, 2021 − Rev. 1
1
Publication Order Number:
NCV8760C/D
NCV8760C
PIN CONNECTIONS
PIN
Tab,
1. VIN
2. RO
3. GND
4. DT
5. VOUT
1
DPAK−5
Figure 2. Pin Connections
PIN DESCRIPTIONS
Pin
Symbol
Function
1
VIN
Input Supply Voltage. Connect a 0.1 mF bypass capacitor to GND at the IC.
2
RO
Reset Output. Open Drain connected to the VOUT via an internal 30 kW pull−up resistor. Goes low when
VOUT drops by more than 7% from its nominal level.
3, Tab
GND
4
DT
5
VOUT
Ground
Reset Delay Time Select. Short to GND or connect to VOUT to reset delay select time value.
(See DETAILED OPERATING DESCRIPTION)
Regulated Voltage Output. Connect a 2.2 mF capacitor to ground for typical applications.
VIN
VOUT
RRO
Timing
Circuit
and
Reset
Output
Driver
Driver with
Current
Limit
Thermal
Shutdown
VREF
DT
GND
Figure 3. Block Diagram
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2
RO
NCV8760C
ABSOLUTE MAXIMUM RATINGS
Symbol
Min
Max
Unit
Input Voltage (Note 1)
Rating
DC
VIN
−0.3
40
V
Input Voltage (Note 2)
Load Dump − Suppressed
VIN
−
45
V
VOUT
−0.3
7.0
V
DT (Reset Delay Time Select) Voltage
VDT
−0.3
7.0
V
Reset Output Voltage
VRO
−0.3
7.0
V
Junction Temperature Range
TJ
−40
150
°C
Storage Temperature Range
TSTG
−55
150
°C
Output Voltage
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. Load Dump Test B (with centralized load dump suppression) according to ISO16750−2 standard. Guaranteed by design. Not tested in
production. Passed Class B according to ISO16750−1.
ESD CAPABILITY (Note 3)
Rating
Symbol
Min
Max
Unit
ESD Capability, Human Body Model
ESDHBM
−4.0
4.0
kV
ESD Capability, Charged Device Model
ESDCDM
−1.0
1.0
kV
3. This device series incorporates ESD protection and is tested by the following methods:
ESD HBM tested per AEC−Q100−002 (JS−001−2017).
Field Induced Charge Device Model ESD characterization is not performed on plastic molded packages with body sizes 2x2 mm due
to the inability of a small package body to acquire and retain enough charge to meet the minimum CDM discharge current waveform
characteristic defined in JEDEC JS−002−2018.
LEAD SOLDERING TEMPERATURE AND MSL (Note 4)
Rating
Moisture Sensitivity Level
Symbol
Value
Unit
MSL
1
−
DPAK 5
4. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
THERMAL CHARACTERISTICS
Rating
Symbol
Value
RqJA
RYJC
RqJA
RYJC
47
9.1
28
7.4
Thermal Characteristics, DPAK−5 (Note 1)
Thermal Resistance, Junction−to−Air (Note 5)
Thermal Reference, Junction−to−Top Case (Note 5)
Thermal Resistance, Junction−to−Air (Note 6)
Thermal Reference, Junction−to−Top Case (Note 6)
Unit
°C/W
5. Values based on 1s0p copper area of 645 mm2 (or 1 in2) of 1 oz. copper thickness and FR4 PCB substrate. Single layer according to
JEDEC51.3.
6. Values based on 2s2p copper area of 645 mm2 (or 1 in2) of 1 oz. copper thickness and FR4 PCB substrate. 4 layer according to JEDEC51.7.
RECOMMENDED OPERATING RANGES (Note 1)
Rating
Symbol
Min
Max
Unit
Input Voltage (Note 7)
VIN
4.5
40
V
Junction Temperature Range
TJ
−40
150
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
7. Minimum VIN = 4.5 V or (VOUT + VDO), whichever is higher.
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3
NCV8760C
ELECTRICAL CHARACTERISTICS
(VIN = 13.5 V, CIN = 0.1 mF, COUT = 2.2 mF, Min and Max values are valid for temperature range −40°C ≤ TJ ≤ 150°C unless noted
otherwise and are guaranteed by test, design or statistical correlation. Typical values are referenced to TJ = 25°C) (Note 8)
Test Conditions
Parameter
Symbol
Min
Typ
Max
Unit
4.9
4.9
3.234
3.234
5.0
5.0
3.3
3.3
5.1
5.1
3.366
3.366
0
20
mV
Regulator Output
Output Voltage (Accuracy %)
5.0 V
3.3 V
Line Regulation
VIN = 5.7 V to 16 V, IOUT = 0 mA to 150 mA
VIN = 5.55 V to 40 V, IOUT = 0 mA to 100 mA
VIN = 4.5 V to 16 V, IOUT = 0 mA to 150 mA
VIN = 4.5 V to 40 V, IOUT = 0 mA to 100 mA
VOUT
V
VIN = 6 V to 28 V, IOUT = 5 mA
RegLINE
−20
IOUT = 0.1 mA to 150 mA
RegLOAD
−40
10
40
mV
VDO
−
−
125
200
300
450
mV
IOUT = 0 mA, TJ = 25°C
IOUT = 0 mA, TJ ≤ 125°C
IOUT = 0.1 mA, TJ = 25°C
IOUT = 0.1 mA, TJ ≤ 125°C
IQ
−
−
−
−
18
−
20
−
21
23
24
26
mA
Current Limit
VOUT = 0.96 x VOUT_NOM
ILIM
205
−
525
mA
Short Circuit Current Limit
VOUT = 0 V
ISC
205
−
525
mA
PSRR
−
70
−
dB
−
2.0
−
−
0.8
−
−
−
1.0
VIN_RT
−
3.8
4.25
V
VRT
90
93
96
%VOUT_NOM
VRH
−
2.0
−
%VOUT_NOM
VROL
−
0.2
0.4
V
−
V
Load Regulation
Dropout Voltage (Note 9)
5.0 V
IOUT = 100 mA
IOUT = 150 mA
Quiescent Current
Quiescent Current, IQ = IIN − IOUT
Current Limit Protection
PSRR
Power Supply Ripple Rejection
f = 100 Hz, 0.5 VP−P
DT (Reset Delay Time Select)
DT Threshold Voltage
Logic Low
Logic High
DT Input Current
VTH(DT)
VDT = 5 V
IDT
V
mA
Reset Output RO
Input Voltage Reset Threshold 3.3 V
VIN decreasing, VOUT > VRT
Output Voltage Reset Threshold
VOUT decreasing
Reset Hysteresis
Reset Output Low Voltage
VOUT < VRT, IRO = −1 mA
Reset Output High Voltage
VROH
Integrated Reset Pull Up Resistor
Reset Reaction Time
VOUT − VOUT −
0.4
0.2
RRO
15
30
50
kW
VOUT into UV to RESET Low
tRR
16
25
38
ms
VOUT into regulation to RO High
tRDx
5.0
10
20
40
80
8.0
16
32
64
128
11.5
23
46
92
184
RESET Delay with DT Selection
Reset Time Out of RESET
8 ms version
16 ms version
32 ms version
64 ms version
128 ms version
ms
Thermal Shutdown (Note 10)
Thermal Shutdown Temperature
TSD
150
175
195
°C
Thermal Shutdown Hysteresis
TSH
−
10
−
°C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
8. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA X TJ. Low duty cycle
pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
9. Measured when output voltage falls 100 mV below the regulated voltage at VIN = 13.5 V. If VOUT < 5 V, then VDO = VIN − VOUT. Maximum
dropout voltage value is limited by minimum input voltage VIN = 4.5 V recommended for guaranteed operation at maximum output current.
10. Values based on design and/or characterization.
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4
NCV8760C
CHARACTERISTICS CURVES − 5.0 V Option
5.005
VIN = 13.5 V
IOUT = 100 mA
VOUT(nom) = 5.0 V
5.08
5.06
VOUT, OUTPUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
5.10
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
−40 −20
0
20
40
60
80
5.000
TJ = 25°C
4.995
TJ = −40°C
4.990
4.985
4.980
4.970
4.965
75
100
125
150
Figure 5. Output Voltage vs. Output Current
360
ILIM, ISC, CURRENT LIMIT (mA)
VOUT, OUTPUT VOLTAGE (V)
50
Figure 4. Output Voltage vs. Junction
Temperature
4
3
2
TJ = 25°C
1
TJ = 150°C
0
1
2
TJ = −40°C
3
4
5
6
VIN = 13.5 V
VOUT(nom) = 5.0 V
355
350
345
340
ISC @ VOUT = 0 V
335
ILIM @ VOUT = 4.8 V
330
325
320
−40 −20
8
7
0
20
40
60
80
100
120 140 160
VIN, INPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 6. Output Voltage vs. Input Voltage
Figure 7. Output Current Limit vs. Junction
Temperature
400
400
VIN = 13.5 V
VOUT(nom) = 5.0 V
300
VDO, DROPOUT VOLTAGE (mV)
VDO, DROPOUT VOLTAGE (mV)
25
IOUT, OUTPUT CURRENT (mA)
IOUT = 100 mA
VOUT(nom) = 5.0 V
5
TJ = 150°C
200
TJ = 25°C
100
TJ = −40°C
0
0
TJ, JUNCTION TEMPERATURE (°C)
6
0
TJ = 150°C
4.960
4.955
100 120 140 160
VIN = 13.5 V
VOUT(nom) = 5.0 V
4.975
0
50
100
VIN = 13.5 V
VOUT(nom) = 5.0 V
300
IOUT = 150 mA
200
0
150
IOUT = 100 mA
100
0
20
40
60
80
100
120
140 160
IOUT, OUTPUT CURRENT (mA)
TJ, JUNCTION TEMPERATURE (°C)
Figure 8. Dropout Voltage vs. Output Current
Figure 9. Dropout Voltage vs. Junction
Temperature
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5
NCV8760C
CHARACTERISTICS CURVES − 5.0 V Option
30
700
600
500
400
300
200
100
0
4
8
12
16
20
24
28
32
VIN = 13.5 V
IOUT = 100 mA
VOUT(nom) = 5.0 V
28
26
24
22
20
18
16
14
12
10
−40 −20
40
36
0
20
40
60
80
100 120 140 160
VIN, INPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 10. Quiescent Current vs. Input Voltage
Figure 11. Quiescent Current vs. Junction
Temperature
1000
100
VIN = 13.5 V
VOUT(nom) = 5.0 V
800
IOUT = 100 mA
90
TJ = −40°C
80
TJ = 25°C
70
PSRR (dB)
0
IQ, QUIESCENT CURRENT (mA)
IQ, QUIESCENT CURRENT (mA)
TJ = 25°C
IOUT = 100 mA
VOUT(nom) = 5.0 V
800
600
TJ = 150°C
400
60
IOUT = 150 mA
50
40
30
200
20
0
10
0
0
25
50
75
100
125
150
VIN = 13.5 V ± 0.5 VPP
COUT = 2.2 mF
VOUT(nom) = 5.0 V
10
100
1K
10K
100K
IOUT, OUTPUT CURRENT (mA)
f, FREQUENCY (Hz)
Figure 12. Quiescent Current vs. Output
Current
Figure 13. PSRR vs. Frequency
500
5.3
5.140 V
VOUT
400
5.2
5.1
5.0
300
4.9
TJ = 25°C
VIN = 13.5 V
trise/fall = 1 ms
COUT = 2.2 mF
4.746 V
200
150 mA
100
0
−40
4.8
4.7
4.6
4.5
4.4
4.3
120 160 200 240 280 320 360
0.1 mA
0
40
80
TIME (ms)
Figure 14. Load Transients
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6
IOUT
VOUT, OUTPUT VOLTAGE (V)
IOUT, OUTPUT CURRENT (mA)
IQ, QUIESCENT CURRENT (mA)
900
1M
NCV8760C
CHARACTERISTICS CURVES − 5.0 V Option
5.2
5.110 V
50
5.1
VOUT
40
5.0
4.943 V
30
28 V
4.9
20
TJ = 25°C
IOUT = 5 mA
trise/fall = 1 ms
COUT = 2.2 mF
4.8
10
6V
0
−400
400
VIN
2000
1200
2800
4.7
4.6
3600
TIME (ms)
Figure 15. Line Transients
100
Unstable Region
ESR (W)
10
Stable Region
1
0.1
0.01
VIN = 13.5 V
VOUT(nom) = 5.0 V
COUT = 1.0 mF − 100 mF
0
25
50
75
100
125
IOUT, OUTPUT CURRENT (mA)
Figure 16. Output Stability with Output
Capacitor ESR
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7
150
VOUT, OUTPUT VOLTAGE (V)
VIN, INPUT VOLTAGE (V)
60
NCV8760C
CHARACTERISTICS CURVES − 3.3 V Option
3.305
VIN = 13.5 V
IOUT = 100 mA
VOUT(nom) = 3.3 V
3.36
3.34
VOUT, OUTPUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
3.38
3.32
3.30
3.28
3.26
3.24
3.22
−40 −20
0
20
40
60
80
TJ = 25°C
3.300
TJ = −40°C
3.295
VIN = 13.5 V
VOUT(nom) = 3.3 V
3.290
3.285
100 120 140 160
25
50
75
100
125
150
IOUT, OUTPUT CURRENT (mA)
Figure 17. Output Voltage vs. Junction
Temperature
Figure 18. Output Voltage vs. Output Current
360
IOUT = 100 mA
VOUT(nom) = 3.3 V
3.5
ILIM, ISC, CURRENT LIMIT (mA)
VOUT, OUTPUT VOLTAGE (V)
0
TJ, JUNCTION TEMPERATURE (°C)
4.0
3.0
2.5
2.0
1.5
TJ = 25°C
1.0
0.5
0
TJ = 150°C
TJ = 150°C
0
1
2
TJ = −40°C
3
4
5
6
7
VIN = 13.5 V
VOUT(nom) = 3.3 V
355
350
345
ISC @ VOUT = 0 V
340
ILIM @ VOUT = 3.168 V
335
330
325
320
−40 −20
8
0
20
40
60
80
100
120 140 160
VIN, INPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 19. Output Voltage vs. Input Voltage
Figure 20. Output Current Limit vs. Junction
Temperature
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8
NCV8760C
CHARACTERISTICS CURVES − 3.3 V Option
30
125
100
75
50
25
0
0
4
8
12
16
20
24
28
32
26
24
22
20
18
16
14
12
10
−40 −20
40
36
VIN = 13.5 V
IOUT = 100 mA
VOUT(nom) = 3.3 V
28
0
20
40
60
80
100 120 140 160
VIN, INPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 21. Quiescent Current vs. Input Voltage
Figure 22. Quiescent Current vs. Junction
Temperature
1000
100
VIN = 13.5 V
VOUT(nom) = 3.3 V
800
IOUT = 100 mA
90
TJ = −40°C
80
70
TJ = 25°C
PSRR (dB)
IQ, QUIESCENT CURRENT (mA)
IQ, QUIESCENT CURRENT (mA)
TJ = 25°C
IOUT = 100 mA
VOUT(nom) = 3.3 V
600
TJ = 150°C
400
60
IOUT = 150 mA
50
40
30
200
20
0
10
0
0
25
50
75
100
125
150
VIN = 13.5 V ± 0.5 VPP
COUT = 2.2 mF
VOUT(nom) = 3.3 V
10
100
1K
10K
100K
IOUT, OUTPUT CURRENT (mA)
f, FREQUENCY (Hz)
Figure 23. Quiescent Current vs. Output
Current
Figure 24. PSRR vs. Frequency
3.6
500
3.432 V
VOUT
400
3.5
3.4
3.3
300
3.033 V
200
3.2
TJ = 25°C
VIN = 13.5 V
trise/fall = 1 ms
COUT = 2.2 mF
150 mA
3.1
3.0
2.9
2.8
100
0
−40
0.1 mA
0
40
80
IOUT
2.7
2.6
120 160 200 240 280 320 360
TIME (ms)
Figure 25. Load Transients
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9
VOUT, OUTPUT VOLTAGE (V)
IOUT, OUTPUT CURRENT (mA)
IQ, QUIESCENT CURRENT (mA)
150
1M
NCV8760C
CHARACTERISTICS CURVES − 3.3 V Option
3.40
3.391 V
3.35
50
VOUT
40
30
28 V
20
TJ = 25°C
IOUT = 5 mA
trise/fall = 1 ms
COUT = 2.2 mF
10 6 V
0
−400
400
3.252 V
3.30
3.25
3.20
VIN
1200
2000
2800
3.15
3.10
3600
TIME (ms)
Figure 26. Line Transients
100
Unstable Region
ESR (W)
10
Stable Region
1
0.1
0.01
VIN = 13.5 V
VOUT(nom) = 3.3 V
COUT = 1.0 mF − 100 mF
0
25
50
75
100
125
IOUT, OUTPUT CURRENT (mA)
Figure 27. Output Stability with Output
Capacitor ESR
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10
150
VOUT, OUTPUT VOLTAGE (V)
VIN, INPUT VOLTAGE (V)
60
NCV8760C
DETAILED OPERATING DESCRIPTION
General
emulate ESR. Low duty cycle pulse load current technique
has been used to maintain junction temperature close to
ambient temperature.
Larger values improve noise rejection and load regulation
transient response.
The NCV8760C is a 5 V and 3.3 V linear regulator
providing low drop−out voltage for 150 mA at low quiescent
current levels. Also featured in this part is a reset output with
selectable delay times. Delay times are selectable via part
selection and control through the Delay Time Select (DT)
pin. A ceramic or tantalum 0.1 mF capacitor is recommended
and should be connected to VIN to GND close to the
NCV8760C package. If extremely fast input voltage
transients are expected with slew rate in excess of 4 V/ms
then appropriate input filter must be used. Thermal
shutdown functionality protects the IC from damage caused
from excessively high temperatures appearing on the IC.
Current Limit
Current limit is provided on VOUT to protect the IC. The
minimum specification is 205 mA. Current limit is specified
under two conditions (VOUT = 96% x VOUT_NOM) and
(VOUT = 0 V). No fold−back circuitry exists. Any measured
differences can be attributed to change in die temperature.
The part may be operated up to 205 mA provided thermal die
temperature is considered and is kept below 150°C. A reset
(RO) will not occur with a load less than 205 mA.
Output Voltage
Output voltage stability is determined by the output
capacitor selection. The NCV8760C has been designed to
work with low ESR (equivalent series resistance) ceramic
capacitors. The NCV8760C is stable using any capacitor 1
mF and above with ESR below 5 W. Stable region of ESR in
Figure 16 shows ESR values at which the LDO output
voltage does not have any permanent oscillations at any
dynamic changes of output load current. Marginal ESR is
the value at which the output voltage waving is fully damped
during four periods after the load change and no oscillation
is further observable. ESR characteristics were measured
with ceramic capacitors and additional series resistors to
Reset Output
A reset signal is provided on the Reset Output (RO) pin to
provide feedback to the microprocessor of an out of
regulation condition. This is in the form of a logic signal on
RO. Output (VOUT) voltage conditions below the RESET
threshold cause RO to go low. The RO integrity is
maintained down to VOUT = 1.0 V.
The NCV8670C contains an internal 30 kW pull up
resistor. In case of RO function the external pull up resistor
is optional to use (Figure 1).
VIN
t
VOUT
t < tRR
VRT + VRH
VRT
VDT
tRD ~ DT = LOW
tRR
tRD ~ DT = LOW
DT
stable
DT
stable
tRD ~ DT = LOW
tRR
DT
stable
tRD ~ DT = HIGH
t
DT
stable
t
VRO
t
Thermal
Shutdown
Voltage Dip
at Input
Secondary
Spike
Overload
at Output
Figure 28. Reset Timing
www.onsemi.com
11
Overload
at Output
NCV8760C
During power−up (or restoring VOUT voltage from a reset
event), the VOUT voltage must be maintained above the
Reset threshold for the Reset Delay time before RO goes
high. The time for Reset Delay is determined by the choice
of IC and the state of the DT pin.
Note the DT pin is sampled within 24 ms period after VOUT
rises above VRT + VRH voltage. It is not recommended to
change DT logic level during “DT stable” time window.
Example of reset delay time selection is shown in Figure 28.
Reset Delay Time Select
When the die temperature exceeds the Thermal Shutdown
threshold, a Thermal Shutdown event is detected, VOUT is
turned off and RO goes low. The IC will remain in this state
until the die temperature decreases below the shutdown
threshold (175°C typical) minus the hysteresis factor (10°C
typical). Then the output turns on and RO goes high after the
RESET Delay time.
Thermal Shutdown
Selection of the NCV8760C device and the state of the DT
pin determines the available Reset Delay times. The part is
designed for use with DT tied to ground or VOUT, but may
be controlled by any logic signal which provides a threshold
between 0.8 V and 2 V. The default condition for an open DT
pin is the faster Reset time (DT = GND condition). Times are
in pairs and are highlighted in the table below. Consult
factory for availability.
Marking − 760yCxG
DT=GND
DT=OUT
y = Reset Time
Reset Time
Reset Time
1
8 ms
128 ms
2
8 ms
32 ms
3
16 ms
64 ms
4
32 ms
128 ms
Hints
VIN and GND printed circuit board traces should be as
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise or cause the regulator
to malfunction. Place external components, especially the
output capacitor, as close as possible to the device to
improve EMC performance.
The NCV8760C is not developed in compliance with
ISO26262 standard. If application is safety critical then the
below application example diagram shown in Figure 29 can
be used.
NOTE: The timing values can be selected from the
following list: 8, 16, 32, 64, 128 ms. Contact factory for
options not included in ORDERING INFORMATION table
on page 13.
VBAT
CIN
0.1 mF
VIN
VDD
VOUT
COUT
2.2 mF
NCV8760C
VCC
Voltage
Supervisor
RESET
GND
RO
DT
Microprocessor
(e.g. NCV30X, NCV809)
I/O
I/O
GND
Figure 29. NCV8760C Application Diagram
www.onsemi.com
12
RqJA, THERMAL RESISTANCE (°C/W)
NCV8760C
60
55
50
45
40
1 oz Cu
35
2 oz Cu
30
25
20
0
100
200
300
500
400
600
700
IOUT, COPPER HEAT SPREADER (mm2)
Figure 30. RqJA vs. PCB Copper Area (DPAK)
ORDERING INFORMATION
Device
NCV8760CDT501RKG
NCV8760CDT332RKG
NCV8760CDT333RKG
Output Voltage
5.0 V
3.3 V
Reset Delay Time,
DT to GND
Reset Delay Time,
DT to OUT
8 ms
Package
Shipping†
128 ms
DPAK
(Pb−Free)
2500 / Tape & Reel
8 ms
32 ms
16 ms
64 ms
DPAK
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specification Brochure, BRD8011/D.
www.onsemi.com
13
NCV8760C
PACKAGE DIMENSIONS
DPAK 5, CENTER LEAD CROP
DT SUFFIX
CASE 175AA
ISSUE B
−T−
C
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
PLANE
E
R
R1
Z
A
S
DIM
A
B
C
D
E
F
G
H
J
K
L
R
R1
S
U
V
Z
12 3 4 5
U
K
F
J
L
H
D
5 PL
G
0.13 (0.005)
M
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.020 0.028
0.018 0.023
0.024 0.032
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.045 BSC
0.170 0.190
0.185 0.210
0.025 0.040
0.020
−−−
0.035 0.050
0.155 0.170
MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.51
0.71
0.46
0.58
0.61
0.81
4.56 BSC
0.87
1.01
0.46
0.58
2.60
2.89
1.14 BSC
4.32
4.83
4.70
5.33
0.63
1.01
0.51
−−−
0.89
1.27
3.93
4.32
T
SOLDERING FOOTPRINT*
6.4
0.252
2.2
0.086
0.34 5.36
0.013 0.217
5.8
0.228
10.6
0.417
0.8
0.031
SCALE 4:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
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