NCV8800HDW75G

NCV8800 Series Synchronous Buck Regulator with 1.0 Amp Switch The NCV8800 is an automotive synchronous step--down buck regulator. This part provides an efficient step--down voltage compared to linear regulators. The NCV8800 uses very few external components allowing for maximum use of printed circuit board space. http://onsemi.com Features • These devices are available in Pb--free package(s). Specifications herein apply to both standard and Pb--free devices. Please see our website at www.onsemi.com for specific Pb--free orderable part numbers, or contact your local ON Semiconductor sales office or representative. Typical Applications • • • • Telecommunications Mobile Multimedia Instrumentation Automotive Entertainment Systems SO--16L DW SUFFIX CASE 751G 16 1 PIN CONNECTIONS AND MARKING DIAGRAM AUXILIARY ENABLE RESET GND GND DELAY FB1 FB2 1 NCV8800xy Output Voltage Options: 2.6 V, 3.3 V, 5.0 V, 7.5 V ±3.0% Output 3.5 V Operation AUXILIARY Hold Up Pin (for Cranking Conditions) On--Chip Switching Power Devices (0.4 Ω RDS(ON)) Constant Frequency Synchronous Operation On--Chip Charge Pump Control Circuitry Nonoverlap Logic Power Up Sequencing Control Option (2.6 V and 3.3 V Only) ENABLE Battery Voltage Capable Option Selectable Reset Delay Dual Pin Feedback Connection V2™ Control Topology Internally Fused Leads in SO--16L Package NCV Prefix for Automotive and Other Applications Requiring Site and Change Control AWLYYWW • • • • • • • • • • • • • • • • 16 VIN CP SWITCH GND GND VIN2 NC COMP x = Voltage Ratings as Indicated Below: 2 = 2.6 V 3 = 3.3 V 5 = 5.0 V 7 = 7.5 V y = ENABLE Option as Indicated Below: S = Sequenced H = High Voltage A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. © Semiconductor Components Industries, LLC, 2006 March, 2006 -- Rev. 11 1 Publication Order Number: NCV8800/D NCV8800 Series 100 90 EFFICIENCY (%) 80 70 VOUT = 7.5 V 60 VOUT = 5.0 V 50 VOUT = 3.3 V 40 VOUT = 2.6 V 30 20 VIN = 13.5 V L =100 mH 10 0 0 100 200 300 400 500 600 700 800 LOAD CURRENT (mA) Figure 1. Efficiency vs. Load Current http://onsemi.com 2 NCV8800 Series Auxiliary Supply (optional) External Regulator 0.01 μF MRA4004T3 5.1 k NCV8800 0.1 μF AUXILIARY ENABLE RESET GND GND DELAY FB1 FB2 VIN CP SWITCH GND GND VIN2 NC COMP 10 μF* VBAT 100 Ω 1.0 k 100 μH 0.01 μF 0.1 μF RESET 100 μF Figure 2. Application Diagram Figure 3. Typical Operation With An 8.0 Ω Load http://onsemi.com 3 VOUT *The supply capacitor must be located physically close to the IC pins. NCV8800 Series MAXIMUM RATINGS* Rating Value Unit Supply Voltages, VIN, VIN2 --0.3 to 45 V AUXILIARY --0.3 to 8.0 V ENABLE (Sequenced Option) --0.3 to 7.0 V ENABLE (High Voltage Option) --0.3 to 8.0 V RESET --0.3 to 30 V DELAY --0.3 to 7.0 V SWITCH (V5VSENSE = 0 V) --1.0 to 45 V Operating Junction Temperature --40 to 150 °C Storage Temperature Range --55 to 150 °C ESD -- Human Body Model (AUXILIARY, ENABLE, RESET, DELAY, FB1, FB2, CP, SWITCH, COMP) Human Body Model (VIN, VIN2) Machine Model (All Pins) 2.0 1.3 200 kV kV V Package Thermal Resistance, SO--16L Junction--to--Case, RθJC Junction--to--Ambient, RθJA 18 80 Lead Temperature Soldering: Reflow (SMD Style Only) (Note 1) 1. 60 second maximum above 183°C. 2. --5°C/+0°C allowable condition. *The maximum package power dissipation must be observed. http://onsemi.com 4 240 Peak (Note 2) °C/W °C NCV8800 Series ELECTRICAL CHARACTERISTICS (--40°C ≤ TJ ≤ 125°C; Sequenced ENABLE Option: 3.5 V ≤ VIN ≤ 16 V, 3.5 V ≤ VIN2 ≤ 16 V, AUXILIARY = 6.0 V, ENABLE = 5.0 V; High Voltage ENABLE Option: 6.0 V ≤ VIN ≤ 16 V, 6.0 V ≤ VIN2 ≤ 16 V; unless otherwise stated.) Test Conditions Min Typ Max Unit ENABLE = 0 V, VIN = 12.6 V, TJ = --40°C ENABLE = 0 V, VIN = 12.6 V, TJ = 25°C, 125°C ENABLE = 5.0 V, VIN = 13.5 V, IOUT = 0 -- -- 40 μA -- -- 30 μA -- -- 15 mA Switching Frequency -- 180 200 230 kHz Switching Duty Cycle -- 85 90 95 % 150 165 200 °C Characteristic General Quiescent Current (VIN2) Sleep Mode Operating Thermal Shutdown Note 3 Feedback Feedback Voltage Threshold, 2.6 V Option (VFB) -- 2.522 2.6 2.678 V Feedback Voltage Threshold, 3.3 V Option (VFB) -- 3.201 3.3 3.399 V Feedback Voltage Threshold, 5.0 V Option (VFB) -- 4.850 5.0 5.150 V Feedback Voltage Threshold, 7.5 V Option (VFB) -- 7.275 7.5 7.725 V 2.44 2.40 --- VFB VFB -- 0.04 V V 40 -- -- mV VFB + 0.04 VFB --- 2.80 2.76 V V 40 -- -- mV 3.10 3.04 --- VFB VFB -- 0.05 V V 50 -- -- mV VFB + 0.05 VFB --- 3.56 3.51 V V 50 -- -- mV 4.70 4.61 --- VFB VFB -- 0.075 V V 75 -- -- mV VFB + 0.075 VFB --- 5.39 5.31 V V 75 -- -- mV 7.05 6.92 --- VFB VFB -- 0.115 V V 115 -- -- mV VFB + 0.115 VFB --- 8.08 7.96 V V 115 -- -- mV RESET Undervoltage RESET Threshold, 2.6 V Option VOUT Increasing VOUT Decreasing Undervoltage RESET Hysteresis, 2.6 V Option Overvoltage RESET Threshold, 2.6 V Option -VOUT Increasing VOUT Decreasing Overvoltage RESET Hysteresis, 2.6 V Option Undervoltage RESET Threshold, 3.3 V Option -VOUT Increasing VOUT Decreasing Undervoltage RESET Hysteresis, 3.3 V Option Overvoltage RESET Threshold, 3.3 V Option -VOUT Increasing VOUT Decreasing Overvoltage RESET Hysteresis, 3.3 V Option Undervoltage RESET Threshold, 5.0 V Option -VOUT Increasing VOUT Decreasing Undervoltage RESET Hysteresis, 5.0 V Option Overvoltage RESET Threshold, 5.0 V Option -VOUT Increasing VOUT Decreasing Overvoltage RESET Hysteresis, 5.0 V Option Undervoltage RESET Threshold, 7.5 V Option -VOUT Increasing VOUT Decreasing Undervoltage RESET Hysteresis, 7.5 V Option Overvoltage RESET Threshold, 7.5 V Option -VOUT Increasing VOUT Decreasing Overvoltage RESET Hysteresis, 7.5 V Option -- 3. Guaranteed By Design. http://onsemi.com 5 NCV8800 Series ELECTRICAL CHARACTERISTICS (continued) (--40°C ≤ TJ ≤ 125°C; Sequenced ENABLE Option: 3.5 V ≤ VIN ≤ 16 V, 3.5 V ≤ VIN2 ≤ 16 V, AUXILIARY = 6.0 V, ENABLE = 5.0 V; High Voltage ENABLE Option: 6.0 V ≤ VIN ≤ 16 V, 6.0 V ≤ VIN2 ≤ 16 V; unless otherwise stated.) Test Conditions Characteristic Min Typ Max Unit RESET RESET Leakage Current RESET = 5.25 V -- -- 25 μA RESET Output Low Voltage IOUT = 1.6 mA -- -- 0.4 V RESET Delay DELAY Connected to FB1, FB2 DELAY = 0 V 28.70 14.35 32.60 16.30 36.66 18.33 ms ms 1.1 1.0 1.9 1.6 2.3 2.2 V V 100 250 550 mV ENABLE = 5.25 V, VIN2 = 13.5 V 50 100 200 kΩ DELAY = 5.15 V 4.0 10 16 μA --- 0.40 0.55 0.60 0.75 Ω Ω 1.0 1.6 2.5 A 2.58 V ≤ FB1 ≤ 2.62 V 2.58 V ≤ FB2 ≤ 2.62 V 3.275 V ≤ FB1 ≤ 3.325 V 3.275 V ≤ FB2 ≤ 3.325 V 4.962 V ≤ FB1 ≤ 5.038 V 4.962 V ≤ FB2 ≤ 5.038 V 7.442 V ≤ FB1 ≤ 7.558 V 7.442 V ≤ FB2 ≤ 7.558 V 0.55 -- 2.10 0.43 -- 1.65 1/m Ω 0.28 -- 1.09 0.19 -- 0.73 Note 4 1.0 -- -- MHz ENABLE ENABLE Threshold Increasing Decreasing ENABLE Hysteresis -- ENABLE Input Resistance DELAY DELAY Input Current SWITCH SWITCH ON Resistance ISWITCH = 0.5 A, TJ = --40°C, 25°C ISWITCH = 0.5 A, TJ = 125°C Current Limit -- Error Amplifier Error Amplifier Transconductance 2.6 V Option 3.3 V Option 5.0 V Option 7.5 V Option Error Amplifier Bandwidth Output Tracking (Sequencing) Feedback to ENABLE Tracking Voltage, 2.6 V Option -- 60 67 75 % Feedback to ENABLE Tracking Voltage, 3.3 V Option -- 80 85 90 % 4. Guaranteed By Design. http://onsemi.com 6 NCV8800 Series PACKAGE PIN DESCRIPTION PACKAGE LEAD # LEAD SYMBOL FUNCTION 1 AUXILIARY 2 ENABLE 3 RESET 4, 5, 12, 13 GND 6 DELAY 7 FB1 Voltage feedback to error amplifier. Shorted with FB2. 8 FB2 Voltage feedback to error amplifier. Shorted with FB1. 9 COMP 10 NC No connection. 11 VIN2 Supply input voltage for internal bias circuitry. 14 SWITCH 15 CP Node for charge pump bootstrap capacitor. 16 VIN Supply input voltage for output drivers. Alternate path for voltage input to the IC. Sense for powerup. This pin must be high before SWITCH turns on. CMOS compatible open drain output lead. RESET goes low whenever FB1 or FB2 is below the RESET low threshold, or above the RESET high threshold. Ground. RESET delay control. Time is doubled when pin moved to FB1 or FB2 from 0 V. Loop compensation node for error amplifier. (1.0 kΩ and 0.1 μF to ground). Drive for external inductor. http://onsemi.com 7 8 Figure 4. Block Diagram http://onsemi.com DELAY 0.1 mF 1k COMP FB2 FB1 ENABLE AUXILIARY 0.1 mF VIN2 100 Ω Bandgap Voltage Reference + -- Error Amp Power Up/Down Sequence and ENABLE BIAS -+ Over/Under Voltage RESET COMP 200 kHz OSC PWM COMP ART Ramp -- + UVLO OVLO Q S POR Timer Q LATCH R Current Limit Current Limit Thermal Shutdown Nonoverlap Logic and Drive UVLO OVLO CP Control 0.4 Ω 0.4 Ω RESET GND 5.1 k 33 μH VBAT MRA4004T3 0.01 μF SWITCH VIN CP 100 μF 2.6 V NCV8800 Series NCV8800 Series CIRCUIT DESCRIPTION ENABLE RESET The NCV8800 remains in sleep mode drawing less than 25 μA of quiescent current until the ENABLE pin is brought high powering up the device. There are two options available for the ENABLE feature. • Option 1 (Sequenced). The output voltage tracks the ENABLE pin with a maximum delta voltage between them (reference the Output Tracking specs in the Electrical Characteristics). This allows the device to be used with microprocessors requiring dual supply voltages. One voltage is typically needed to power the core of the microprocessor, and another high voltage is needed to power the microprocessor I/O. • Option 2 (High Voltage). This option removes the sequencing feature above, and allows the device to be controlled up to the battery voltage on the ENABLE pin with an external resistor (10 k). See Figure 5. The RESET is an open drain output which goes low when the feedback voltage on FB1 and FB2 goes below the undervoltage RESET threshold. The output also goes low when the voltage on FB1 and FB2 exceeds the overvoltage RESET threshold. The RESET output is an open drain output capable of sinking 1.6 mA. FB1 and FB2 FB1 and FB2 are the feedback pins to the error amplifier, which control the output SWITCH as needed to the regulated output. They are internally wire bonded to the same electrical connection providing double protection for an open circuit which would cause the buck regulator to rise above its desired output reaching the voltage on VIN. These pins also provide the feedback path for the RESET function. DELAY There are two options for the delay time for the RESET to go low. Connecting the pin to GND will provide a minimum of 14 ms. Connecting the pin to FB1 and FB2 will provide a minimum of 28 ms. Absolute max voltage on the DELAY pin is 7.0 V. Use a resistor divider to run off higher voltages. The 7.5 V option will require this divider (see Figure 6). 10 k VIN ENABLE VOUT VBAT DELAY (7.0 V max) Figure 5. Switched Battery Application AUXILIARY The AUXILIARY pin provides an alternate path for the IC to maintain operation. The AUXILIARY pin is diode OR’d with the VIN pin to the control circuitry (the DMOS output drivers are not included). If the voltage (VIN) from the battery dips as low as 3.5 V during a crank condition, the NCV8800 will maintain operation through a 6.0 V(min) connection on the AUXILIARY pin. Using this feature is optional. This pin should be grounded when not in use. Figure 6. COMP The COMP pin provides access to the error amplifiers output. Switching power supplies work as feedback control systems, and require compensation for stability. A 1.0 k resistor and 0.1 μF capacitor work well in the application in Figure 2. VIN Normal supply voltage input. An external diode must be provided to afford reverse battery protection. CP The on--chip DMOS drivers require the gates of the devices to be pulled above their drain voltage. An external capacitor located between the SWITCH output, and the CP pin provides the charge pump action to drive the gate of the high--side driver high enough to turn the device on. SWITCH DMOS output drivers with 0.75 Ω max push/pull capability. Non--overlap logic is provided to guarantee shoot through current is minimized. http://onsemi.com 9 NCV8800 Series APPLICATIONS INFORMATION + GATE(H) The V2 control method is illustrated in Figure 8. The output voltage is used to generate both the error signal and the ramp signal. Since the ramp signal is simply the output voltage, it is affected by any change in the output regardless of the origin of the change. The ramp signal also contains the DC portion of the output voltage, which allows the control circuit to drive the main switch to 0% or 100% duty cycle as required. A change in line voltage changes the current ramp in the inductor, affecting the ramp signal, which causes the V2 control scheme to compensate the duty cycle. Since the change in the inductor current modifies the ramp signal, as in current mode control, the V2 control scheme has the same advantages in line transient response. A change in load current will have an effect on the output voltage, altering the ramp signal. A load step immediately changes the state of the comparator output, which controls the main switch. Load transient response is determined only by the comparator response time and the transition speed of the main switch. The reaction time to an output load step has no relation to the crossover frequency of the error signal loop, as in traditional control methods. The error signal loop can have a low crossover frequency, since transient response is handled by the ramp signal loop. The main purpose of this “slow” feedback loop is to provide DC accuracy. Noise immunity is significantly improved, since the error amplifier bandwidth can be rolled off at a low frequency. Enhanced noise immunity improves remote sensing of the output voltage, since the noise associated with long feedback traces can be effectively filtered. Line and load regulations are drastically improved because there are two independent voltage loops. A voltage mode controller relies on a change in the error signal to compensate for a derivation in either line or load voltage. This change in the error signal causes the output voltage to change corresponding to the gain of the error amplifier, which is normally specified as line and load regulation. A current mode controller maintains fixed error signal under deviation in the line voltage, since the slope of the ramp signal changes, but still relies on a change in the error signal for a deviation in load. The V2 method of control maintains a fixed error signal for both line and load variations, since both line and load affect the ramp signal. − GATE(L) Constant Frequency Operation NCV8800 VOUT REX Power Up/Down Sequence and ENABLE 56 μA FB1 FB2 *The value of R1 is dependent on the output voltage option and is between 25 k and 200 k. R1* R2 21.4 k Switch Error Amp -+ 1.20 V Figure 7. Increasing the Output Voltage Adjustments to the output voltage can be made with an external resistor (REX). The increase in output voltage will typically be 56 μA × REX. Caution and consideration must be given to the tracking feature and temperature coefficient and matching of internal and external resistors. Output tracking always follows the Feedback pins (FB1 and FB2). The typical temperature coefficient for R1 and R2 is +4600 ppm/°C. THEORY OF OPERATION V2 Control Method The V2 method of control uses a ramp signal that is generated by the ESR of the output capacitors. This ramp is proportional to the AC current through the main inductor and is offset by the value of the DC output voltage. This control scheme inherently compensates for variations in either line or load conditions, since the ramp signal is generated from the output voltage itself. This control scheme differs from traditional techniques such as voltage mode, which generates an artificial ramp, and current mode, which generates a ramp from inductor current. PWM Comparator Ramp Signal Error Amplifier Output Voltage Feedback − + Error Signal COMP During normal operation, the oscillator generates a 200 kHz, 90% duty cycle waveform. The rising edge of this waveform determines the beginning of each switching cycle, at which point the high--side switch will be turned on. The high--side switch will be turned off when the ramp signal intersects the output of the error amplifier (COMP pin voltage). Therefore, the switch duty cycle can be modified to regulate the output voltage to the desired value as line and load conditions change. Reference Voltage Figure 8. V2 Control Block Diagram http://onsemi.com 10 NCV8800 Series The major advantage of constant frequency operation is that the component selections, especially the magnetic component design, become very easy. Oscillator frequency is fixed at 200 kHz. Thermal Resistance, Junction to Ambient, RθJA, (°C/W) 100 Start--Up After the NCV8800 is powered up, the error amplifier will begin linearly charging the COMP pin capacitor. The COMP capacitance and the source current of the error amplifier determine the slew rate of COMP voltage. The output of the error amplifier is connected internally to the inverting input of the PWM comparator and it is compared with the divided down output voltage FB1/FB2 at the non--inverting input of the PWM comparator. At the beginning of each switching cycle, the oscillator output will set the PWM latch. This causes the high--side switch to turn on and the regulator output voltage to ramp up. When the divided down output voltage achieves a level set by the COMP voltage, the high--side switch will be turned off. The V2 control loop will adjust the high--side switch duty cycle as required to ensure the regulator output voltage tracks the COMP voltage. Since the COMP voltage increases gradually, Soft Start can be achieved. 90 80 70 60 50 40 0.5 0 1.0 1.5 2.0 Copper Area (inch2) 2.5 3.0 Figure 9. 16 Lead SOW (4 Leads Fused), θJA as a Function of the Pad Copper Area (2 oz. Cu. Thickness), Board Material = 0.0625″ G--10/R--4 Heat Sinks A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RθJA: Overcurrent Protection The output switch is protected on both the high side and low side. Current limit is set at 1.0 A (min). RθJA = RθJC + RθCS + RθSA (3) where: RθJC = the junction--to--case thermal resistance, RθCS = the case--to--heatsink thermal resistance, and RθSA = the heatsink--to--ambient thermal resistance. RθJC appears in the package section of the data sheet. Like RθJA, it too is a function of package type. RθCS and RθSA are functions of the package type, heatsink and the interface between them. These values appear in heat sink data sheets of heat sink manufacturers. http://onsemi.com 11 NCV8800 Series ORDERING INFORMATION Device Output Voltage NCV8800SDW26 NCV8800SDW26R2 NCV8800HDW26 NCV8800HDW50R2 NCV8800HDW75 NCV8800HDW75R2 46 Units/Rail 1000 Tape & Reel 46 Units/Rail Sequenced SO--16L High Voltage NCV8800HDW33R2 NCV8800HDW50 1000 Tape & Reel High Voltage 3.3 V Shipping† 46 Units/Rail 2.6 V NCV8800SDW33 NCV8800HDW33 Package Sequenced NCV8800HDW26R2 NCV8800SDW33R2 ENABLE Option 1000 Tape & Reel 46 Units/Rail 1000 Tape & Reel 46 Units/Rail 5.0 V High Voltage 7.5 V 1000 Tape & Reel 46 Units/Rail 1000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. V2 is a trademark of Switch Power, Inc. http://onsemi.com 12 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−16 WB CASE 751G ISSUE E 1 SCALE 1:1 DATE 08 OCT 2021 GENERIC MARKING DIAGRAM* 16 XXXXXXXXXXX XXXXXXXXXXX AWLYYWWG 1 XXXXX A WL YY WW G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98ASB42567B SOIC−16 WB Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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