NDC7002N

DATA SHEET www.onsemi.com Field Effect Transistor Dual, N-Channel, Enhancement Mode D1 MARKING DIAGRAM These dual N−Channel enhancement mode power field effect transistors are produced using onsemi’s proprietary, high cell density, DMOS technology. This very high density process has been designed to minimize on−state resistance, provide rugged and reliable performance and fast switching. These devices is particularly suited for low voltage applications requiring a low current high side switch. XXX MG G 1 XXX = Specific Device Code M = Date Code G = Pb−Free Package Features • 0.51 A, 50 V, RDS(ON) = 2 W @ VGS = 10 V • High Density Cell Design for Low RDS(ON) • Proprietary SUPERSOTt−6 Package Design Using Copper Lead (Note: Microdot may be in either location) PINOUT Frame for Superior Thermal and Electrical Capabilities High Saturation Current This is a Pb−Free Device ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Parameter Ratings Unit VDS Drain−Source Voltage 50 V VGSS Gate−Source Voltage 20 V ID Drain Current − Continuous (Note 1a) − Pulsed 0.51 1.5 PD Power Dissipation (Note 1a) (Note 1b) (Note 1c) 0.96 0.9 0.7 TJ, TSTG G2 TSOT23 6−Lead CASE 419BL General Description Symbol D2 S2 G1 NDC7002N • • S1 Operating and Storage Temperature Range A W −55 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 4 3 5 2 6 1 SOT−6 (SUPERSOTt−6) ORDERING INFORMATION Device Package Shipping† NDC7002N TSOT−23−6 (Pb−free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. THERMAL CHARACTERISTICS Symbol Parameter Ratings Unit °C/W RθJC Thermal Resistance, Junction to Case (Note 1) 60 RθJA Thermal Resistance, Junction to Ambient (Note 1a) 130 © Semiconductor Components Industries, LLC, 1997 December, 2021 − Rev. 2 1 Publication Order Number: NDC7002N/D NDC7002N ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Parameter Symbol Test Conditions Min Typ Max Unit OFF CHARACTERISTICS BVDSS Drain−Source Breakdown Voltage ID = 250 mA, VGS = 0 V IDSS Zero Gate Voltage Drain Current VDS = 40 V, VGS = 0 V IGSSF Gate−Body Leakage, Forward IGSSR Gate−Body Leakage, Reverse 50 V 1 500 mA VGS = 20 V, VDS = 0 V 100 nA VGS = −20 V, VDS = 0 V −100 nA 1.9 1.5 2.5 2.2 V 1 1.7 2 3.5 W 1.6 4 TJ = 125°C ON CHARACTERISTICS (Note 2) VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250 mA RDS(ON) Static Drain−Source On−Resistance VGS = 10 V, ID = 0.51 A TJ = 125°C 1 0.8 TJ = 125°C VGS = 4.5 V, ID = 0.35 A ID(on) gFS On−State Drain Current VGS = 10 V, VDS = 10 V 1.5 A Forward Transconductance VDS = 10 V, ID = 0.51 A 400 mS VDS = 25 V, VGS = 0 V, f = 1.0 MHz DYNAMIC CHARACTERISTICS Ciss Input Capacitance 20 pF Coss Output Capacitance 13 pF Crss Reverse Transfer Capacitance 5 pF SWITCHING CHARACTERISTICS (Note 2) td(on) tr VDD = 25 V, ID = 0.25 A, VGS = 10 V, RGEN = 25 W Turn−On Delay Time 20 6 20 Turn−Off Delay Time 11 20 tf Turn−Off Fall Time 5 20 td(off) Turn−On Time 6 VDS = 25 V, ID = 0.51 A, VGS = 10 V ns Qg Total Gate Charge 1 nC Qgs Gate−Source Charge 0.19 nC Qgd Gate to Drain Charge 0.33 nC DRAIN−SOURCE DIODE CHARACTERISTICS IS Maximum Continuous Source Current ISM Maximum Pulse Source Current (Note 2) VSD Drain−Source Diode Forward Voltage VGS = 0 V, IS = 0.51 A (Note 2) 0.8 0.51 A 1.5 A 1.2 V 1. RθJA is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user’s board design. TJ * TA TJ * TA + + I 2D(t) R DS(ON)@T J P D(t) + R qJA(t) R qJC ) R qCA(t) Typical RqJA for single device operation using the board layouts shown below on 4.5″ x 5″ FR−4 PCB in a still air environment: a. 130°C/W when mounted on a 0.125 in2 pad of 2oz copper. b. 140°C/W when mounted on a 0.005 in2 pad of 2oz copper. c. 180°C/W when mounted on a 0.0015 in2 pad of 2oz copper. 1a 1b 1c Scale 1:1 on letter size paper 2. Pulse Test: Pulse Width ≤ 300 ms, Duty cycle ≤ 2.0 %. www.onsemi.com 2 NDC7002N TYPICAL ELECTRICAL CHARACTERISTICS VGS = 10 V 8.07.0 1.2 6.0 5.5 5.0 0.9 4.5 0.6 4.0 3.5 0.3 3.0 0 0 1 2 3 4 3 RDS(on), Normalized Drain−Source On−Resistance ID, Drain−Source Current (A) 1.5 VGS = 3.5 V 4.0 2.5 5.0 2 5.5 6.0 1.5 7.0 8.0 10 1 0.5 5 0 0.3 RDS(on), Normalized Drain−Source On−Resistance RDS(on), Normalized Drain−Source On−Resistance ID = 0.51 A VGS = 10 V 1.6 1.4 1.2 1 0.8 0.6 0.4 −50 −25 0 25 50 75 100 125 150 2.5 2 TJ = 125°C 1.5 25°C 1 -55°C 0.5 0 0.3 Vth, Normalized Gate−Source Threshold Voltage ID, Drain Current (A) 25°C 125°C 0.9 0.6 0.3 2 0.9 1.2 1.2 1 0.6 3 4 5 6 1.2 1.5 Figure 4. On−Resistance vs Variation with Drain Current and Temperature 1.5 TJ = −55°C 1.5 ID, Drain Current (A) Figure 3. On−Resistance Variation with Temperature VDS = 10 V 1.2 VGS = 10 V TJ, Junction Temperature (°C) 0 0.9 Figure 2. On−Resistance Variation with Gate Voltage and Current Figure 1. On−Region Characteristics 2 0.6 ID, Drain Current (A) VDS, Drain−Source Voltage (V) 1.8 4.5 7 1.1 1 0.9 0.8 0.7 −50 8 VDS = VGS ID = 250 mA VGS, Gate to Source Voltage (V) −25 0 25 50 75 100 125 150 TJ, Junction Temperature (°C) Figure 6. Gate Threshold Variation with Temperature Figure 5. Transfer Characteristics www.onsemi.com 3 NDC7002N 1.16 ID = 250 mA 1.12 IS, Reverse Drain Current (A) BVDSS, Normalized Drain−Source Breakdown Voltage TYPICAL ELECTRICAL CHARACTERISTICS (continued) 1.08 1.04 1 0.96 0.92 0.88 −50 −25 0 25 50 75 100 125 1.5 1 VGS = 0 V 0.5 TJ = 125°C TJ, Junction Temperature (°C) VGS, Gate−Source Voltage (V) Capacitance (pF) 50 Ciss Coss 10 Crss 5 f = 1 MHz VGS = 0 V 0.2 0.5 1 2 5 10 20 8 ID, Drain Current (A) VDS = 10 V 2 0 50 0 125°C 0.2 0.1 0 0.3 0.6 0.9 1.2 0.4 0.6 0.8 1 Figure 10. Gate Charge Characteristics 0.4 0 0.2 Qg, Gate Charge (nC) 25°C 0.3 1.2 4 TJ = −55°C 0.5 1 6 Figure 9. Capacitance Characteristics 0.6 0.8 VDS = 25 V ID = 0.51 A VDS, Drain to Source Voltage (V) 0.7 0.6 VSD, Body Diode Forward Voltage (V) 10 1 0.1 0.4 Figure 8. Body Diode Forward Voltage Variation with Current and Temperature 100 2 -55°C 0.01 0.001 0.2 150 Figure 7. Breakdown Voltage Variation with Temperature 20 25°C 0.1 1.5 VGS, Gate to Source Voltage (V) Figure 11. Transconductance Variation with Drain Current and Temperature www.onsemi.com 4 1.2 NDC7002N TYPICAL THERMAL CHARACTERISTICS ID, Steady−State Drain Current (A) Steady−State Power Dissipation (W) 1.2 1.1 1a 1 0.9 1b 0.8 1c 4.5″ x 5″ FR−4 Board TA = 25°C Still Air 0.7 0.6 0 0.2 0.4 0.6 0.8 1 0.55 1a 0.5 1b 0.45 1c 4.5″ x 5″ FR−4 Board TA = 25°C’ Still Air VGS = 10 V 0.4 0.35 0 2oz Copper Mounting Pad Area (in2) 0.025 0.05 0.075 0.1 0.125 2oz Copper Mounting Pad Area (in2) Figure 12. SOT−6 Dual Package Maximum Steady−State Power Dissipation versus Copper Mounting Pad Area Figure 13. Maximum Steady−State Drain Current versus Copper Mounting Pad Area ID, Drain Current (A) 3 2 1 0.5 0.2 0.1 VGS = 10 V Single Pulse RqJA = See Note 1c TA = 25°C 0.05 0.02 0.01 1 2 5 10 20 50 70 VDS, Drain−Source Voltage (V) r(t), Normalized Effective Transient Thermal Resistance Figure 14. Maximum Safe Operating Area 1 0.5 0.2 0.1 0.05 0.02 0.01 0.0001 D = 0.5 RqJA(t) = r(t) * RqJA RqJA = See Note 1c 0.2 0.1 P(pk) 0.05 0.02 0.01 Single Pulse 0.001 t1 t2 TJ − TA = P * RqJA(t) Duty Cycle, D = t1/t2 0.01 0.1 1 10 100 300 t1, Time (sec) Figure 15. Transient Thermal Response Curve (Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design.) SUPERSOT is a trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. www.onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSOT23 6−Lead CASE 419BL ISSUE A 1 SCALE 2:1 DATE 31 AUG 2020 GENERIC MARKING DIAGRAM* XXX MG G 1 XXX = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98AON83292G TSOT23 6−Lead Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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