NDD03N50Z N-Channel Power MOSFET 500 V, 3.3 W
Features
• • • •
Low ON Resistance Low Gate Charge 100% Avalanche Tested These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant
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VDSS 500 V RDS(on) (MAX) @ 1.15 A 3.3 W
ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating Drain−to−Source Voltage Continuous Drain Current RqJC Continuous Drain Current RqJC, TA = 100°C Pulsed Drain Current, VGS @ 10 V Power Dissipation RqJC Gate−to−Source Voltage Single Pulse Avalanche Energy, ID = 2.6 A ESD (HBM) (JESD22−A114) Peak Diode Recovery Continuous Source Current (Body Diode) Maximum Temperature for Soldering Leads Operating Junction and Storage Temperature Range Symbol VDSS ID ID IDM PD VGS EAS Vesd dv/dt IS TL TJ, Tstg Value 500 2.6 1.7 10 58 ±30 120 2000 4.5 (Note 1) 2.6 260 − 55 to 150 Unit V A A A W V mJ V V/ns A °C °C 4 N−Channel D (2)
G (1)
S (3)
4 1 12
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. ID v 2.6 A, di/dt ≤ 200 A/ms, VDD ≤ BVDSS, TJ ≤ 150°C.
3 IPAK CASE 369D STYLE 2
2
3
DPAK CASE 369AA STYLE 2
MARKING AND ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2010
July, 2010 − Rev. 0
1
Publication Order Number: NDD03N50Z/D
NDD03N50Z
THERMAL RESISTANCE
Parameter Junction−to−Case (Drain) Junction−to−Ambient Steady State NDD03N50Z (Note 3) NDD03N50Z (Note 2) NDD03N50Z−1 Symbol RqJC RqJA Value 2.2 41 80 Unit °C/W
2. Insertion mounted 3. Surface mounted on FR4 board using 1″ sq. pad size, (Cu area = 1.127 in sq [2 oz] including traces).
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain−to−Source Leakage Current BVDSS DBVDSS/ DTJ IDSS IGSS RDS(on) VGS(th) gFS Ciss Coss Crss Qg Qgs Qgd VGP Rg td(on) tr td(off) tf VDD = 250 V, ID = 2.6 A, VGS = 10 V, RG = 5 W VDD = 250 V, ID = 2.6 A, VGS = 10 V VGS = 0 V, ID = 1 mA Reference to 25°C, ID = 1 mA VDS = 500 V, VGS = 0 V VGS = ±20 V VGS = 10 V, ID = 1.15 A VDS = VGS, ID = 50 mA VDS = 15 V, ID = 1.15 A 3.0 1.8 274 VDS = 25 V, VGS = 0 V, f = 1.0 MHz 38 8 10 2.3 5.5 6.4 4.5 9 7 15 7 V W ns nC 2.8 25°C 150°C 500 0.6 1 50 ±10 3.3 4.5 mA W V S pF V V/°C mA Symbol Test Conditions Min Typ Max Unit
Gate−to−Source Forward Leakage ON CHARACTERISTICS (Note 4) Static Drain−to−Source On−Resistance Gate Threshold Voltage Forward Transconductance DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate−to−Source Charge Gate−to−Drain (“Miller”) Charge Plateau Voltage Gate Resistance Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time
RESISTIVE SWITCHING CHARACTERISTICS
SOURCE−DRAIN DIODE CHARACTERISTICS (TC = 25°C unless otherwise noted) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge 4. Pulse Width ≤ 380 ms, Duty Cycle ≤ 2%. VSD trr Qrr IS = 2.6 A, VGS = 0 V VGS = 0 V, VDD = 30 V IS = 2.6 A, di/dt = 100 A/ms 240 0.7 1.6 V ns mC
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NDD03N50Z
4.0 3.5 ID, DRAIN CURRENT (A) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 5.5 V 5.0 V 5 10 15 20 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 25 6.0 V VGS = 10 V 7.0 V ID, DRAIN CURRENT (A) 6.5 V 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 3 TJ = 150°C TJ = −55°C 10 TJ = 25°C VDS = 25 V
Figure 1. On−Region Characteristics
4 5 6 7 8 9 VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
5.00 4.75 4.50 4.25 4.00 3.75 3.50 3.25 3.00 2.75 2.50 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5
3.5 3.4 3.3 3.2 3.1 3.0 2.9 2.8 2.7 2.6 2.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 VGS = 10 V TJ = 25°C
ID = 1.15 A TJ = 25°C
9.0
9.5
10.0
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On−Region versus Gate−to−Source Voltage
BVDSS, NORMALIZED BREAKDOWN VOLTAGE (V)
Figure 4. On−Resistance versus Drain Current and Gate Voltage
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 −50 −25 0 25 50 75 100 125 ID = 1.15 A VGS = 10 V
1.15 ID = 1 mA 1.10 1.05 1.00 0.95 0.90 −50
150
−25
0
25
50
75
100
125
150
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with Temperature
Figure 6. BVDSS Variation with Temperature
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NDD03N50Z
10 600 550 C, CAPACITANCE (pF) 500 450 400 350 300 250 200 150 100 50 0 0.01 0.1 1 10 100 Crss Coss TJ = 25°C VGS = 0 V f = 1 MHz
Ciss
IDSS, LEAKAGE (mA)
TJ = 150°C 1
TJ = 125°C 0.1 0 50 100 150 200 250 300 350 400 450 500
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Drain−to−Source Leakage Current versus Voltage
Figure 8. Capacitance Variation
QT 10 8 6 4 2 0 0 VDS = 250 V ID = 2.6 A TJ = 25°C 1 2 3 4 5 6 7 8 9 10 QGD VDS QGS VGS 250 200 150 100 50 0 11
Qg, TOTAL GATE CHARGE (nC)
Figure 9. Gate−to−Source Voltage and Drain−to−Source Voltage versus Total Charge
1000
100 t, TIME (ns) td(off) tr tf td(on)
IS, SOURCE CURRENT (A)
VDD = 250 V ID = 2.6 A VGS = 10 V
10.0
1.0
TJ = 150°C
10
125°C 25°C −55°C 0.1 0.3
1
1
10 RG, GATE RESISTANCE (W)
100
0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 VSD, SOURCE−TO−DRAIN VOLTAGE (V)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VGS, GATE−TO−SOURCE VOLTAGE (V)
12
300
1.2
Figure 10. Resistive Switching Time Variation versus Gate Resistance
Figure 11. Diode Forward Voltage versus Current
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NDD03N50Z
100 VGS v 30 V SINGLE PULSE TC = 25°C
ID, DRAIN CURRENT (A)
10
100 ms 10 ms 1 ms 10 ms dc
1
0.1
0.01 0.1 1
RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 10 100 1000
Figure 12. Maximum Rated Forward Biased Safe Operating Area NDD03N50Z
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
10
1 R(t) (C/W)
50% (DUTY CYCLE) 20% 10% 5% 2% 1% SINGLE PULSE RqJC = 2.2°C/W Steady State 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 1E+02 1E+03
0.1
0.01 1E−06
1E−05
PULSE TIME (s)
Figure 13. Thermal Impedance (Junction−to−Case) for NDD03N50Z
100
R(t) (C/W)
10 50% (DUTY CYCLE) 20% 10% 5.0% 1 2.0% 1.0% 0.1 RqJA = 41°C/W Steady State 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 1E+02 1E+03
0.01 1E−06
SINGLE PULSE 1E−05
PULSE TIME (s)
Figure 14. Thermal Impedance (Junction−to−Ambient) for NDD03N50Z
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NDD03N50Z
ORDERING INFORMATION
Order Number NDD03N50Z−1G NDD03N50ZT4G Package IPAK (Pb−Free) DPAK (Pb−Free) Shipping† 75 Units / Rail 2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
MARKING DIAGRAMS
4 Drain YWW 3N 50ZG
4 Drain YWW 3N 50ZG 2 1 Drain 3 Gate Source = Location Code = Year = Work Week = Pb−Free Package
1 23 Gate Drain Source
A Y WW G
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NDD03N50Z
PACKAGE DIMENSIONS
DPAK (SINGLE GUAGE) CASE 369AA−01 ISSUE B
C A B c2
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−−
E b3 L3
1 4
A
D
2 3
Z
DETAIL A
H
L4
b2 e
b 0.005 (0.13)
M
c C L2
GAUGE PLANE
H C L L1 DETAIL A
SEATING PLANE
A1
ROTATED 90 CW 5
SOLDERING FOOTPRINT*
6.20 0.244 3.00 0.118
STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN
2.58 0.102
5.80 0.228
1.60 0.063
6.17 0.243
SCALE 3:1
mm inches
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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NDD03N50Z
PACKAGE DIMENSIONS
IPAK CASE 369D−01 ISSUE B
B V R
4
C E Z
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 −−−
S −T−
SEATING PLANE
A
1 2 3
K
F D G
3 PL
J
H
M
0.13 (0.005)
T
STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN
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NDD03N50Z/D