NDD05N50ZT4G

NDF05N50Z, NDP05N50Z, NDD05N50Z N-Channel Power MOSFET 500 V, 1.25 W Features • • • • Low ON Resistance Low Gate Charge 100% Avalanche Tested These Devices are Pb−Free and are RoHS Compliant http://onsemi.com VDSS 500 V RDS(on) (TYP) @ 2.2 A 1.25 W ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Drain−to−Source Voltage Continuous Drain Current RqJC Continuous Drain Current RqJC, TA = 100°C Pulsed Drain Current, VGS @ 10 V Power Dissipation RqJC Gate−to−Source Voltage Single Pulse Avalanche Energy, ID = 5.0 A ESD (HBM) (JESD22−A114) RMS Isolation Voltage (t = 0.3 sec., R.H. ≤ 30%, TA = 25°C) (Figure 15) Peak Diode Recovery Continuous Source Current (Body Diode) Maximum Temperature for Soldering Leads, 0.063″ (1.6 mm) from Case for 10 s Package Body for 10 s Operating Junction and Storage Temperature Range Symbol VDSS ID ID IDM PD VGS EAS Vesd VISO 4500 5 (Note 1) 3.2 (Note 1) 20 (Note 1) 28 NDF NDP 500 5 3.2 20 96 ±30 130 3000 4.7 3 19 83 NDD Unit V A A G (1) A W V mJ V V 4 4 12 1 1 3 2 2 3 3 3 DPAK TO−220FP TO−220AB IPAK CASE 221D CASE 221A CASE 369D CASE 369AA STYLE 2 STYLE 1 STYLE 5 STYLE 2 1 2 N−Channel D (2) S (3) dv/dt IS TL TPKG 4.5 (Note 2) 5 300 260 V/ns A °C TJ, Tstg − 55 to 150 °C MARKING AND ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Limited by maximum junction temperature 2. IS = 4.4 A, di/dt ≤ 100 A/ms, VDD ≤ BVDSS, TJ = +150°C © Semiconductor Components Industries, LLC, 2009 December, 2009 − Rev. 0 1 Publication Order Number: NDF05N50Z/D NDF05N50Z, NDP05N50Z, NDD05N50Z THERMAL RESISTANCE Parameter Junction−to−Case (Drain) NDP05N50Z NDF05N50Z NDD05N50Z (Note 3) NDP05N50Z (Note 3) NDF05N50Z (Note 4) NDD05N50Z (Note 3) NDD05N50Z−1 Symbol RqJC Value 1.3 4.4 1.5 50 50 38 80 Unit °C/W Junction−to−Ambient Steady State RqJA 3. Insertion mounted 4. Surface mounted on FR4 board using 1″ sq. pad size, (Cu area = 1.127 in sq [2 oz] including traces). ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain−to−Source Leakage Current BVDSS DBVDSS/ DTJ IDSS IGSS RDS(on) VGS(th) gFS Ciss Coss Crss Qg Qgs Qgd VGP Rg td(on) tr td(off) tf VDD = 250 V, ID = 5 A, VGS = 10 V, RG = 5 W VDD = 250 V, ID = 5 A, VGS = 10 V VGS = 0 V, ID = 1 mA Reference to 25°C, ID = 1 mA VDS = 500 V, VGS = 0 V VGS = ±20 V VGS = 10 V, ID = 2.2 A VDS = VGS, ID = 50 mA VDS = 15 V, ID = 2.5 A 3.0 3.5 530 VDS = 25 V, VGS = 0 V, f = 1.0 MHz 68 15 18.5 4 10 6.5 4.5 11 15 24 14 V W ns nC 1.25 25°C 150°C 500 0.6 1 50 ±10 1.5 4.5 mA W V S pF V V/°C mA Symbol Test Conditions Min Typ Max Unit Gate−to−Source Forward Leakage ON CHARACTERISTICS (Note 5) Static Drain−to−Source On−Resistance Gate Threshold Voltage Forward Transconductance DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate−to−Source Charge Gate−to−Drain (“Miller”) Charge Plateau Voltage Gate Resistance Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time RESISTIVE SWITCHING CHARACTERISTICS SOURCE−DRAIN DIODE CHARACTERISTICS (TC = 25°C unless otherwise noted) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge 5. Pulse Width ≤ 380 ms, Duty Cycle ≤ 2%. VSD trr Qrr IS = 5 A, VGS = 0 V VGS = 0 V, VDD = 30 V IS = 5 A, di/dt = 100 A/ms 255 1.25 1.6 V ns mC http://onsemi.com 2 NDF05N50Z, NDP05N50Z, NDD05N50Z TYPICAL CHARACTERISTICS 10.0 9.0 ID, DRAIN CURRENT (A) 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 0 5.5 V 5.0 V 5 10 15 20 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 25 6.0 V VGS = 8 V to 10 V 7.0 V 6.5 V 10.0 9.0 ID, DRAIN CURRENT (A) 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 3 4 5 6 7 8 9 VGS, GATE−TO−SOURCE VOLTAGE (V) 10 TJ = 150°C TJ = −55°C TJ = 25°C VDS = 25 V Figure 1. On−Region Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 2.50 2.25 2.00 1.75 1.50 1.25 1.00 5.0 ID = 2.2 A TJ = 25°C 2.500 2.250 2.000 1.750 1.500 1.250 1.000 0.0 VGS = 10 V TJ = 25°C 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Figure 3. On−Region versus Gate−to−Source Voltage VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 4. On−Resistance versus Drain Current and Gate Voltage ID, DRAIN CURRENT (A) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 2.75 2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 ID = 2.2 A VGS = 10 V IDSS, LEAKAGE (mA) 10.0 TJ = 150°C 1.0 0.1 0 50 100 150 200 250 300 350 400 450 500 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current versus Voltage http://onsemi.com 3 NDF05N50Z, NDP05N50Z, NDD05N50Z TYPICAL CHARACTERISTICS VGS, GATE−TO−SOURCE VOLTAGE (V) 1100 1000 C, CAPACITANCE (pF) 900 800 700 600 500 400 300 200 100 0 0 Crss 5 Ciss TJ = 25°C VGS = 0 V f = 1 MHz QT VDS VGS QGS QGD 250 200 150 100 VDS = 250 V ID = 5 A TJ = 25°C 0 2 4 6 8 10 12 14 16 Qg, TOTAL GATE CHARGE (nC) 18 50 0 20 Coss 10 15 20 25 30 35 40 45 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 50 Figure 7. Capacitance Variation Figure 8. Gate−to−Source Voltage and Drain−to−Source Voltage versus Total Charge 100 IS, SOURCE CURRENT (A) 1000 VDD = 250 V ID = 5 A VGS = 10 V td(off) tr tf td(on) t, TIME (ns) 100 10 TJ = 150°C 1.0 125°C 0.1 25°C −55°C 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 VSD, SOURCE−TO−DRAIN VOLTAGE (V) 1.2 10 1.0 1 10 RG, GATE RESISTANCE (W) 100 Figure 9. Resistive Switching Time Variation versus Gate Resistance 100 VGS v 30 V SINGLE PULSE TC = 25°C 100 ms 1 ms 10 ms dc Figure 10. Diode Forward Voltage versus Current 10 ms ID, DRAIN CURRENT (A) 10 1 0.1 0.01 0.1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 1 10 100 1000 Figure 11. Maximum Rated Forward Biased Safe Operating Area NDD05N50Z VDS, DRAIN−TO−SOURCE VOLTAGE (V) http://onsemi.com 4 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1200 15.0 14.0 13.0 12.0 11.0 10.0 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 300 NDF05N50Z, NDP05N50Z, NDD05N50Z TYPICAL CHARACTERISTICS 10 50% (DUTY CYCLE) R(t) (C/W) 1 20% 10% 5.0% 2.0% 1.0% SINGLE PULSE 0.1 RqJC = 4.4°C/W Steady State 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 1E+02 1E+03 0.01 1E−06 1E−05 PULSE TIME (s) Figure 12. Thermal Impedance (Junction−to−Case) for NDF05N50Z 10 1 50% (DUTY CYCLE) R(t) (C/W) 20% 10% 0.1 5.0% 2.0% 1.0% 0.01 1E−06 SINGLE PULSE 1E−05 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 RqJC = 1.5°C/W Steady State 1E+02 1E+03 PULSE TIME (s) Figure 13. Thermal Impedance (Junction−to−Case) for NDD05N50Z 100 R(t) (C/W) 10 50% (DUTY CYCLE) 20% 10% 5.0% 1 2.0% 1.0% 0.1 RqJA = 38°C/W Steady State 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 1E+02 1E+03 0.01 1E−06 SINGLE PULSE 1E−05 PULSE TIME (s) Figure 14. Thermal Impedance (Junction−to−Ambient) for NDD05N50Z http://onsemi.com 5 NDF05N50Z, NDP05N50Z, NDD05N50Z LEADS HEATSINK 0.110″ MIN Figure 15. Mounting Position for Isolation Test Measurement made between leads and heatsink with all leads shorted together. ORDERING INFORMATION Order Number NDF05N50ZG NDP05N50ZG NDD05N50Z−1G NDD05N50ZT4G Package TO−220FP (Pb−Free) TO−220AB (Pb−Free) IPAK (Pb−Free) DPAK (Pb−Free) Shipping† 50 Units / Rail (In Development) 50 Units / Rail (In Development) 75 Units / Rail 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MARKING DIAGRAMS 4 Drain NDF05N50ZG or NDP05N50ZG AYWW Gate Source 1 23 Gate Drain Source Drain A Y WW G = Location Code = Year = Work Week = Pb−Free Package YWW 5N 50ZG 4 Drain YWW 5N 50ZG 2 1 Drain 3 Gate Source http://onsemi.com 6 NDF05N50Z, NDP05N50Z, NDD05N50Z PACKAGE DIMENSIONS TO−220 FULLPAK CASE 221D−03 ISSUE K −T− F Q A 123 SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH 3. 221D-01 THRU 221D-02 OBSOLETE, NEW STANDARD 221D-03. INCHES MIN MAX 0.617 0.635 0.392 0.419 0.177 0.193 0.024 0.039 0.116 0.129 0.100 BSC 0.118 0.135 0.018 0.025 0.503 0.541 0.048 0.058 0.200 BSC 0.122 0.138 0.099 0.117 0.092 0.113 0.239 0.271 MILLIMETERS MIN MAX 15.67 16.12 9.96 10.63 4.50 4.90 0.60 1.00 2.95 3.28 2.54 BSC 3.00 3.43 0.45 0.63 12.78 13.73 1.23 1.47 5.08 BSC 3.10 3.50 2.51 2.96 2.34 2.87 6.06 6.88 −B− U C S H K −Y− G N L D 3 PL M J R DIM A B C D F G H J K L N Q R S U 0.25 (0.010) B M Y STYLE 1: PIN 1. GATE 2. DRAIN 3. SOURCE TO−220 CASE 221A−09 ISSUE AF −T− B 4 SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.161 0.095 0.105 0.110 0.155 0.014 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 GATE DRAIN SOURCE DRAIN MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 4.09 2.42 2.66 2.80 3.93 0.36 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 F T C S Q 123 A U K H Z L V G D N R J STYLE 5: PIN 1. 2. 3. 4. http://onsemi.com 7 NDF05N50Z, NDP05N50Z, NDD05N50Z PACKAGE DIMENSIONS DPAK CASE 369AA−01 ISSUE A −T− B V R 4 SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.025 0.035 0.018 0.024 0.030 0.045 0.386 0.410 0.018 0.023 0.090 BSC 0.180 0.215 0.024 0.040 0.020 −−− 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.63 0.89 0.46 0.61 0.77 1.14 9.80 10.40 0.46 0.58 2.29 BSC 4.57 5.45 0.60 1.01 0.51 −−− 0.89 1.27 3.93 −−− C E S A 1 2 3 Z H U F L D 2 PL J DIM A B C D E F H J L R S U V Z SOLDERING FOOTPRINT* M 0.13 (0.005) T 6.20 0.244 2.58 0.101 3.0 0.118 STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN 5.80 0.228 1.6 0.063 6.172 0.243 SCALE 3:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. IPAK CASE 369D−01 ISSUE B B V R 4 C E Z NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 −−− S −T− SEATING PLANE A 1 2 3 K F D G 3 PL J H M 0.13 (0.005) T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN http://onsemi.com 8 NDF05N50Z, NDP05N50Z, NDD05N50Z ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 9 NDF05N50Z/D