NDF03N60ZG

NDF03N60Z, NDP03N60Z, NDD03N60Z N-Channel Power MOSFET 600 V, 3.3 W Features • • • • Low ON Resistance Low Gate Charge 100% Avalanche Tested These Devices are Pb−Free and are RoHS Compliant http://onsemi.com VDSS 600 V RDS(on) (TYP) @ 1.2 A 3.3 W ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Drain−to−Source Voltage Continuous Drain Current RqJC Continuous Drain Current RqJC TA = 100°C Pulsed Drain Current, VGS @ 10 V Power Dissipation RqJC Gate−to−Source Voltage Single Pulse Avalanche Energy, ID = 3.0 A ESD (HBM) (JESD 22−A114) RMS Isolation Voltage (t = 0.3 sec., R.H. ≤ 30%, TA = 25°C) (Figure 17) Peak Diode Recovery Continuous Source Current (Body Diode) Maximum Temperature for Soldering Leads Operating Junction and Storage Temperature Range Symbol VDSS ID ID IDM PD VGS EAS Vesd VISO 4500 3.0 (Note 1) 1.9 (Note 1) 12 (Note 1) 25 NDF NDP 600 3.0 1.9 12 78 30 100 3000 2.6 1.65 10 61 NDD Unit V A A G (1) A W V mJ V V 4 4 dv/dt IS TL TJ, Tstg 4.5 (Note 2) 3.0 260 − 55 to 150 V/ns A °C °C 12 1 1 3 2 2 3 3 3 DPAK TO−220FP TO−220AB IPAK CASE 221D CASE 221A CASE 369D CASE 369AA STYLE 2 STYLE 1 STYLE 5 STYLE 2 1 2 S (3) N−Channel D (2) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Limited by maximum junction temperature 2. ISD = 3.0 A, di/dt ≤ 100 A/ms, VDD ≤ BVDSS, TJ = +150°C MARKING AND ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. © Semiconductor Components Industries, LLC, 2010 April, 2010 − Rev. 3 1 Publication Order Number: NDF03N60Z/D NDF03N60Z, NDP03N60Z, NDD03N60Z THERMAL RESISTANCE Parameter Junction−to−Case (Drain) NDP03N60Z NDF03N60Z NDD03N60Z (Note 3) NDP03N60Z (Note 3) NDF03N60Z (Note 4) NDD03N60Z (Note 3) NDD03N60Z−1 Symbol RqJC Value 1.6 5.0 2.0 51 51 40 80 Unit °C/W Junction−to−Ambient Steady State RqJA 3. Insertion mounted 4. Surface mounted on FR4 board using 1″ sq. pad size, (Cu area = 1.127 in sq [2 oz] including traces). ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain−to−Source Leakage Current VGS = 0 V, ID = 1 mA Reference to 25°C, ID = 1 mA VDS = 600 V, VGS = 0 V VGS = ±20 V VGS = 10 V, ID = 1.2 A VDS = VGS, ID = 50 mA VDS = 15 V, ID = 1.5 A 25°C 150°C IGSS RDS(on) VGS(th) gFS Ciss Coss Crss VDD = 300 V, ID = 3.0 A, VGS = 10 V Qg Qgs Qgd Rg td(on) VDD = 300 V, ID = 3.0 A, VGS = 10 V, RG = 5 W tr td(off) tf 3.0 2.0 312 39 8 12 2.5 6.1 6.0 9 8 16 10 W ns nC 3.3 BVDSS DBVDSS/ DTJ IDSS 600 0.6 1 50 ±10 3.6 4.5 mA W V S pF V V/°C mA Test Conditions Symbol Min Typ Max Unit Gate−to−Source Forward Leakage ON CHARACTERISTICS (Note 5) Static Drain−to−Source On−Resistance Gate Threshold Voltage Forward Transconductance DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate−to−Source Charge Gate−to−Drain (“Miller”) Charge Gate Resistance RESISTIVE SWITCHING CHARACTERISTICS Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time VDS = 25 V, VGS = 0 V, f = 1.0 MHz SOURCE−DRAIN DIODE CHARACTERISTICS (TC = 25°C unless otherwise noted) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge 5. Pulse Width ≤ 380 ms, Duty Cycle ≤ 2%. IS = 3.0 A, VGS = 0 V VGS = 0 V, VDD = 30 V IS = 3.0 A, di/dt = 100 A/ms VSD trr Qrr 265 0.9 1.6 V ns mC http://onsemi.com 2 NDF03N60Z, NDP03N60Z, NDD03N60Z TYPICAL CHARACTERISTICS 4.0 3.5 ID, DRAIN CURRENT (A) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0 5.0 10.0 15.0 5.5 V 5.0 V 20.0 25.0 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 6.0 V 7.0 V VGS = 10 V 6.5 V ID, DRAIN CURRENT (A) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 3 4 5 TJ = 150°C TJ = −55°C 6 7 8 9 10 TJ = 25°C VDS = 25 V Figure 1. On−Region Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 2. Transfer Characteristics 5.00 4.75 4.50 4.25 4.00 3.75 3.50 3.25 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 ID = 1.2 A TJ = 25°C 5.00 4.75 4.50 4.25 4.00 3.75 3.50 3.25 3.00 0.0 VGS = 10 V TJ = 25°C 10.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VGS, GATE−TO−SOURCE VOLTAGE (V) BVDSS, NORMALIZED BREAKDOWN VOLTAGE (V) ID, DRAIN CURRENT (A) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) Figure 3. On−Region versus Gate−to−Source Voltage 2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 −50 −25 0 25 50 75 100 125 150 ID = 1.2 A VGS = 10 V Figure 4. On−Resistance versus Drain Current and Gate Voltage 1.15 1.10 1.05 1.00 0.95 0.90 −50 ID = 1 mA −25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 5. On−Resistance Variation with Temperature Figure 6. BVDSS Variation with Temperature http://onsemi.com 3 NDF03N60Z, NDP03N60Z, NDD03N60Z TYPICAL CHARACTERISTICS 10 700 650 600 550 500 450 400 350 300 250 200 150 100 50 0 TJ = 150°C 1.0 C, CAPACITANCE (pF) IDSS, LEAKAGE (mA) TJ = 25°C VGS = 0 V f = 1 MHz Ciss TJ = 125°C 0.10 Crss 0 5 10 15 Coss 20 25 30 35 40 45 50 0 50 100 150 200 250 300 350 400 450 500 550 600 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 7. Drain−to−Source Leakage Current versus Voltage 15.0 14.0 13.0 12.0 11.0 10.0 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 0 VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 8. Capacitance Variation QT VDS VGS QGS QGD 300 250 200 150 VDS = 300 V ID = 3 A TJ = 25°C 100 50 0 12 1 2 Figure 9. Gate−to−Source Voltage and Drain−to−Source Voltage versus Total Charge 1000 IS, SOURCE CURRENT (A) VDD = 300 V ID = 3 A VGS = 10 V t, TIME (ns) 100 td(off) tr tf td(on) 10.0 3 4 5 6 7 8 9 10 Qg, TOTAL GATE CHARGE (nC) 11 TJ = 150°C 1.0 125°C 25°C −55°C 0.1 0.3 10.0 1.0 1 10 RG, GATE RESISTANCE (W) 100 0.4 0.5 0.6 0.7 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0.8 350 0.9 1.0 1.1 1.2 Figure 10. Resistive Switching Time Variation versus Gate Resistance VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 11. Diode Forward Voltage versus Current http://onsemi.com 4 NDF03N60Z, NDP03N60Z, NDD03N60Z TYPICAL CHARACTERISTICS 100 VGS v 30 V SINGLE PULSE TC = 25°C 100 VGS v 30 V SINGLE PULSE TC = 25°C 1 ms 10 ms dc ID, DRAIN CURRENT (A) 10 ID, DRAIN CURRENT (A) 100 ms 1 ms 10 ms dc 10 ms 10 100 ms 10 ms 1 1 0.1 0.01 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 10 100 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 0.1 0.01 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 10 100 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 Figure 12. Maximum Rated Forward Biased Safe Operating Area NDD03N60Z Figure 13. Maximum Rated Forward Biased Safe Operating Area NDF03N60Z 10 1 R(t) (C/W) 50% (DUTY CYCLE) 20% 10% 5.0% 0.1 2.0% 1.0% SINGLE PULSE RqJA = 2°C/W Steady State 1E−04 1E−03 1E−02 1E−01 PULSE TIME (s) 1E+00 1E+01 1E+02 1E+03 0.01 1E−06 1E−05 Figure 14. Thermal Impedance (Junction−to−Case) for NDD03N60Z 100 R(t) (C/W) 10 50% (DUTY CYCLE) 20% 10% 5.0% 1 2.0% 1.0% 0.1 RqJA = 40°C/W Steady State 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 1E+02 1E+03 0.01 1E−06 SINGLE PULSE 1E−05 PULSE TIME (s) Figure 15. Thermal Impedance (Junction−to−Ambient) for NDD03N60Z http://onsemi.com 5 NDF03N60Z, NDP03N60Z, NDD03N60Z 10 50% (DUTY CYCLE) 1 R(t) (C/W) 20% 10% 5.0% 2.0% 0.1 1.0% SINGLE PULSE 0.01 1E−06 1E−05 1E−04 1E−03 1E−02 1E−01 PULSE TIME (s) 1E+00 1E+01 RqJA = 5°C/W Steady State 1E+02 1E+03 Figure 16. Thermal Impedance (Junction−to−Case) for NDF03N60Z LEADS HEATSINK 0.110″ MIN Figure 17. Isolation Test Diagram Measurement made between leads and heatsink with all leads shorted together. *For additional mounting information, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 NDF03N60Z, NDP03N60Z, NDD03N60Z ORDERING INFORMATION Order Number NDF03N60ZG NDP03N60ZG NDD03N60Z−1G NDD03N60ZT4G Package TO−220FP (Pb−Free) TO−220AB (Pb−Free) IPAK (Pb−Free) DPAK (Pb−Free) Shipping† 50 Units / Rail 50 Units / Rail In Development 75 Units / Rail 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MARKING DIAGRAMS 4 Drain NDF03N60ZG or NDP03N60ZG AYWW Gate Source 1 23 Gate Drain Source Drain A Y WW G = Location Code = Year = Work Week = Pb−Free Package YWW 3N 60ZG 4 Drain YWW 3N 60ZG 2 1 Drain 3 Gate Source http://onsemi.com 7 NDF03N60Z, NDP03N60Z, NDD03N60Z PACKAGE DIMENSIONS TO−220 FULLPAK CASE 221D−03 ISSUE J −T− F Q A 123 SEATING PLANE −B− C S U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH 3. 221D-01 THRU 221D-02 OBSOLETE, NEW STANDARD 221D-03. INCHES MIN MAX 0.617 0.635 0.392 0.419 0.177 0.193 0.024 0.039 0.116 0.129 0.100 BSC 0.118 0.135 0.018 0.025 0.503 0.541 0.048 0.058 0.200 BSC 0.122 0.138 0.099 0.117 0.092 0.113 0.239 0.271 MILLIMETERS MIN MAX 15.67 16.12 9.96 10.63 4.50 4.90 0.60 1.00 2.95 3.28 2.54 BSC 3.00 3.43 0.45 0.63 12.78 13.73 1.23 1.47 5.08 BSC 3.10 3.50 2.51 2.96 2.34 2.87 6.06 6.88 H K −Y− G N L D 3 PL M J R DIM A B C D F G H J K L N Q R S U 0.25 (0.010) B M Y STYLE 1: PIN 1. GATE 2. DRAIN 3. SOURCE TO−220AB CASE 221A−09 ISSUE AE −T− B 4 SEATING PLANE F T C S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.161 0.095 0.105 0.110 0.155 0.014 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 GATE DRAIN SOURCE DRAIN MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 4.09 2.42 2.66 2.80 3.93 0.36 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 Q 123 A U K H Z L V G D N R J STYLE 5: PIN 1. 2. 3. 4. http://onsemi.com 8 NDF03N60Z, NDP03N60Z, NDD03N60Z PACKAGE DIMENSIONS IPAK CASE 369D−01 ISSUE B B V R 4 C E Z NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 −−− S −T− SEATING PLANE A 1 2 3 K F D G 3 PL J H M 0.13 (0.005) T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN DPAK CASE 369AA−01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.025 0.035 0.018 0.024 0.030 0.045 0.386 0.410 0.018 0.023 0.090 BSC 0.180 0.215 0.024 0.040 0.020 −−− 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.63 0.89 0.46 0.61 0.77 1.14 9.80 10.40 0.46 0.58 2.29 BSC 4.57 5.45 0.60 1.01 0.51 −−− 0.89 1.27 3.93 −−− −T− B V R 4 SEATING PLANE C E S A 1 2 3 Z H U F L D 2 PL J DIM A B C D E F H J L R S U V Z 0.13 (0.005) M T SOLDERING FOOTPRINT* 6.20 0.244 3.0 0.118 STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 SCALE 3:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 9 NDF03N60Z, NDP03N60Z, NDD03N60Z ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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