NDF10N62ZG

NDF10N62Z, NDP10N62Z N-Channel Power MOSFET 620 V, 0.65 W Features • • • • • Low ON Resistance Low Gate Charge Zener Diode−protected Gate 100% Avalanche Tested These Devices are Pb−Free and RoHS Compliant http://onsemi.com VDSS 620 V RDS(ON) (TYP) @ 5 A 0.65 Ω ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Drain−to−Source Voltage Continuous Drain Current, RqJC Continuous Drain Current RqJC, TA = 100°C Pulsed Drain Current, VGS @ 10 V Power Dissipation, RqJC (Note 1) Gate−to−Source Voltage Single Pulse Avalanche Energy, ID = 10 A ESD (HBM) (JESD22−A114) RMS Isolation Voltage (t = 0.3 sec., R.H. ≤ 30%, TA = 25°C) (Figure 14) Peak Diode Recovery Continuous Source Current (Body Diode) Maximum Temperature for Soldering Leads Operating Junction and Storage Temperature Range Symbol VDSS ID ID IDM PD VGS EAS Vesd VISO 4500 36 ±30 300 3900 NDF10N62Z NDP10N62Z Unit V A A G (1) 36 (Note 2) 125 A W V mJ V V NDF10N62ZG or NDP10N62ZG AYWW Gate TO−220AB CASE 221A STYLE 5 Drain A Y WW G = Location Code = Year = Work Week = Pb−Free Package Source S (3) N−Channel D (2) 620 (Note 1) 10 (Note 2) 5.7 (Note 2) TO−220FP CASE 221D STYLE 1 MARKING DIAGRAM dv/dt IS TL TJ, Tstg 4.5 (Note 3) 10 260 − 55 to 150 V/ns A °C °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface mounted on FR4 board using 1″ sq. pad size, (Cu area = 1.127 in sq [2 oz] including traces) 2. Limited by maximum junction temperature 3. IS ≤ 10 A, di/dt ≤ 200 A/ms, VDD = 80% BVDSS ORDERING INFORMATION Device NDF10N62ZG NDP10N62ZG Package TO−220FP TO−220AB Shipping 50 Units/Rail In Development © Semiconductor Components Industries, LLC, 2010 April, 2010 − Rev. 0 1 Publication Order Number: NDF10N62Z/D NDF10N62Z, NDP10N62Z THERMAL RESISTANCE Parameter Junction−to−Case (Drain) Junction−to−Ambient Steady State (Note 4) Symbol RqJC RqJA NDF10N62Z 3.4 50 NDP10N62Z 1.0 50 Unit °C/W ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain−to−Source Leakage Current VGS = 0 V, ID = 1 mA Reference to 25°C, ID = 1 mA VDS = 620 V, VGS = 0 V VGS = ±20 V VGS = 10 V, ID = 5.0 A VDS = VGS, ID = 100 mA VDS = 15 V, ID = 10 A 25°C 125°C IGSS RDS(on) VGS(th) gFS Ciss Coss Crss Qg VDD = 310 V, ID = 10 A, VGS = 10 V Qgs Qgd Vgp Rg td(on) VDD = 310 V, ID = 10 A, VGS = 10 V, RG = 5 Ω tr td(off) tf 3.0 7.9 1425 150 35 47 9.3 25 6.4 1.5 15 31 40 21 V W ns nC 0.65 BVDSS DBVDSS/ DTJ IDSS 620 0.6 1 50 ±10 0.75 4.5 mA W V S pF V V/°C mA Test Conditions Symbol Min Typ Max Unit Gate−to−Source Forward Leakage ON CHARACTERISTICS (Note 5) Static Drain−to−Source On−Resistance Gate Threshold Voltage Forward Transconductance DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate−to−Source Charge Gate−to−Drain (“Miller”) Charge Plateau Voltage Gate Resistance RESISTIVE SWITCHING CHARACTERISTICS Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time VDS = 25 V, VGS = 0 V, f = 1.0 MHz SOURCE−DRAIN DIODE CHARACTERISTICS (TC = 25°C unless otherwise noted) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge 4. Insertion mounted 5. Pulse Width ≤ 380 ms, Duty Cycle ≤ 2%. IS = 10 A, VGS = 0 V VGS = 0 V, VDD = 30 V IS = 10 A, di/dt = 100 A/ms VSD trr Qrr 395 3.0 1.6 V ns mC http://onsemi.com 2 NDF10N62Z, NDP10N62Z TYPICAL CHARACTERISTICS 20 18 ID, DRAIN CURRENT (A) 16 14 12 10 8 6 4 2 0 TJ = 25°C 7.0 V 10 V 20 18 6.4 V 6.2 V 6.0 V 5.8 V 5.6 V 5.4 V 5.0 V 0 4 8 12 16 20 24 VDS, DRAIN−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) 6.6 V 16 14 12 10 8 6 4 2 0 TJ = −55°C 2 3 4 5 6 7 8 TJ = 150°C VDS = 30 V TJ = 25°C VGS = 15 V VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0.80 TJ = 25°C 0.75 0.80 Figure 2. Transfer Characteristics TJ = 25°C 0.75 VGS = 10 V 0.70 ID = 5 A 0.70 0.65 0.65 0.60 5 6 7 8 9 10 0.60 2.5 5.0 7.5 10 12.5 VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate Voltage 2.7 RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) VGS = 10 V 2.2 1.7 1.2 0.7 0.2 −50 ID = 5 A BVDSS, NORMALIZED BREAKDOWN VOLTAGE (V) 1.15 1.1 Figure 4. On−Resistance vs. Drain Current and Gate Voltage ID = 1 mA 1.05 1.0 0.95 0.9 −50 −25 0 25 50 75 100 125 150 −25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 5. On−Resistance Variation with Temperature Figure 6. BVDSS Variation with Temperature http://onsemi.com 3 NDF10N62Z, NDP10N62Z TYPICAL CHARACTERISTICS 100 VGS = 0 V C, CAPACITANCE (pF) IDSS, LEAKAGE (mA) 10 TJ = 150°C 3500 3000 2500 2000 1500 1000 500 0.01 0 100 200 300 400 500 600 0 0 Crss Coss 25 50 75 100 125 150 175 200 Ciss VGS = 0 V TJ = 25°C 1 TJ = 100°C 0.1 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 7. Drain−to−Source Leakage Current vs. Voltage VGS, GATE−TO−SOURCE VOLTAGE (V) 20 400 1000 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 8. Capacitance Variation 15 VDS QT Qgs Qgd VGS VDS = 310 V ID = 10 A TJ = 25°C 0 5 10 15 20 25 30 35 40 45 300 VDD = 310 V ID = 10 A VGS = 10 V t, TIME (ns) 100 td(off) tr tf td(on) 10 200 10 5 100 0 0 50 1 1 10 RG, GATE RESISTANCE (W) 100 Qg, TOTAL GATE CHARGE (nC) Figure 9. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 10 IS, SOURCE CURRENT (A) 8 6 4 2 0 VGS = 0 V TJ = 25°C ID, DRAIN CURRENT (A) 100 Figure 10. Resistive Switching Time Variation vs. Gate Resistance VGS = 10 V Single Pulse TC = 25°C 1 ms 100 ms 10 ms 10 1 0.1 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0.01 Mounted on 2″ sq. FR4 board (1″ sq. 2 oz. Cu 0.06″ thick single sided) with one die operating RDS(on) Limit Thermal Limit Package Limit 1 10 100 10 ms dc 1000 VSD, SOURCE−TO−DRAIN VOLTAGE (V) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 11. Diode Source Current vs. Forward Voltage Figure 12. Maximum Rated Forward Biased Safe Operating Area for NDF10N62Z http://onsemi.com 4 NDF10N62Z, NDP10N62Z TYPICAL CHARACTERISTICS 10 Duty Cycle = 50% 1 20% 10% 5% 0.1 2% 1% R(t) (°C/W) 0.01 Single Pulse Simulation 0.001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 RqJC Steady State = 3.4°C/W 10 100 1000 PULSE TIME (sec) Figure 13. Thermal Impedance for NDF10N62Z LEADS HEATSINK 0.110″ MIN Figure 14. Isolation Test Diagram Measurement made between leads and heatsink with all leads shorted together. *For additional mounting information, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 5 NDF10N62Z, NDP10N62Z PACKAGE DIMENSIONS TO−220FP CASE 221D−03 ISSUE K −T− F Q A 123 SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH 3. 221D-01 THRU 221D-02 OBSOLETE, NEW STANDARD 221D-03. INCHES MIN MAX 0.617 0.635 0.392 0.419 0.177 0.193 0.024 0.039 0.116 0.129 0.100 BSC 0.118 0.135 0.018 0.025 0.503 0.541 0.048 0.058 0.200 BSC 0.122 0.138 0.099 0.117 0.092 0.113 0.239 0.271 MILLIMETERS MIN MAX 15.67 16.12 9.96 10.63 4.50 4.90 0.60 1.00 2.95 3.28 2.54 BSC 3.00 3.43 0.45 0.63 12.78 13.73 1.23 1.47 5.08 BSC 3.10 3.50 2.51 2.96 2.34 2.87 6.06 6.88 −B− U C S H K −Y− G N L D 3 PL M J R DIM A B C D F G H J K L N Q R S U 0.25 (0.010) B M Y STYLE 1: PIN 1. GATE 2. DRAIN 3. SOURCE TO−220AB CASE 221A−09 ISSUE AE −T− B 4 SEATING PLANE F T C S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.161 0.095 0.105 0.110 0.155 0.014 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 GATE DRAIN SOURCE DRAIN MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 4.09 2.42 2.66 2.80 3.93 0.36 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 Q 123 A U K H Z L V G D N R J STYLE 5: PIN 1. 2. 3. 4. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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