March 1996
NDS356P
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
Features
-1.1 A, -20V. RDS(ON) = 0.3Ω @ VGS = -4.5V.
These P-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process is especially tailored to
minimize on-state resistance. These devices are
particularly suited for low voltage applications such as
notebook computer power management, portable
electronics, and other battery powered circuits where
fast high-side switching, and low in-line power loss are
needed in a very small outline surface mount package.
Proprietary package design using copper lead frame for
superior thermal and electrical capabilities.
High density cell design for extremely low RDS(ON).
Exceptional on-resistance and maximum DC current
capability.
Compact industry standard SOT-23 surface mount
package.
_______________________________________________________________________________
D
S
G
Absolute Maximum Ratings
T A = 25°C unless otherwise noted
Symbol
Parameter
NDS356P
Units
VDSS
Drain-Source Voltage
-20
V
VGSS
Gate-Source Voltage - Continuous
± 12
V
ID
Maximum Drain Current
±1.1
A
- Continuous
(Note 1a)
- Pulsed
PD
TJ,TSTG
Maximum Power Dissipation
±10
(Note 1a)
0.5
(Note 1b)
0.46
Operating and Storage Temperature Range
W
-55 to 150
°C
250
°C/W
75
°C/W
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
(Note 1a)
© 1997 Fairchild Semiconductor Corporation
(Note 1)
NDS356P Rev. E1
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
-20
Typ
Max
Units
OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = -250 µA
IDSS
Zero Gate Voltage Drain Current
VDS = -16 V, VGS = 0 V
V
TJ =125°C
-5
µA
-20
µA
IGSSF
Gate - Body Leakage, Forward
VGS = 12 V, VDS = 0 V
100
nA
IGSSR
Gate - Body Leakage, Reverse
VGS = -12 V, VDS = 0 V
-100
nA
V
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = -250 µA
RDS(ON)
Static Drain-Source On-Resistance
VGS = -4.5 V, ID = -1.1 A
TJ =125°C
-0.8
-1.6
-2.5
-0.5
-1.3
-2.2
Ω
0.3
0.4
TJ =125°C
0.21
VGS = -10 V, ID = -1.3 A
ID(ON)
On-State Drain Current
VGS = -4.5 V, VDS = -5 V
gFS
Forward Transconductance
VDS = -5 V, ID = -1.1 A
-3
1.8
A
S
VDS = -10 V, VGS = 0 V,
f = 1.0 MHz
180
pF
255
pF
60
pF
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 2)
td(on)
Turn - On Delay Time
tr
Turn - On Rise Time
td(off)
tf
7
15
ns
17
30
ns
Turn - Off Delay Time
56
90
ns
Turn - Off Fall Time
41
80
ns
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = -10 V, ID = -1 A,
VGS = -10 V, RGEN = 50 Ω
VDS = -10 V, ID = -1.1 A,
VGS = -5 V
3.5
5
nC
1.5
nC
2
nC
NDS356P Rev. E1
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
-0.6
A
-4
A
-1.2
V
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS
Maximum Continuous Drain-Source Diode Forward Current
ISM
Maximum Pulsed Drain-Source Diode Forward Current
VSD
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = -1.1 A (Note 2)
-0.85
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by
design while RθCA is determined by the user's board design.
PD(t ) =
T J−TA
R θJ A(t )
=
T J−TA
R θJ C+RθCA(t )
= I 2D (t ) × RDS (ON )
TJ
Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 250oC/W when mounted on a 0.02 in2 pad of 2oz cpper.
b. 270oC/W when mounted on a 0.001 in2 pad of 2oz cpper.
1a
1b
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDS356P Rev. E1
Typical Electrical Characteristics
-5
2
-6.0
-5.0
RDS(on) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I D , DRAIN-SOURCE CURRENT (A)
VGS = -10V
-4.5
-4
-3
-4.0
-2
-3.5
-1
-3.0
V
1.75
= -3.5 V
-4.0
1.5
-4.5
1.25
-5.0
1
-6.0
0.75
-10
0.5
0
0
-0.5
V
DS
-1
-1.5
-2
, DRAIN-SOURCE VOLTAGE (V)
-2.5
-3
0
Figure 1. On-Region Characteristics
RDS(on) , NORMALIZED
1
0.9
DRAIN-SOURCE ON-RESISTANCE
VGS = -4.5 V
1.1
0.8
-50
-5
VGS = 4.5V
2.5
2
T J = 125°C
1.5
25°C
1
-55°C
0.5
-25
0
25
50
75
100
125
150
0
-1
Vth , NORMALIZED
GATE-SOURCE THRESHOLD VOLTAGE (V)
TJ = -55°C
25
-8
125
-6
-4
-2
0
-2
-4
-6
VGS , GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
-3
-4
-5
-6
Figure 4. On-Resistance Variation
with Drain Current and Temperature
-10
V DS = 1 0 V
-2
I D , DRAIN CURRENT (A)
Figure 3. On-Resistance Variation
with Temperature
I D , DRAIN CURRENT (A)
-4
3
T J , JUNCTION TEMPERATURE (°C)
0
-2
-3
I D , DRAIN CURRENT (A)
3.5
I D = -1.1 A
1.2
-1
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage
1.3
RDS(ON) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
GS
-8
1.15
VDS = V GS
1.1
I D = -250µA
1.05
1
0.95
0.9
0.85
0.8
-50
-25
0
25
50
75
100
TJ , JUNCTION TEMPERATURE (°C)
125
150
Figure 6. Gate Threshold Variation
with Temperature
NDS356P Rev. E1
10
1.08
I D = -250µA
-I S , REVERSE DRAIN CURRENT (A)
BVDSS , NORMALIZED
DRAIN-SOURCE BREAKDOWN VOLTAGE (V)
Typical Electrical Characteristics (continued)
1.06
1.04
1.02
1
0.98
0.96
-50
-25
0
25
50
75
100
T J , JUNCTION TEMPERATURE (°C)
125
V
2
T J = 125°C
1
25°C
0.2
-55°C
0.1
0.01
-1.2
-1.5
-1.8
-10
I
Ciss
200
Coss
100
VGS = 0 V
= -1.1 A
V
DS
= -5 V
-10
-6
-4
-2
V
Crss
D
-8
GS
f = 1 MHz
, GATE-SOURCE VOLTAGE (V)
300
0
0.2
0.5
-V
DS
1
2
5
10
20
0
1
2
, DRAIN TO SOURCE VOLTAGE (V)
4
5
6
7
Figure 10. Gate Charge Characteristics
VDD
ton
t d(on)
t off
tr
RL
VIN
3
Q g , GATE CHARGE (nC)
Figure 9. Capacitance Characteristics
t d(off)
tf
90%
90%
V OUT
D
VGS
-0.9
Figure 8. Body Diode Forward Voltage Variation with
Source Current and Temperature
500
CAPACITANCE (pF)
-0.6
VSD , BODY DIODE FORWARD VOLTAGE (V)
700
30
0.1
= 0V
0.5
0.001
-0.3
150
Figure 7. Breakdown Voltage Variation with
Temperature
50
GS
VOUT
R GEN
10%
10%
DUT
G
90%
S
V IN
50%
50%
10%
PULSE WIDTH
Figure 11. Switching Test Circuit
INVERTED
Figure 12. Switching Waveforms
NDS356P Rev. E1
5
20
T J= -55°C
- I D , DRAIN-SOURCE CURRENT (A)
25°C
3
10
10
4
125°C
2
1
VDS = -5V
5
RD
S(O
LI
N)
1m
T
MI
10
1
10
1s
10
s
DC
0.2
VGS = -10V
SINGLE PULSE
0.1
0.05
TA
0m
0u
s
s
ms
s
= 25°C
0.02
g
FS
, TRANSCONDUCTANCE (SIEMENS)
Typical Electrical Characteristics (continued)
0
0
-2
-4
-6
I D , DRAIN CURRENT (A)
-8
-10
0.01
0.1
0.2
0.5
1
2
5
10
20
30
- V DS , DRAIN-SOURCE VOLTAGE (V)
Figure 13. Transconductance Variation with
Drain Current and Temperature
Figure 14. Maximum Safe Operating Area
1
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
0.5
D = 0.5
0.2
0.2
0.1
0.1
0.05
0.02
0.01
0.005
R θJA (t) = r(t) * RθJA
R
= 250 °C/W
θJA
0.05
0.02
P(pk)
0.01
t1
Single Pulse
0.002
0.001
0.0001
t2
TJ - T A = P * R θJA (t)
Duty Cycle, D = t1 /t2
0.001
0.01
0.1
t1 , TIME (sec)
1
10
100
300
Figure 15. Transient Thermal Response Curve
Note : Characterization performed using the conditions described in note 1c. Transient thermal response will
change depending on the circuit board design.
NDS356P Rev. E1
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
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DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into
support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
