NDS9959

February 1996 NDS9959 Dual N-Channel Enhancement Mode Field Effect Transistor General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as DC motor control and DC/DC conversion where fast switching, low in-line power loss, and resistance to transients are needed. 2.0A, 50V. RDS(ON) = 0.3Ω @ VGS = 10V High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. _________________________________________________________________________________ Absolute Maximum Ratings Parameter VDSS VGSS ID Drain Current - Continuous @ TA = 25°C 6 3 7 2 8 1 NDS9959 Units Drain-Source Voltage 50 V Gate-Source Voltage ± 20 V (Note 1a) ± 2.0 A (Note 1a) ± 1.6 - Continuous @ TA = 70°C - Pulsed @ TA = 25°C ±8 Power Dissipation for Dual Operation Power Dissipation for Single Operation TJ,TSTG 4 T A = 25°C unless otherwise noted Symbol PD 5 2 (Note 1a) 1.6 (Note 1b) 1 (Note 1c) 0.9 Operating and Storage Temperature Range W -55 to 150 °C THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W © 1997 Fairchild Semiconductor Corporation NDS9959.SAM Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units 2 µA OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA IDSS Zero Gate Voltage Drain Current VDS = 40 V, VGS = 0 V 50 V 25 µA IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS= 0 V -100 nA 4 V Ω TJ= 55°C ON CHARACTERISTICS (Note2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2 RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 1.5 A 0.3 VGS = 5 V, ID = 0.6 A 0.5 ID(on) On-State Drain Current VGS = 10 V, VDS = 5 V 8 gFS Forward Transconductance VDS = 15 V, ID = 2.0 A 1 3 A 2.7 S DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz 152 250 pF 50 85 pF 12 25 pF 4 40 ns 8 70 ns SWITCHING CHARACTERISTICS (Note 2) tD(on) Turn - On Delay Time tr Turn - On Rise Time tD(off) Turn - Off Delay Time tf Turn - Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 30 V, ID = 0.6 A, VGS = 10 V, RL = 50 Ω, RGEN = 6 Ω VDS = 25 V, ID = 1.3 A, VGS = 10 V 9 100 ns 11 70 ns 4.3 15 nC 1.1 nC 1.5 nC NDS9959.SAM Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units 1.8 A 1.2 V 100 ns DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuos Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.25 A trr Reverse Recovery Time VGS = 0V, IF = 1.25 A, dIF/dt = 100 A/µs 0.84 (Note 2) Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. PD(t ) = T J−TA R θJ A(t ) = T J−TA R θJ C+RθCA(t ) = I 2D (t ) × RDS(ON ) TJ Typical RθJA for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 78oC/W when mounted on a 0.5 in2 pad of 2oz cpper. b. 125oC/W when mounted on a 0.02 in2 pad of 2oz cpper. c. 135oC/W when mounted on a 0.003 in2 pad of 2oz cpper. 1a 1b 1c Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. NDS9959.SAM Typical Electrical Characteristics 12 2.4 10 9.0 RDS(ON), NORMALIZED 8.0 8 7.0 6 4 6.0 2 0 5.0 0 1 2 V DS 3 4 5 6 , DRAIN-SOURCE VOLTAGE (V) 7 DRAIN-SOURCE ON-RESISTANCE I D , DRAIN-SOURCE CURRENT (A) VGS =10V 10V 1.2 0 2 4 6 8 I D , DRAIN CURRENT (A) 10 12 5 I D = 1.5A VG S = 1 0 V 1.8 RDS(ON), NORMALIZED 1.6 1.4 1.2 1 0.8 0.6 0.4 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 DRAIN-SOURCE ON-RESISTANCE R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE (OHMS) 9.0V 1.6 Figure 2. On-Resistance Variation with Gate Voltage and Drain Current. 2 VGS =10 V 4 3 TJ = 125°C 2 25°C 1 -55°C 0 150 Figure 3. On-Resistance Variation with Temperature. 0 2 4 6 8 ID , DRAIN CURRENT (A) 10 12 Figure 4. On-Resistance Variation with Drain Current and Temperature. 1.2 TJ = -55°C V DS = 10V 10 25 V th, NORMALIZED 125 8 6 4 2 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 10 GATE-SOURCE THRESHOLD VOLTAGE (V) 12 ID , DRAIN CURRENT (A) 7.0V 8.0V 0.8 8 Figure 1. On-Region Characteristics. 0 VGS = 6V 2 V DS = V 1.1 GS I D = 250µA 1 0.9 0.8 0.7 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 150 Figure 6. Gate Threshold Variation with Temperature. NDS9959.SAM Typical Electrical Characteristics (continued) 10 I D = 250µA I S , REVERSE DRAIN CURRENT (A) BV DSS , NORMALIZED DRAIN-SOURCE BREAKDOWN VOLTAGE (V) 1.1 1.05 1 0.95 0.9 0.85 -50 -25 0 TJ 25 50 75 100 , JUNCTION TEMPERATURE (°C) 125 0.3 0.1 TJ = 125°C 0.03 25°C -55°C 0.01 0.003 0.4 0.6 0.8 1 1.2 VSD , BODY DIODE FORWARD VOLTAGE (V) 1.4 14 100 VGS , GATE-SOURCE VOLTAGE (V) C iss 200 CAPACITANCE (pF) 1 Figure 8. Body Diode Forward Voltage Variation with Current and Temperature 400 C oss 50 20 C rss f = 1 MHz V GS = 0V 10 0.2 V 0.5 1 2 5 10 , DRAIN TO SOURCE VOLTAGE (V) 20 50 ID = 1.3A 12 8 6 4 2 0 0 R GEN 1 2 3 4 Q g , GATE CHARGE (nC) 5 t d(on) RL t off tr t d(off) tf 90% 90% V OUT VOUT 10% 10% DUT G 6 Figure 10. Gate Charge Characteristics. t on D 40V 10 VDD V IN V DS = 10V 20V DS Figure 9. Capacitance Characteristics. VGS VGS =0V 0.001 0.2 150 Figure 7. Breakdown Voltage Variation with Temperature. 0.1 3 INVERTED 90% S V IN 50% 50% 10% PULSE WIDTH Figure 11. Switching Test Circuit Figure 12. Switching Waveforms NDS9959.SAM Typical Electrical Characteristics (continued) 20 10 V DS = 15V 5 3 T = -55°C J I D, DRAIN CURRENT (A) g FS, TRANSCONDUCTANCE (SIEMENS) 4 25°C 2 125°C 1 0 0 1 2 3 4 ID , DRAIN CURRENT (A) 5 6 R (O DS N) LIM 10 IT 10 1 0m ms s 1s 0.5 DC V 0.1 GS = 10V SINGLE PULSE 0.05 TA = 25°C 0.01 0.1 0.2 0.5 1 2 5 10 20 50 100 V DS , DRAIN-SOURCE VOLTAGE (V) Figure 13. Transconductance Variation with Drain Current. Figure 14. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 0.5 D = 0.5 0.2 0.2 0.1 0.05 0.02 R θJA (t) = r(t) * R θJA R JA = See Note 1c θ 0.1 0.05 P(pk) 0.02 0.01 0.01 t1 Single Pulse 0.005 = P * R JA (t) θ Duty Cycle, D = t 1 / t 2 A 0.002 0.001 0.0001 t2 TJ - T 0.001 0.01 0.1 1 10 100 300 t1 , TIME (sec) Figure 15. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. NDS9959.SAM TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench  QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST FASTr™ GTO™ SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. 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