NDT03N40ZT3G

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Other names and brands may be claimed as the property of others. NDD03N40Z, NDT03N40Z N-Channel Power MOSFET 400 V, 3.4 W Features • • • • • • • 100% Avalanche Tested Extremely High dv/dt Capability Gate Charge Minimized Very Low Intrinsic Capacitance Improved Diode Reverse Recovery Characteristics Zener−protected These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(ON) MAX 400 V 3.4 W @ 10 V ABSOLUTE MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Symbol NDD NDT Drain−to−Source Voltage VDSS 400 V Gate−to−Source Voltage VGS ±30 V 2.1 N−Channel D (2, 4) Unit Continuous Drain Current Steady State, TC = 25°C (Note 1) ID 0.5 A Continuous Drain Current Steady State, TC = 100°C (Note 1) ID 1.3 0.3 A Power Dissipation Steady State, TC = 25°C PD 37 2.0 W Pulsed Drain Current IDM 8.0 7.2 A IS 2.1 0.5 A G (1) Continuous Source Current (Body Diode) EAS 42 mJ Peak Diode Recovery (Note 2) dV/dt 12 V/ns TL 260 °C Operating Junction and Storage Temperature 4 12 Single Pulse Drain−to−Source Avalanche Energy (ID = 1 A) Maximum Temperature for Soldering Leads S (3) 3 SOT−223 CASE 318E STYLE 3 4 TJ, TSTG °C −55 to +150 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Limited by maximum junction temperature 2. IS ≤ 2.4 A, di/dt ≤ 400 A/ms, VDD ≤ BVDSS, TJ = +150°C 4 1 2 1 3 DPAK CASE 369C STYLE 2 2 3 IPAK CASE 369D STYLE 2 THERMAL RESISTANCE Parameter Junction−to−Case (Drain) NDD03N40Z Junction−to−Ambient Steady State NDD03N40Z (Note 4) NDD03N40Z−1 (Note 3) NDT03N40Z (Note 4) NDT03N40Z (Note 5) Symbol Value Unit RqJC 3.4 °C/W MARKING & ORDERING INFORMATION °C/W See detailed ordering, marking and shipping information in the package dimensions section on page 3 of this data sheet. RqJA 42 96 62 149 3. Insertion mounted 4. Surface mounted on FR4 board using 1″ sq. pad size (Cu area = 1.127″ sq. [2 oz] including traces) 5. Surface−mounted on FR4 board using minimum recommended pad size (Cu area = 0.026” sq. [2 oz]). © Semiconductor Components Industries, LLC, 2014 May, 2014 − Rev. 1 1 Publication Order Number: NDD03N40Z/D NDD03N40Z, NDT03N40Z ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Test Conditions Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 1 mA 400 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Reference to 25°C, ID = 1 mA Characteristic Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Leakage Current Gate−to−Source Leakage Current IDSS VDS = 400 V, VGS = 0 V V 450 TJ = 25°C 1 TJ = 125°C 50 VGS = ±20 V IGSS mV/°C ±10 mA mA ON CHARACTERISTICS (Note 6) VGS(TH) VDS = VGS, ID = 50 mA Negative Threshold Temperature Coefficient VGS(TH)/TJ Reference to 25°C, ID = 50 mA 9.8 Static Drain-to-Source On Resistance RDS(on) VGS = 10 V, ID = 0.6 A 3.0 gFS VDS = 15 V, ID = 0.6 A 1.2 S 140 pF Gate Threshold Voltage Forward Transconductance 3.0 3.9 4.5 V mV/°C 3.4 W DYNAMIC CHARACTERISTICS Input Capacitance (Note 7) Ciss Output Capacitance (Note 7) Coss Reverse Transfer Capacitance (Note 7) Crss Effective output capacitance, energy related (Note 9) Co(er) Effective output capacitance, time related (Note 10) Co(tr) Total Gate Charge (Note 7) VDS = 50 V, VGS = 0 V, f = 1 MHz VGS = 0 V, VDS = 0 to 320 V ID = constant, VGS = 0 V, VDS = 0 to 320 V Qg 17 3.0 10 20 nC 6.6 Gate-to-Source Charge (Note 7) Qgs Gate-to-Drain (“Miller”) Charge (Note 7) Qgd 1.7 Plateau Voltage VGP 6.9 V Gate Resistance Rg 9.0 W 10 ns VDS = 200 V, ID = 2.4 A, VGS = 10 V 3.5 RESISTIVE SWITCHING CHARACTERISTICS (Note 8) Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time td(on) tr td(off) VDD = 200 V, ID = 2.4 A, VGS = 10 V, RG = 0 W tf 7.0 13 5.0 SOURCE−DRAIN DIODE CHARACTERISTICS Diode Forward Voltage VSD Reverse Recovery Time trr Charge Time ta Discharge Time tb Reverse Recovery Charge Qrr IS = 0.5 A, VGS = 0 V TJ = 25°C TJ = 100°C 0.8 V 0.7 152 VGS = 0 V, VDD = 30 V, IS = 2.4 A, di/dt = 100 A/ms 1.5 ns 62 90 452 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 6. Pulse Width ≤ 380 ms, Duty Cycle ≤ 2%. 7. Guaranteed by design. 8. Switching characteristics are independent of operating junction temperatures. 9. Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% V(BR)DSS 10. Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% V(BR)DSS http://onsemi.com 2 NDD03N40Z, NDT03N40Z MARKING DIAGRAMS 4 Drain YWW 3N 40ZG YWW 3N 40ZG 4 Drain Drain 4 1 2 3 Gate Drain Source 2 1 Drain 3 Gate Source AYW 3N40ZG G 1 2 3 Gate Drain Source IPAK DPAK SOT−223 A = Assembly Location Y = Year W, WW = Work Week 3N40Z = Specific Device Code G or G = Pb−Free Package (*Note: Microdot may be in either location) ORDERING INFORMATION Package Shipping† NDD03N40Z−1G IPAK (Pb−Free, Halogen Free) 75 Units / Rail NDD03N40ZT4G DPAK (Pb−Free, Halogen Free) 2500 / Tape & Reel NDT03N40ZT1G SOT−223 (Pb−Free, Halogen Free) 1000 / Tape & Reel NDT03N40ZT3G SOT−223 (Pb−Free, Halogen Free) 4000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 3 NDD03N40Z, NDT03N40Z TYPICAL CHARACTERISTICS 4.0 4.0 VGS = 10 V VGS = 8.0 V 3.5 VGS = 7.5 V 3.0 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 3.5 VGS = 7.0 V 2.5 VGS = 6.5 V 2.0 1.5 VGS = 6.0 V 1.0 VGS = 5.5 V 0.5 TJ = 25°C 2.5 2.0 TJ = 150°C 1.5 1.0 TJ = −55°C 0 5 10 15 20 25 30 2 6 7 8 Figure 2. Transfer Characteristics TJ = 25°C ID = 0.6 A 5.0 4.5 4.0 3.5 3.0 2.5 5 6 7 8 9 10 Figure 3. On−Resistance vs. Gate−to−Source Voltage 2.6 ID = 0.6 A VGS = 10 V 2.0 1.8 1.6 1.4 1.2 1.0 0.8 −25 0 25 50 75 100 125 150 BVDSS, NORMALIZED BREAKDOWN VOLTAGE VGS, GATE VOLTAGE (V) 0.6 0.4 −50 5 Figure 1. On−Region Characteristics 5.5 2.2 4 VGS, GATE−TO−SOURCE VOLTAGE (V) 6.0 2.4 3 VDS, DRAIN−TO−SOURCE VOLTAGE (V) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 3.0 0.5 VGS = 5.0 V 0 RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE VDS = 15 V 9 10 4.0 4.5 6.0 TJ = 25°C VGS = 10 V 5.5 5.0 4.5 4.0 3.5 3.0 2.5 0 0.5 1.0 1.5 2.5 2.0 3.0 3.5 ID, DRAIN CURRENT (A) Figure 4. On−Resistance vs. Drain Current and Gate Voltage 1.125 1.100 ID = 1 mA 1.075 1.050 1.025 1.000 0.975 0.950 0.925 0.900 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 5. On−Resistance Variation with Temperature Figure 6. Breakdown Voltage Variation with Temperature http://onsemi.com 4 150 NDD03N40Z, NDT03N40Z 10,000 1.15 ID = 50 mA 1.10 1.05 IDSS, LEAKAGE (nA) 1.00 0.95 0.90 0.85 0.80 0.70 0.65 −50 100 TJ = 125°C 0 25 50 75 100 0 150 125 100 50 150 200 250 300 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 7. Threshold Voltage Variation with Temperature Figure 8. Drain−to−Source Leakage Current vs. Voltage 12 VGS = 0 V TJ = 25°C f = 1 MHz CISS CRSS 1 1 10 100 VDS 200 VGS QGD QGS 150 6 5 100 4 3 VDS = 200 V TJ = 25°C ID = 2.4 A 2 1 0 50 0 0 1000 250 QT 11 10 9 8 7 10 0.1 400 350 TJ, JUNCTION TEMPERATURE (°C) VGS, GATE−TO−SOURCE VOLTAGE (V) 100 TJ = 100°C 10 1 −25 COSS C, CAPACITANCE (pF) TJ = 150°C 0.75 1000 1 2 3 4 5 7 6 VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC) Figure 9. Capacitance Variation Figure 10. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 10 100 IS, SOURCE CURRENT (A) TJ = 100°C VGS = 10 V VDD = 200 V ID = 2.4 A t, TIME (ns) 1000 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS(th), NORMALIZED THRESHOLD VOLTAGE TYPICAL CHARACTERISTICS td(off) tr tf td(on) 10 TJ = 125°C 1 TJ = 25°C 0.1 TJ = 150°C 0.01 TJ = −55°C 0.001 1 0.1 1 10 0.2 0.3 0.4 100 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 11. Resistive Switching Time Variation vs. Gate Resistance Figure 12. Diode Forward Voltage vs. Current http://onsemi.com 5 NDD03N40Z, NDT03N40Z TYPICAL CHARACTERISTICS 100 VGS ≤ 30 V Single Pulse TC = 25°C 10 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 100 10 ms 1 100 ms 1 ms 10 ms 0.1 RDS(on) Limit Thermal Limit Package Limit 0.01 VGS ≤ 30 V Single Pulse TC = 25°C 10 10 ms 1 100 ms 1 ms dc 10 ms 0.1 RDS(on) Limit Thermal Limit Package Limit 0.01 dc 0.001 0.001 0.1 1 10 100 0.1 1000 1 10 100 1000 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 13. Maximum Rated Forward Biased Safe Operating Area for NDT03N40Z Figure 14. Maximum Rated Forward Biased Safe Operating Area for NDD03N40Z R(t), EFFECTIVE TRANSIENT THERMAL RESPONSE (°C/W) 100 Duty Cycle = 0.5 0.20 10 0.10 0.05 RqJA steady state = 62°C/W 0.02 1 0.01 0.1 Single Pulse 0.01 1E−06 1E−05 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 1E+02 1E+03 t, TIME (s) Figure 15. Thermal Impedance (Junction−to−Ambient) for NDT03N40Z R(t), EFFECTIVE TRANSIENT THERMAL RESPONSE (°C/W) 10 Duty Cycle = 0.5 RqJC steady state = 3.4°C/W 1 0.20 0.10 0.05 0.02 0.1 0.01 Single Pulse 0.01 1E−06 1E−05 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 t, TIME (s) Figure 16. Thermal Impedance (Junction−to−Case) for NDD03N40Z http://onsemi.com 6 1E+02 1E+03 NDD03N40Z, NDT03N40Z PACKAGE DIMENSIONS SOT−223 (TO−261) CASE 318E−04 ISSUE N NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCH. D b1 DIM A A1 b b1 c D E e e1 L L1 HE 4 HE E 1 2 3 b e1 e 0.08 (0003) A1 q C q A L STYLE 3: PIN 1. 2. 3. 4. L1 MIN 1.50 0.02 0.60 2.90 0.24 6.30 3.30 2.20 0.85 0.20 1.50 6.70 0° GATE DRAIN SOURCE DRAIN SOLDERING FOOTPRINT 3.8 0.15 2.0 0.079 2.3 0.091 2.3 0.091 6.3 0.248 2.0 0.079 1.5 0.059 SCALE 6:1 http://onsemi.com 7 MILLIMETERS NOM MAX 1.63 1.75 0.06 0.10 0.75 0.89 3.06 3.20 0.29 0.35 6.50 6.70 3.50 3.70 2.30 2.40 0.94 1.05 −−− −−− 1.75 2.00 7.00 7.30 10° − mm Ǔ ǒinches MIN 0.060 0.001 0.024 0.115 0.009 0.249 0.130 0.087 0.033 0.008 0.060 0.264 0° INCHES NOM 0.064 0.002 0.030 0.121 0.012 0.256 0.138 0.091 0.037 −−− 0.069 0.276 − MAX 0.068 0.004 0.035 0.126 0.014 0.263 0.145 0.094 0.041 −−− 0.078 0.287 10° NDD03N40Z, NDT03N40Z PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C ISSUE E A E C A b3 B c2 4 L3 D 1 2 Z Z H DETAIL A 3 L4 NOTE 7 b2 e b TOP VIEW c SIDE VIEW 0.005 (0.13) M BOTTOM VIEW NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. 7. OPTIONAL MOLD FEATURE. DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z BOTTOM VIEW ALTERNATE CONSTRUCTION C H L2 GAUGE PLANE C L L1 DETAIL A SEATING PLANE A1 ROTATED 905 CW STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 6.17 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 8 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.028 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.114 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.72 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.90 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− NDD03N40Z, NDT03N40Z PACKAGE DIMENSIONS IPAK CASE 369D ISSUE C C B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. E R 4 Z A S 1 2 3 −T− SEATING PLANE K J F H D G 3 PL 0.13 (0.005) M DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 −−− STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN T ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 http://onsemi.com 9 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NDD03N40Z/D