NDT3055

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Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. May 1998 NDT3055 N-Channel Enhancement Mode Field Effect Transistor General Description Features 4 A, 60 V. RDS(ON) = 0.100 Ω @ VGS = 10 V. These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as DC motor control and DC/DC conversion where fast switching, low in-line power loss, and resistance to transients are needed. SuperSOTTM-3 High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. SuperSOTTM-8 SuperSOTTM-6 SOIC-16 SOT-223 D D D SO-8 D S S D G G SOT-223 D S SOT-223* G G S (J23Z) Absolute Maximum Ratings TA = 25oC unless otherwise noted Symbol Parameter VDSS Drain-Source Voltage VGSS Gate-Source Voltage - Continuous ID Maximum Drain Current - Continuous (Note 1a) - Pulsed PD Maximum Power Dissipation Units 60 V ±20 V 4 A 25 (Note 1a) 3 (Note 1b) 1.3 (Note 1c) TJ,TSTG NDT3055 Operating and Storage Temperature Range W 1.1 -65 to 150 °C THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 42 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 12 °C/W * Order option J23Z for cropped center drain lead. © 1998 Fairchild Semiconductor Corporation NDT3055 Rev.B Electrical Characteristics (TA = 25 OC unless otherwise noted ) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 60 ∆BVDSS/∆TJ Breakdown Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 C IDSS Zero Gate Voltage Drain Current VDS = 48 V, VGS = 0 V IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS = 0 V o V 63 TJ =125°C ON CHARACTERISTICS VGS(th) mV/ C 10 µA 100 µA 100 nA -100 nA V (Note 2) Gate Threshold Voltage VDS = VGS, ID = 250 µA TJ =125°C RDS(ON) o Static Drain-Source On-Resistance 2 3 4 1.5 2.4 3 VGS = 10 V, ID = 4 A TJ =125°C ID(ON) On-State Drain Current VGS = 10 V, VDS = 10 V gFS Forward Transconductance VDS = 15 V, ID = 4 A 0.084 0.1 0.14 0.18 15 Ω A 6 S 250 pF 100 pF 30 pF DYNAMIC CHARACTERISTICS Input Capacitance Ciss Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 30 V, VGS = 0 V, f = 1.0 MHz SWITCHING CHARACTERISTICS (Note 2) tD(on) Turn - On Delay Time tr Turn - On Rise Time tD(off) tf 10 25 ns 18 50 ns Turn - Off Delay Time 37 65 ns Turn - Off Fall Time 30 60 ns 9 15 nC Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 25 V, ID = 1.2 A, VGS = 10 V, RGEN = 50 Ω VDS = 40 V, ID = 4 A, VGS = 10 V 2.3 nC 2.6 nC DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2.5 A 0.85 (Note 2) 2.5 A 1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. Typical RθJA using the board layouts shown below on FR-4 PCB in a still air environment: a. 42oC/W when mounted on a 1 in2 pad of b. 95oC/W when mounted on a 2oz Cu. pad of 2oz Cu. 0.066 in2 c. 110oC/W when mounted on a 0.00123 in2 pad of 2oz Cu. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% NDT3055 Rev.B Typical Electrical Characteristics 3 VGS =10V 8.0V 12 R DS(ON), NORMALIZED 7.0V 9 6.0V 6 5.5V 5.0V 3 4.5V 0 0 1 2 3 4 DRAIN-SOURCE ON-RESISTANCE I D , DRAIN-SOURCE CURRENT (A) 15 VGS = 5.5V 2.5 6.5V 2 7.0V 8.0V 1.5 10V 1 0.5 5 6.0V 0 4 VDS , DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. R DS(ON), ON-RESISTANCE (OHM) 1.2 0.8 20 I D = 2A 0.3 0.2 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 150 10 VDS = 10V TA = 125°C 0.1 TA = 25°C 0 -25 4 6 10 8 6 4 2 0 VGS = 0V 1 8 TA = 125°C 0.1 25°C 0.01 -55°C 0.001 0.0001 Figure 5. Transfer Characteristics. 10 Figure 4. On-Resistance Variation with Gate-to- Source Voltage. TJ = -55°C 25°C 125°C 4 6 VGS , GATE TO SOURCE VOLTAGE (V) 8 VGS , GATE TO SOURCE VOLTAGE (V) IS , REVERSE DRAIN CURRENT (A) R DS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.6 Figure 3. On-Resistance Variation with Temperature. I D , DRAIN CURRENT (A) 16 0.4 ID = 4A VGS =10V 2 12 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 2 0.4 -50 8 I D , DRAIN CURRENT (A) 0 0.2 0.4 0.6 0.8 1 1.2 VSD , BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Current and Temperature. NDT3055 Rev.B 1000 15 I D = 4A VDS = 10V 500 20V 40V 12 CAPACITANCE (pF) V GS , GATE-SOURCE VOLTAGE (V) Typical Electrical Characteristics (continued) 9 6 3 Ciss 200 Coss 100 50 Crss f = 1 MHz VGS = 0V 20 0 0 3 6 9 12 15 10 0.1 Q g , GATE CHARGE (nC) 0.3 1 4 10 30 60 V DS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 80 10 1m 3 10m 10 1 1s 10 s DC 0.3 0.1 0.03 0.01 0.1 VGS = 10V SINGLE PULSE R θJA = 110o C/W TA = 25°C 0.2 0.5 0m 0u SINGLE PULSE RθJA =110°C/W TA = 25°C s s 60 POWER (W) IT LIM N) S(O RD 10 s s 40 20 1 2 5 10 30 0 0.001 60 100 0.01 VDS , DRAIN-SOURCE VOLTAGE (V) 0.1 1 10 100 300 SINGLE PULSE TIME (SEC) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE ID , DRAIN CURRENT (A) 50 Figure 10. Single Pulse Maximum Power Dissipation. 1 0.5 D = 0.5 0.2 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 R θJA (t) = r(t) * R θJA R θJA = 110 °C/W P(pk) 0.01 t1 0.005 Single Pulse 0.002 0.001 0.0001 t2 TJ - TA = P * R JA (t) θ Duty Cycle, D = t1 / t 2 0.001 0.01 0.1 1 10 100 300 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. NDT3055 Rev.B 6.70 6.20 0.10 B C B 3.10 2.90 3.25 4 1.90 A 3.70 3.30 1 6.10 1.90 3 0.84 0.60 2.30 2.30 0.95 4.60 0.10 C B LAND PATTERN RECOMMENDATION SEE DETAIL A 1.80 MAX C 0.08 C 0.10 0.00 10° 5° GAGE PLANE R0.15±0.05 R0.15±0.05 10° TYP 0° 0.25 SEATING PLANE 10° 5° 0.60 MIN 1.70 DETAIL A SCALE: 2:1 0.35 0.20 7.30 6.70 NOTES: UNLESS OTHERWISE SPECIFIED A) DRAWING BASED ON JEDEC REGISTRATION TO-261C, VARIATION AA. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH. MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM. D) DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2009. E) LANDPATTERN NAME: SOT230P700X180-4BN F) DRAWING FILENAME: MKT-MA04AREV3 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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