NE570
Compandor
The NE570 is a versatile low cost dual gain control circuit in which
either channel may be used as a dynamic range compressor or
expandor. Each channel has a full−wave rectifier to detect the average
value of the signal, a linerarized temperature−compensated variable
gain cell, and an operational amplifier.
The NE570 is well suited for use in cellular radio and radio
communications systems, modems, telephone, and satellite
broadcast/receive audio systems.
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MARKING
DIAGRAM
Features
•
•
•
•
•
•
•
Complete Compressor and Expandor in One IC
Temperature Compensated
Greater than 110 dB Dynamic Range
Operates Down to 6.0 VDC
System Levels Adjustable with External Components
Distortion may be Trimmed Out
Pb−Free Packages are Available*
16
NE570D
AWLYYWWG
1
SOIC−16 WB
D SUFFIX
CASE 751G
Applications
•
•
•
•
•
•
•
Cellular Radio
Telephone Trunk Comandor
High Level Limiter
Low Level Expandor − Noise Gate
Dynamic Noise Reduction Systems
Voltage−Controlled Amplifier
Dynamic Filters
A
WL
YY
WW
G
RECT_CAP_1
1
16
RECT_CAP_2
RECT_IN_1
2
15
RECT_IN_2
DG_CELL_IN_1
3
14
DG_CELL_IN_2
°C
GND
4
13
VCC
150
°C
INV_IN_1
5
12
INV_IN_2
400
mW
RES_R3_1
6
11
RES_R3_2
°C/W
OUTPUT_1
7
10
OUTPUT_2
THD_TRIM_1
8
9
THD_TRIM_2
Symbol
Value
Unit
VCC
24
VDC
Operating Ambient Temperature Range
TA
0 to +70
Operating Junction Temperature
TJ
Power Dissipation
PD
Maximum Operating Voltage
Thermal Resistance, Junction−to−Ambient
105
RqJA
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THD TRIM
DG CELL IN
RECT IN
R2 20 kW
R1 10 kW
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
MAXIMUM RATINGS
Rating
1
Plastic Small Outline Package;
16 Leads; Body Width 7.5 mm
VARIABLE
GAIN
R3
INVERTER IN
R3
20 kW
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
−
OUTPUT
VREF
R4
1.8
V
30 kW
+
RECTIFIER
RECT CAP
Figure 1. Block Diagram
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 4
1
Publication Order Number:
NE570/D
NE570
PIN FUNCTION DESCRIPTION
Pin
Symbol
1
RECT CAP 1
2
RECT IN 1
3
DG CELL IN 1
Description
External Capacitor Pinout for Rectifier 1
Rectifier 1 Input
Variable Gain Cell 1 Input
4
GND
5
INV. IN 1
Ground
6
RES. R3 1
R3 Pinout 1
7
OUTPUT 1
Output 1
8
THD TRIM 1
Total Harmonic Distortion Trim 1
9
THD TRIM 2
Total Harmonic Distortion Trim 2
10
OUTPUT 2
Output 2
11
RES. R3 2
R3 Pinout 2
12
INV. IN 2
13
VCC
14
DG CELL IN 2
15
RECT IN 2
16
RECT CAP 2
Inverted Input 1
Inverted Input 2
Positive Power Supply
Variable Gain Cell 2 Input
Rectifier 2 Input
External Capacitor Pinout for Rectifier 2
ELECTRICAL CHARACTERISTICS VCC = +15 V, TA = 25 °C; unless otherwise stated.
Characteristic
Test Conditions
Supply Voltage
Supply Current
No Signal
Output Current Capability
Min
Typ
Max
Unit
VCC
6.0
−
24
V
ICC
−
4.3
4.8
mA
IOUT
±20
−
−
mA
SR
−
±0.5
−
V/ms
Untrimmed
−
0.3
1.0
%
Trimmed
−
0.05
−
%
−
±5
±15
%
1.7
1.8
1.9
V
Output Slew Rate
Gain Cell Distortion (Note 1)
Symbol
Resistor Tolerance
Internal Reference Voltage
Output DC Shift (Note 2)
Untrimmed
−
±90
±150
mV
Expandor Output Noise
No signal, 15 Hz to 20 kHz
(Note 3)
−
20
45
mV
−1.0
0
+1.0
dBm
±0.1
±0.2
dB
Unity Gain Level (Note 4)
Gain Change (Notes 1 and 5)
TA = 0°C to +70°C
−
Reference Drift (Note 5)
TA = 0°C to +70°C
−
±5.0
±10
mV
Resistor Drift (Note 5)
TA = 0°C to +70°C
−
+8.0, −5.0
−
%
Rectifier Input VCC = +6.0 V
V2 = +6.0 dBm, V1 = 0 dB
V2 = −30 dBm, V1 = 0 dB
−
−
±0.2
+0.2
−
−0.5, +1.0
dB
dB
−
60
−
dB
Tracking Error (measured relative to value at unity gain)
equals [VO − VO (unity gain)] dB − V2 dBm
Channel Separation
1.
2.
3.
4.
5.
Measured at 0 dBm, 1.0 kHz.
Expandor AC input change from no signal to 0 dBm.
Input to V1 and V2 grounded.
0 dB = 775 mVRMS.
Relative to value at TA = 25°C.
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2
NE570
CIRCUIT DESCRIPTION
The NE570 compandor building blocks, as shown in the
block diagram, are a full−wave rectifier, a variable gain cell,
an operational amplifier and a bias system. The arrangement
of these blocks in the IC result in a circuit which can perform
well with few external components, yet can be adapted to
many diverse applications.
The full−wave rectifier rectifies the input current which
flows from the rectifier input, to an internal summing node
which is biased at VREF. The rectified current is averaged on
an external filter capacitor tied to the CRECT terminal, and
the average value of the input current controls the gain of the
variable gain cell. The gain will thus be proportional to the
average value of the input signal for capacitively−coupled
voltage inputs as shown in the following equation. Note that
for capacitively−coupled inputs there is no offset voltage
capable of producing a gain error. The only error will come
from the bias current of the rectifier (supplied internally)
which is less than 0.1 mA.
GT
distortion. The only distortion which remains is even
harmonics, and they exist only because of internal offset
voltages. The THD trim terminal provides a means for
nulling the internal offsets for low distortion operation.
The operational amplifier (which is internally
compensated) has the non−inverting input tied to VREF, and
the inverting input connected to the DG cell output as well
as brought out externally. A resistor, R3, is brought out from
the summing node and allows compressor or expander gain
to be determined only by internal components.
The output stage is capable of ±20 mA output current.
This allows a +13 dBm (3.5 VRMS) output into a 300 W load
which, with a series resistor and proper transformer, can
result in +13 dBm with a 600 W output impedance.
A bandgap reference provides the reference voltage for all
summing nodes, a regulated supply voltage for the rectifier
and DG cell, and a bias current for the DG cell. The low
tempco of this type of reference provides very stable biasing
over a wide temperature range.
The typical performance characteristics illustration
shows the basic input−output transfer curve for basic
compressor or expander circuits.
|V IN * V REF | avg
R1
GT
COMPRESSOR INPUT LEVEL OR EXPANDOR OUTPUT LEVEL (dBm)
or
| V IN | avg
R1
The speed with which gain changes to follow changes in
input signal levels is determined by the rectifier filter
capacitor. A small capacitor will yield rapid response but
will not fully filter low frequency signals. Any ripple on the
gain control signal will modulate the signal passing through
the variable gain cell. In an expander or compressor
application, this would lead to third harmonic distortion, so
there is a trade−off to be made between fast attack and decay
times and distortion. For step changes in amplitude, the
change in gain with time is shown by this equation.
G(t) + (G initial * G final) e
t + 10kW
*t
t
) G final
C RECT
The variable gain cell is a current−in, current−out device
with the ratio IOUT/IIN controlled by the rectifier. IIN is the
current which flows from the DG input to an internal
summing node biased at VREF. The following equation
applies for capacitively−coupled inputs. The output current,
IOUT, is fed to the summing node of the op amp.
I IN +
V IN * V REF
V
+ IN
R2
R2
+20
+10
0
−10
−20
−30
−40
−50
−60
−70
−80
−40 −30 −20 −10
0 +10
COMPRESSOR OUTPUT LEVEL
OR
EXPANDOR INPUT LEVEL (dBm)
Figure 2. Basic Input−Output Transfer Curve
A compensation scheme built into the DG cell
compensates for temperature and cancels out odd harmonic
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3
NE570
VCC = 15 V
0.1 mF
10 mF
13
6, 11
20 kW
V1
3, 14
20 kW
DG
7, 10
−
+
2.2 mF
VO
VREF
2, 15
10 kW
30 kW
V2
2.2 mF
4
5, 12
1, 16
2.2 mF
8.2 kW
8, 9
200 pF
Figure 3. Typical Test Circuit
INTRODUCTION
Much interest has been expressed in high performance
electronic gain control circuits. For non−critical applications,
an integrated circuit operational transconductance amplifier
can be used, but when high−performance is required, one has
to resort to complex discrete circuitry with many expensive,
well−matched components. This paper describes an
inexpensive integrated circuit, the NE570 Compandor, which
offers a pair of high performance gain control circuits
featuring low distortion (