NFA41560R42

DATA SHEET www.onsemi.com Motion SPM[ 45 Series NFA41560R42 General Description NFA41560R42 is a Motion SPM 45 module providing a fully−featured, high−performance inverter output stage for AC Induction, BLDC, and PMSM motors. These modules integrate optimized gate drive of the built−in RC−IGBTs to minimize EMI and losses, while also providing multiple on−module protection features including under−voltage lockouts, over−current shutdown, thermal monitoring of drive IC, and fault reporting. The built−in, high−speed HVIC requires only a single supply voltage and translates the incoming logic−level gate inputs to the high−voltage, high−current drive signals required to properly drive the module’s internal IGBTs. Separate negative IGBT terminals are available for each phase to support the widest variety of control algorithms. Features • UL Certified No. E209204 (UL1557) • 600 V − 15 A 3−Phase RC−IGBT Inverter with Integral Gate Drivers • • • • • • • • • and Protection Low Thermal Resistance Using Ceramic Substrate Low−Loss, Short−Circuit Rated FS4 RC−IGBTs Built−In Bootstrap Diodes and Dedicated Vs Pins Simplify PCB Layout Built−In NTC Thermistor for Temperature Monitoring Separate Open−Emitter Pins from Low−Side RC−IGBTs for Three−Phase Current Sensing Single−Grounded Power Supply Isolation Rating: 2000 Vrms / Min. Remove Dummy Pin This is a Pb−Free Device 3D Package Drawing (Click to Activate 3D Content) SPMAA−C26 / 26LD, PDD STD CERAMIC TYPE, LONG LEAD DUAL FORM TYPE CASE MODFC MARKING DIAGRAM $Y NFA41560R42 XXX YWW $Y = onsemi Logo NFA41560R42 = Specific Device Code XXX = Trace Code Y = Year WW = Work Week Applications • Motion Control − Home Appliance / Industrial Motor ORDERING INFORMATION See detailed ordering and shipping information on page 14 of this data sheet. Related Resources • AN−9084 − Smart Power Module, Motion SPM [ 45 H V3 Series • • • User’s Guide AN−9072 − Smart Power Module Motion SPM [ in SPM45H Thermal Performance Information AN−9071 − Smart Power Module Motion SPM [ in SPM45H Mounting Guidance AN−9760 − PCB Design Guidance for SPM [ © Semiconductor Components Industries, LLC, 2021 September, 2023 − Rev. 1 1 Publication Order Number: NFA41560R42/D NFA41560R42 • For inverter low−side IGBTs: gate drive circuit, Integrated Power Functions • 600 V − 15 A IGBT inverter for three−phase DC / AC power conversion (please refer to Figure 2) Integrated Drive, Protection, and System Control Functions • • For inverter high−side IGBTs: gate drive circuit, • high−voltage isolated high−speed level shifting control circuit Under−Voltage Lock−Out Protection (UVLO) NOTE: Available bootstrap circuit example is given in Figure 13. Short−Circuit Protection (SCP) control supply circuit Under−Voltage Lock−Out Protection (UVLO) Fault signaling: corresponding to UVLO (low−side supply) and SC faults Input interface: active−HIGH interface, works with 3.3 / 5 V logic, Schmitt−trigger input PIN CONFIGURATION VB(U)(26) TH1(1) VS(U)(25) TH2(2) VB(V)(24) VS(V)(23) P(3) VB(W)(22) VS(W)(21) U(4) HIN(U)(20) Case Temperature (Tc) Detecting Point HIN(V)(19) HIN(W)(18) VDD(H)(17) V(5) VDD(L)(16) VSS(15) LIN(U)(14) LIN(V)(13) W(6) NU(7) LIN(W)(12) VFO(11) NV(8) ITRIP(10) NW(9) Figure 1. Top View www.onsemi.com 2 NFA41560R42 PIN DESCRIPTION Pin No. Pin Name Description 1 TH1 Thermistor Bias Voltage 2 TH2 Series Resistor for the Use of Thermistor (Temperature Detection) 3 P 4 U Output for U−Phase 5 V Output for V−Phase 6 W Output for W−Phase 7 NU Negative DC−Link Input for U−Phase 8 NV Negative DC−Link Input for V−Phase 9 NW Negative DC−Link Input for W−Phase 10 ITRIP Input for Current Protection 11 VFO Fault Output 12 LIN(W) Signal Input for Low−Side W−Phase 13 LIN(V) Signal Input for Low−Side V−Phase 14 LIN(U) Signal Input for Low−Side U−Phase 15 VSS Positive DC−Link Input Common Supply Ground 16 VDD(L) Low−Side Common Bias Voltage for IC and IGBTs Driving 17 VDD(H) High−Side Common Bias Voltage for IC and IGBTs Driving 18 HIN(W) Signal Input for High−Side W−Phase 19 HIN(V) Signal Input for High−Side V−Phase 20 HIN(U) Signal Input for High−Side U−Phase 21 VS(W) High−Side Bias Voltage Ground for W−Phase IGBT Driving 22 VB(W) High−Side Bias Voltage for W−Phase IGBT Driving 23 VS(V) High−Side Bias Voltage Ground for V−Phase IGBT Driving 24 VB(V) High−Side Bias Voltage for V−Phase IGBT Driving 25 VS(U) High−Side Bias Voltage Ground for U−Phase IGBT Driving 26 VB(U) High−Side Bias Voltage for U−Phase IGBT Driving www.onsemi.com 3 NFA41560R42 Internal Equivalent Circuit and Input/Output Pins TH1 (1) Thermistor (26) VB(U) (25) VS(U) (24) VB(V) (23) VS(V) (22) VB(W) (21) VS(W) (20) HIN(U) (19) HIN(V) (18) HIN(W) (17) VDD(H) P (3) UVB UVS VVB (15) VSS (14) LIN(U) (13) LIN(V) (12) LIN(W) (11) VFO (10) ITRIP OUT(UH) UVS U (4) VVS WVB WVS HIN(U) OUT(VH) VVS V (5) HIN(V) HIN(W) VDD OUT(WH) VSS (16) VDD(L) TH2 (2) WVS W (6) VDD OUT(UL) VSS NU (7) LIN(U) LIN(V) LIN(W) OUT(VL) NV (8) VFO ITRIP OUT(WL) NW (9) NOTE: 1. Inverter high−side is composed of three RC−IGBTs and one control IC for each IGBT. 2. Inverter low−side is composed of three RC−IGBTs and one control IC for each IGBT. It has gate drive and protection functions. 3. Inverter power side is composed of four inverter DC−link input terminals and three inverter output terminals. Figure 2. Internal Block Diagram www.onsemi.com 4 NFA41560R42 ABSOLUTE MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted) Symbol Parameter Conditions Rating Unit P − NU, NV, NW 450 V P − NU, NV, NW 500 V 600 V A INVERTER PART VPN Supply Voltage VPN(surge) Supply Voltage (Surge) Vces ±Ic Collector − Emitter Voltage Each IGBT Collector Current Tc = 25°C 15 Each IGBT Collector Current (Peak) Tc = 25°C, Under 1 ms Pulse Width 30 A Pc Collector Dissipation Tc = 25°C Per One Chip (Note 4) 45 W Tj Operating Junction Temperature − 40~150 °C ±Icp CONTROL PART VDD Control Supply Voltage VDD(H), VDD(L) − VSS 20 V VBS High−Side Control Bias Voltage VB(U) − VS(U), VB(V) − VS(V), VB(W) − VS(W) 20 V VIN Input Signal Voltage HIN(U), HIN(V), HIN(W), LIN(U), LIN(V), LIN(W) − VSS −0.3~VDD + 0.3 V VFO Fault Output Supply Voltage VFO − VSS −0.3~VDD + 0.3 V IFO Fault Output Current Sink Current at VFO pin 1 mA Current−Sensing Input Voltage ITRIP − VSS −0.3~VDD + 0.3 V VITRIP BOOTSTRAP DIODE PART 600 V If Forward Current Tc = 25°C 0.5 A Ifp Forward Current (Peak) Tc = 25°C, Under 1 ms Pulse Width (Note 4) 2.0 A Tj Operating Junction Temperature −40~150 °C 400 V −40~125 °C −40~125 °C 2000 Vrms VRRM Maximum Repetitive Reverse Voltage TOTAL SYSTEM VPN(PROT) Self−Protection Supply Voltage Limit (Short−Circuit Protection Capability) Tc Module Case Operation Temperature Tstg Storage Temperature Viso Isolation Voltage VDD = VBS = 13.5~16.5 V Tj = 150°C, Vces < 600 V Non−Repetitive, < 2 ms See Figure 1 60 Hz, Sinusoidal, AC 1 minute, Connection Pins to Heat Sink Plate Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 4. These values had been made an acquisition by the calculation considered to design factor. ABSOLUTE MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted) Symbol Parameter Conditions Min Typ Max Unit Inverter IGBT Part (per 1/6 module) − − 2.75 °C/W Inverter FWDi Part (per 1/6 module) − − 4.2 °C/W THERMAL RESISTANCE Rth(j−c)Q Rth(j−c)F Junction to Case Thermal Resistance (Note 5) 5. For the measurement point of case temperature Tc, please refer to Figure 1. www.onsemi.com 5 NFA41560R42 ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted) Symbol Parameter Conditions Min Typ Max Unit INVERTER PART Collector−Emitter Saturation Voltage VDD = VBS = 15 V, IN = 5 V, Ic = 15 A, Tj = 25°C − 1.5 2.1 V FWDi Forward Voltage IN = 0 V, Ic = −15 A, Tj = 25°C − 1.75 2.35 V Switching Times VPN = 300 V, VDD(H) = VDD(L) = 15 V, Ic = 15 A, Tj = 25°C, IN = 0 ↔ 5 V, Inductive Load (Note 6) − 0.75 − ms − 0.12 − ms toff − 0.85 − ms tc(off) − 0.14 − ms − 0.13 − ms − 0.80 − ms − 0.15 − ms toff − 0.90 − ms tc(off) − 0.14 − ms trr − 0.18 − ms − − 1 mA VCE(sat) VF HS ton tc(on) trr LS VPN = 300 V, VDD(H) = VDD(L) = 15 V, Ic = 15 A, Tj = 25°C, IN = 0 ↔ 5 V, Inductive Load (Note 6) ton tc(on) Ices Collector−Emitter Leakage Current Vce = Vces Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 6. ton and toff include the propagation delay time of the internal drive IC. tc(on) and tc(off) are the switching time of IGBT itself under the given gate driving condition internally. For the detailed information, please see Figure 3. 100% Ic 100% Ic trr Vce Ic Ic VIN VIN ton toff 10% Ic VIN(on) Vce tc(on) 90% Ic tc(off) VIN(off) 10% Vce (a) Turn−on 10% Vce (b) Turn−off Figure 3. Switching Time Definitions www.onsemi.com 6 10% Ic INDUCTIVE LOAD, VPN = 300 V, VDD = 15 V, Tj = 25°C 1000 IGBT Turn−on, Eon IGBT Turn−off, Eoff 800 FRD Turn−off, Erec Esw, SWITCHING LOSS (mJ) Esw, SWITCHING LOSS (mJ) NFA41560R42 600 400 200 0 0 INDUCTIVE LOAD, VPN = 300 V, VDD = 15 V, Tj = 150°C 1000 IGBT Turn−on, Eon IGBT Turn−off, Eoff 800 FRD Turn−off, Erec 600 400 200 0 5 10 15 Ic, COLLECTOR CURRENT (A) 0 5 10 15 Ic, COLLECTOR CURRENT (A) Figure 4. Switching Loss Characteristics (Typical) ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted) Symbol Parameter Conditions Min Typ Max Unit VDD(H) = 15 V, HIN = 0 V, VDD(H) − VSS − − 0.10 mA VDD(L) = 15 V, LIN = 0 V, VDD(L) − VSS − − 2.65 mA VDD(H) = 15 V, fPWM = 20 kHz, Duty = 50%, Applied to One PWM Signal Input for High−Side − − 0.15 mA VDD(L) = 15 V, fPWM = 20 kHz, Duty = 50%, Applied to One PWM Signal Input for Low−Side − − 4.00 mA CONTROL PART IQDDH IQDDL IPDDH Quiescent VDD Supply Current Operating VDD Supply Current IPDDL IQBS Quiescent VBS Supply Current VDD(H) = 15 V, HIN = 0 V, VB(U) − VS(U), VB(V) − VS(V), VB(W) − VS(W) − − 0.30 mA IPBS Operating VBS Supply Current VDD(H) = 15 V, fPWM = 20 kHz, Duty = 50%, Applied to One PWM Signal Input for High−Side − − 2.00 mA VFOH Fault Output Voltage VDD = 0 V, ITRIP = 0 V, VFO Circuit: 10 kW to 5 V Pull−up 4.5 − − V VDD = 0 V, ITRIP = 1 V, VFO Circuit: 10 kW to 5 V Pull−up − − 0.5 V VFOL VSC(ref) Short Circuit Trip Level VDD = 15 V, ITRIP − VSS 0.45 0.50 0.55 V UVDDD Supply Circuit Under−Voltage Protection Detection Level 10.5 − 13.0 V Reset Level 11.0 − 13.5 V Supply Circuit Under−Voltage Protection Detection Level 10.0 − 12.5 V Reset Level 10.5 − 13.0 V 30 − − ms − − 2.6 V 0.8 − − V UVDDR UVBSD UVBSR tFOD Fault−Output Pulse Width VIN(ON) ON Threshold Voltage VIN(OFF) OFF Threshold Voltage RTH Resistance of Thermistor HIN − VSS, LIN − VSS @ TTH = 25°C − 47 − kW @ TTH = 100°C − 2.9 − kW Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 7. Short−circuit current protection is functioning only at the low−sides. 8. TTH is the temperature of thermistor itself. To know case temperature (Tc), please make the experiment considering your application. www.onsemi.com 7 NFA41560R42 R−T Curve 600 500 20 450 16 Resistance (kW) Resistance (kW) 550 400 350 300 250 R−T Curve in 50°C~125°C 12 8 4 200 0 50 150 60 70 80 90 100 110 120 Temperature (°C) 100 50 0 −20 −10 0 10 20 30 40 50 60 70 80 90 100 110 120 Temperature TTH (°C) Figure 5. R−T Curve of The Built−In Thermistor ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted) Symbol Parameter Conditions Min Typ Max Unit − 2.5 − V − 80 − ns BOOTSTRAP DIODE PART VF Forward Voltage If = 0.1 A, Tc = 25°C trr Reverse−Recovery Time If = 0.1 A, dlf/dt = 50 A/ms, Tc = 25°C Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. Built−In Bootstrap Diode VF−If Characteristic 1.0 0.9 0.8 0.7 If [A] 0.6 0.5 0.4 0.3 0.2 0.1 0.0 Tc = 25°C 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 VF [V] NOTE: 9. Built−in bootstrap diode includes around 15 W resistance characteristic. Figure 6. Built−In Bootstrap Diode Characteristics (Typ.) www.onsemi.com 8 NFA41560R42 RECOMMENDED OPERATING CONDITIONS Symbol Parameter Conditions Min Typ Max Unit − 300 400 V VDD(H), VDD(L) − VSS 13.5 15.0 16.5 V VB(U) − VS(U), VB(V) − VS(V), VB(W) − VS(W) 13.0 15.0 18.5 V −1 − 1 V/ms VPN Supply Voltage P − NU, NV, NW VDD Control Supply Voltage VBS High−Side Bias Voltage dVDD/dt, dVBS/dt Control Supply Variation tdead Blanking Time for Preventing Arm−Short For each input signal 1 − − ms fPWM PWM Input Signal −40°C ≤ Tc ≤ 125°C, −40°C ≤ Tj ≤ 150°C − − 20 kHz VSEN Voltage for Current Sensing Applied between NU, NV, NW − VSS (Including Surge−Voltage) −4 − 4 V PWIN(ON) Minimum Input Pulse Width VDD = VBS = 15 V, Ic ≤ 30 A, Wiring Inductance between NU, NV, NW and DC Link N < 10 nH (Note 10) 1.2 − − ms 1.2 − − −40 − 150 PWIN(OFF) Tj Junction Temperature °C Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 10. This product might not make response if input pulse width is less than the recommended value. www.onsemi.com 9 NFA41560R42 MECHANICAL CHARACTERISTICS AND RATINGS Parameter Conditions Device Flatness See Figure 7 Mounting Torque Mounting Screw: M3 See Figure 8 Min Typ Max Unit 0 − +120 mm Recommended 0.7 N · m 0.6 0.7 0.8 N·m Recommended 7.1 kg · cm 6.2 7.1 8.1 kg · cm − 11.00 − g Weight Figure 7. Flatness Measurement Position NOTE: 11. Do not make over torque when mounting screws. Much mounting torque may cause ceramic cracks, as well as bolts and Al heat−sink destruction. 12. Avoid one−sided tightening stress. Figure 8 shows the recommended torque order for mounting screws. Uneven mounting can cause the ceramic substrate of package to be damaged. The pre−screwing torque is set to 20~30% of maximum torque rating. Figure 8. Mounting Screws Torque Order www.onsemi.com 10 NFA41560R42 Time Charts of Protective Function Input Signal Protection Circuit State RESET RESET SET UVDDR a1 Control Supply Voltage UVDDD a2 a6 a3 a7 a4 Output Current a5 Fault Output Signal a1: Control supply voltage rises: After the voltage rises UVDDR, the circuits start to operate when next input is applied. a2: Normal operation: IGBT ON and carrying current. a3: Under voltage detection (UVDDD). a4: IGBT OFF in spite of control input condition. a5: Fault output operation starts with a fixed pulse width. a6: Under voltage reset (UVDDR). a7: Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH. Figure 9. Under−Voltage Protection (Low−Side) Input Signal Protection Circuit State SET RESET RESET UVBSR Control Supply Voltage b1 UVBSD b3 b5 b6 b2 b4 Output Current High−level (no fault output) Fault Output Signal b1: Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied. b2: Normal operation: IGBT ON and carrying current. b3: Under voltage detection (UVBSD). b4: IGBT OFF in spite of control input condition, but there is no fault output signal. b5: Under voltage reset (UVBSR). b6: Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH. Figure 10. Under−Voltage Protection (High−side) www.onsemi.com 11 NFA41560R42 Lower Arms Control Input c6 Protection Circuit State SET Internal IGBT Gate − Emitter Voltage c3 c7 RESET c4 c2 SC c1 c8 Output Current SC Reference Voltage Sensing Voltage of Shunt Resistance c5 Fault Output Signal CR Circuit Time Constant Delay (with the external sense resistance and RC filter connection) c1: Normal operation: IGBT ON and carrying current. c2: Short circuit current detection (SC trigger). c3: All low−side IGBT’s gate are hard interrupted. c4: All low−side IGBT’s turn OFF. c5: Fault output operation starts with a fixed pulse width. c6: Input HIGH: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON. c7: Fault output operation finishes, but IGBT doesn’t turn on until triggering next signal from LOW to HIGH. c8: Normal operation: IGBT ON and carrying current. Figure 11. Short−Circuit Protection (Low−Side Operation Only) +5 V (for MCU or Control power) RPF = 10 kW SPM HIN(U), HIN(V), HIN(W) LIN(U), LIN(V), LIN(W) MCU VFO VSS NOTE: 13. RC coupling at each input might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s printed circuit board. The input signal section of the Motion SPM 45 product integrates 5 kW (typ.) pull−down resistor. Therefore, when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal. Figure 12. Recommended MCU I/O Interface Circuit www.onsemi.com 12 NFA41560R42 HVIC (26) VB(U) C3 C4 R1 (25) VS(U) VS (U) (20) HIN(U) Gating UH (24) VB(V) C4 C3 R1 C4 M C U R1 Gating WH C1 (21) VS(W) (18) HIN(W) 15 V line C1 (17) VDD(H) C2 C1 C4 (15) VSS C2 VS (V) M V ( 5) VS (W) HIN(W) VDD C6 OUT(WH) VDC W (6) VS (W) LVIC VDD C4 NU (7) R1 (11) VFO Fault Gating WL OUT(VH) OUT(UL) R2 Gating VL U (4) VS S (16) VDD(L) Gating UL VS (U) VB (W) 5V line C1 OUT(UH) VS (V) HIN(V) (22) VB(W) C3 HIN(U) VB (V) (23) VS(V) (19) HIN(V) Gating VH P (3) VB (U) R3 A VFO C1 R1 (14) LIN(U) R1 (13) LIN(V) R1 OUT(VL) LI N(U) (12) LIN(W) C5 (10) ITRIP C1 C1 C1 D B R4 R5 NV (8) LI N(V) LI N(W) VS S R3 Shunt Resistor OUT(WL) ITRIP NW (9) E Power GND Line R3 (1) TH1 (2) TH2 THERMISTOR Control GND Line C Input Signal for Short−Circuit Protection Temp. Monitoring U-Phase Current V-Phase Current W-Phase Current NOTE: 14. To avoid malfunction, the wiring of each input should be as short as possible (less than 2 − 3 cm). 15. VFO output is open−drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO up to 1 mA. 16. Input signal is active−HIGH type. There is a 5kW resistor inside the IC to pull down each input signal line to GND. RC coupling circuits is recommended for the prevention of input signal oscillation. R1C1 time constant should be selected in the range 50~150 ns (recommended R1 = 100 W, C1 = 1 nF). 17. Each wiring pattern inductance of point A should be minimized (recommend less than 10 nH). Use the shunt resistor R3 of surface mounted (SMD) type to reduce wiring inductance. To prevent malfunction, wiring of point E should be connected to the terminal of the shunt resistor R3 as close as possible. 18. To insert the shunt resistor to measure each phase current at NU, NV, NW terminal, it makes to change the trip level ISC about the short−circuit current. 19. To prevent errors of the protection function, the wiring of point B, C, and D should be as short as possible. 20. In the short−circuit protection circuit, please select the R5C5 time constant in the range 1.5~2 ms. Do enough evaluation on the real system because short−circuit protection time may vary wiring pattern layout and value of the R5C5 time constant. 21. Each capacitor should be mounted as close to the pins of the Motion SPM 45 product as possible. 22. To prevent surge destruction, the wiring between the smoothing capacitor C6 and the P & GND pins should be as short as possible. The use of a high−frequency non−inductive capacitor of around 0.1~0.22 mF between the P and GND pins is recommended. 23. Relays are used in almost every systems of electrical equipment in home appliances. In these cases, there should be sufficient distance between the MCU and the relays. 24. The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair of control supply terminals (recommended zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15 W). 25. C2 of around seven times larger than bootstrap capacitor C3 is recommended. 26. Please choose the electrolytic capacitor with good temperature characteristic in C3. Also, choose 0.1~0.2 mF R−category ceramic capacitors with good temperature and frequency characteristics in C4. Figure 13. Typical Application Circuit www.onsemi.com 13 NFA41560R42 ORDERING INFORMATION Device Device Marking Package Shipping NFA41560R42 NFA41560R42 SPMAA−C26 / 26LD, PDD STD CERAMIC TYPE, LONG LEAD DUAL FORM TYPE (Pb−Free) 12 Units / Rail SPM is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 14 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SPMAA−C26 / 26LD, PDD STD CERAMIC TYPE, LONG LEAD DUAL FORM TYPE CASE MODFC ISSUE O DATE 31 JAN 2017 DOCUMENT NUMBER: DESCRIPTION: 98AON13555G Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. SPMAA−C26 / 26LD, PDD STD CERAMIC TYPE, LONG LEAD DUAL PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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