NFAM2012L5BT

Intelligent Power Module (IPM) 1200 V, 20 A Advance Information NFAM2012L5BT The NFAM2012L5BT is a fully−integrated inverter power module consisting of an independent High side gate driver, LVIC, six IGBT’s and a temperature sensor (TSU by LVIC and NTC Thermistor), suitable for driving permanent magnet synchronous (PMSM) motors, brushless DC (BLDC) motors and AC asynchronous motors. The IGBT’s are configured in a three−phase bridge with separate emitter connections for the lower legs for maximum flexibility in the choice of control algorithm. The power stage has under−voltage lockout protection (UVP). Internal boost diodes are provided for high side gate boost drive. www.onsemi.com Features • • • • • • • • Three−phase 1200 V, 20 A IGBT Module with Independent Drivers Active Logic Interface Built−in Under−voltage Protection (UVP) Integrated Bootstrap Diodes and Resistors Separate Low−side IGBT Emitter Connections for Individual Current Sensing of Each Phase Temperature Sensor (TSU Output by LVIC or NTC Thermistor) UL Certification: *Applied This is a Pb−Free Device CASE MODGC MINI DIP39, 31.0x54.5 MARKING DIAGRAM NFAM2012L5BT ZZZATYWW Typical Application • • • • Industrial Drives Industrial Pumps Industrial Fans Industrial Automation RTH VTH P VS(U) VB(U) VDD(UH) HIN(U) VS(V) VB(V) VDD(VH) HIN(V) VS(W) VB(W) VDD(WH) HIN(W) VTS LIN(U) LIN(V) LIN(W) VFO CFOD CIN VSS VDD(L) High Side HVIC1 HS1 High Side HVIC2 HS2 High Side HVIC3 HS3 W V HS2 HS1 ORDERING INFORMATION HS3 Device LS1 Low Side LVIC with Protection U NFAM2012L5BT = Specific Device Code ZZZ = Assembly Lot Code A = Assembly Location T = Test Location Y = Year WW = Work Week Device marking is on package top side LS2 LS3 NFAM2012L5BT DIP39, 31.0x54.5 (Pb−Free) LS1 LS2 NV Shipping† (Qty / Packing) 90 / BOX †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. LS3 NU Package NW Figure 1. Application Schematic This document contains information on a new product. Specifications and information herein are subject to change without notice. © Semiconductor Components Industries, LLC, 2019 October, 2019 − Rev. P0 1 Publication Order Number: NFAM2012L5BT/D NFAM2012L5BT 5V line RTH (39) VB(U) (3) VTH (38) VS(U) (1) P (37) HIN (U) (6) VDD(UH) (4) HIN VDD VSS VB HOUT HVIC 1 VS CS + C1 U (36) VB(V) (9) VS(V) (7) HIN (V) (12) VDD(VH) (10) HIN VDD VSS VB HOUT HVIC 2 VS V (35) VB(W) (15) Motor VS(W) (13) MCU HIN (W) (18) VDD(WH) (16) VTS (20) LIN(U) (21) LIN(V) (22) LIN(W) (23) 5V line HIN VDD VSS VB HOUT HVIC 3 VS W (34) VTS LIN(U) OUT(U) NU (33) LIN(V) LIN(W) LVIC VFO (24) CFOD (25) CIN (26) 15V line VDD(L) (28) VSS (27) VFO OUT(V) NV (32) CFOD CIN VDD VSS OUT(W) NW (31) Signal for short circuit trip Figure 2. Application Schematic − Adjustable Option www.onsemi.com 2 Phase current NFAM2012L5BT RTH (39 * NTC Thermistor VTH (38) V S (U ) (1) P (37) VB (U) (3) VB VDD (UH ) (4) VDD HIN (U) (6) HIN HOUT HVIC 1 U (36) VS VSS V S (V ) (7) VB (V )(9) VDD (VH ) (10 ) HIN (V ) (12 ) VB VDD HIN HOUT HVIC 2 V (35 ) VS VSS V S(W ) (13 ) VB (W ) (15 ) VB VDD (WH ) (16 ) VDD HIN (W ) (18 ) HIN HOUT HVIC 3 V TS (20) LIN (U ) LIN (V ) (22 ) LIN (V) LIN (W ) (23 ) LIN (W) VFO (24 ) CFOD (25 ) OUT (U ) VTS LIN (U ) (21 ) VFO W (34) VS VSS NU (33 ) LVIC OUT (V) CFOD CIN (26 ) CIN VSS (27 ) VSS VDD (L) (28 ) VDD NV (32 ) OUT (W ) NW (31 ) Figure 3. Equivalent Block Diagram www.onsemi.com 3 NFAM2012L5BT Table 1. PIN FUNCTION DESCRIPTION Pin Name 1 VS(U) (2) − 3 VB(U) Description High−Side Bias Voltage GND for U Phase IGBT Driving Dummy High−Side Bias Voltage for U Phase IGBT Driving 4 VDD(UH) (5) − High−Side Bias Voltage for U Phase IC 6 HIN(U) Signal Input for High−Side U Phase 7 VS(V) High−Side Bias Voltage GND for V Phase IGBT Driving (8) − 9 VB(V) Dummy Dummy High−Side Bias Voltage for V Phase IGBT Driving 10 VDD(VH) (11) − High−Side Bias Voltage for V Phase IC 12 HIN(V) Signal Input for High−Side V Phase 13 VS(W) High−Side Bias Voltage GND for W Phase IGBT Driving (14) − 15 VB(W) Dummy Dummy High−Side Bias Voltage for W Phase IGBT Driving 16 VDD(WH) (17) − High−Side Bias Voltage for W Phase IC 18 HIN(W) (19) − 20 VTS 21 LIN(U) Signal Input for Low−Side U Phase 22 LIN(V) Signal Input for Low−Side V Phase 23 LIN(W) Signal Input for Low−Side W Phase 24 VFO 25 CFOD 26 CIN Input for Current Protection 27 VSS Low−Side Common Supply Ground Dummy Signal Input for High−Side W Phase Dummy Voltage Output for LVIC Temperature Sensing Unit Fault Output Capacitor for Fault Output Duration Selection 28 VDD(L) (29) − Low−Side Bias Voltage for IC and IGBTs Driving Dummy (30) − Dummy 31 NW Negative DC−Link Input for U Phase 32 NV Negative DC−Link Input for V Phase 33 NU Negative DC−Link Input for W Phase 34 W Output for U Phase 35 V Output for V Phase 36 U Output for W Phase 37 P Positive DC−Link Input 38 VTH Thermistor Bias Voltage (T) / Not connection 39 RTH Series Resister for Thermistor (Temperature Detection) *optional for T www.onsemi.com 4 NFAM2012L5BT Table 2. ABSOLUTE MAXIMUM RATINGS TC = 25°C (Notes 1) Symbol Rating Supply Voltage VPN Conditions Value Unit P − NU, NV, NW 900 V Supply Voltage (Surge) VPN(Surge) P − NU, NV, NW, (Note 2) 1000 V Self Protection Supply Voltage Limit (Short−Circuit Protection Capability VPN(PROT) VDD = VBS = 13.5 V ~ 16.5 V, Ti = 150°C, Vces < 1200 V, Non−Repetitive, < 2 us 800 V Vces 1200 V VRRM 1200 V ±Ic ±20 A Collector−Emitter Voltage Maximum Repetitive Revers Voltage Each IGBT Collector Current Each IGBT Collector Current (Peak) ±Icp Under 1 ms Pulse Width ±40 A Control Supply Voltage High−Side Control Bias Voltage VDD VDD(UH, VH, WH), VDD(L) − VSS −0.3 to 20 V VBS VB(U) − VS(U), VB(V) − VS(V), VB(W) − VS(W) −0.3 to 20 V Input Signal Voltage VIN HIN(U), HIN(V), HIN(W), LIN(U), LIN(V), LIN(W) − VSS −0.3 to VDD V Fault Output Supply Voltage VFO VFO − VSS −0.3 to VDD V IFO Sink Current at VFO pin Fault Output Current Current Sensing Input Voltage VCIN CIN − VSS 2 mA −0.3 to VDD V 125 W Corrector Dissipation Pc Operating Junction Temperature Tj −40 to +150 °C Tstg −40 to +125 °C Tc −40 to +125 °C 2500 V rms Storage Temperature Module Case Operation Temperature Isolation Voltage Viso Per One Chip 60 Hz, Sinusoidal, AC 1 minute, Connection Pins to Heat Sink Plate Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe Operating parameters. 2. This surge voltage developed by the switching operation due to the wiring inductance between P and NU, NV, NW terminal. Table 3. THERMAL CHARACTERISTICS Rating Junction to Case Thermal Resistance Symbol Conditions Min Typ Max Unit Rth(j−c)Q Inverter IGBT Part (per 1/6 Module) − − 1.0 °C/W Rth(j−c)F Inverter FRD Part (per 1/6 Module) − − 1.2 °C/W 3. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe Operating parameters. Table 4. RECOMMENDED OPERATING RANGES (Note 4) (continued) Rating Symbol Conditions Min Typ Max Unit − 600 800 V Supply Voltage VPN P − NU, NV, NW Gate Driver Supply Voltages VDD VDD(UH, VH, WH), VDD(L) − VSS 13.5 15 16.5 V VBS VB(U) − VS(U), VB(V) − VS(V), VB(W) − VS(W) 13.0 15 18.5 V dVDD / dt dVBS / dt −1 − 1 V/ms fPWM 1 20 kHz − ms Supply Voltage Variation PWM Frequency Dead Time DT Turn−off to Turn−on (external) www.onsemi.com 5 3 − NFAM2012L5BT Table 4. RECOMMENDED OPERATING RANGES (Note 4) (continued) Rating Allowable r.m.s. Current Allowable Input Pulse Width Symbol Io PWIN (on) PWIN (off) Package Mounting Torque Conditions Min Typ Max Unit fPWM = 5 kHz − − 18.1 A rms fPWM = 15 kHz − − 9.4 400 V ≤ VPN ≤ 800 V, 13.5 V ≤ VDD ≤ 16.5 V, 13.0 V ≤ VBS ≤ 18.5 V, −40°C ≤ Tc ≤ 150°C 2.0 − − 2.5 − − M3 Type Screw 0.6 0.7 0.9 VPN = 600 V, VDD = VBS = 15 V, P.F. = 0.8, Tc ≤ 125°C, Tj ≤ 150°C, (Note 5) ms Nm Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 4. Allowable r.m.s Current depends on the actual conditions. 5. Flatness tolerance of the heatsink should be within −50 mm to +100 mm. Table 5. ELECTRICAL CHARACTERISTICS (Tc = 25°C, VD = 15 V, unless otherwise noted) (Note 6) (continued) Parameter Test Conditions Symbol Min Typ Max Unit Ices − − 1 mA − − 10 mA − 1.85 2.5 V − 2.00 − V − 1.90 2.5 V − 1.70 − V ton 0.80 1.40 2.00 ms tc (on) − 0.30 0.60 ms toff − 1.90 2.70 ms tc (off) − 0.20 0.60 ms INVERTER SECTION Collector−Emitter Leakage Current Vce = Vces, Tj = 25°C Collector−Emitter Saturation Voltage VDD = VBS = 15 V, IN = 5 V Ic = 20 A, Tj = 25°C Vce = Vces, Tj = 150°C VCE(sat) VDD = VBS = 15 V, IN = 5 V Ic = 20 A, Tj = 150°C FWDi Forward Voltage VF IN = 0 V, If = 20 A, Tj = 25°C IN = 0 V, If = 20 A, Tj = 150°C High Side Low Side Switching Times Switching Times VPN = 600 V, VDD(H) = VDD(L) = 15 V Ic = 20 A, Tj = 25°C, IN = 0 ⇔ 5 V Inductive Load trr − 0.40 − ms ton 0.90 1.50 2.10 ms tc (on) − 0.30 0.60 ms toff − 2.00 2.80 ms tc (off) − 0.20 0.60 ms trr − 0.40 − ms VDD(UH) − VSS VDD(VH) − VSS VDD(WH) − VSS IQDDH − − 0.30 mA VDD(L) − VSS IQDDL − − 3.50 mA VDD(UH, VH, WH) = 15 V, fPWM = 20 kHz, Duty = 50%, Applied to one PWM Signal Input for High−Side VDD(UH) − VSS VDD(VH) − VSS VDD(WH) − VSS IPDDH − − 0.40 mA VDD(L) = 15 V, fPWM = 20 kHz, Duty = 50%, Applied to one PWM Signal Input for Low−Side VDD(L) − VSS IPDDL − − 9.00 mA VPN = 600 V, VDD(H) = VDD(L) = 15 V Ic = 20 A, Tj = 25°C, IN = 0 ⇔ 5 V Inductive Load DRIVER SECTION Quiescent VDD Supply Current VDD(UH,VH,WH) = 15 V, HIN(U,V,W) = 0 V VDD(L) = 15 V, LIN(U, V, W) = 0 V Operating VDD Supply Current www.onsemi.com 6 NFAM2012L5BT Table 5. ELECTRICAL CHARACTERISTICS (Tc = 25°C, VD = 15 V, unless otherwise noted) (Note 6) (continued) Parameter Test Conditions Symbol Min Typ Max Unit DRIVER SECTION Quiescent VBS Supply Current VBS = 15 V HIN(U, V, W) = 0 V VB(U) − VS(U) VB(V) − VS(V) VB(W) − VS(W) IQBS − − 0.30 mA Operating VBS Supply Current VDD = VBS = 15 V, fPWM = 20 kHz, Duty = 50%, Applied to one PWM Signal Input for High−Side VB(U) − VS(U) VB(V) − VS(V) VB(W) − VS(W) IPBS − − 8.00 mA ON Threshold Voltage HIN(U, V, W) − VSS, LIN(U, V, W) − VSS VIN(ON) − − 2.6 V VIN(OF) 0.8 − − V OFF Threshold Voltage Short Circuit Trip Level VDD = 15 V, CIN−VSS VCIN(ref) 0.46 0.48 0.50 V Supply Circuit Under−Voltage Protection Detection Level UVDDD 10.3 − 12.5 V Reset Level UVDDR 10.8 − 13.0 V Detection Level UVBSD 10.0 − 12.0 V Reset Level UVBSR 10.5 − 12.5 V Voltage Output for LVIC Temperature Sensing Unit VTS−VSS = 10 nF, Temp. = 25°C VTS (0.905) (1.030) (1.155) V Fault Output Voltage VDD = 0 V, CIN = 0 V, VFO Circuit: 10 kW to 5 V Pull−up VFOH 4.9 − − V VDD = 0 V, CIN = 1 V, VFO Circuit: 10 kW to 5 V Pull−up VFOL − − 0.95 V CFOD = 22 nF tFOD 1.6 2.4 − ms VF 3.4 4.6 5.8 V RBOOT 30 38 46 W Fault−Output Pulse Width BOOTSTRAP SECTION Bootstrap Diode Forward Current If = 0.1 A Built−in Limiting Resistance Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 6. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TJ = TA = 25_C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 7. The fault−out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation: tFOD = (TBD) x 106 x CFOD (s). 8. Values based on design and/or characterization. 4.0 VTS Output Voltage (V) 3.5 3.0 2.5 2.0 1.5 1.0 40 45 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 LVIC Temperature (°C) Figure 4. Temperature of LVIC versus VOT Characteristics www.onsemi.com 7 NFAM2012L5BT Table 6. THERMISTOR CHARACTERISTIC Parameter Symbol Condition Min Typ Max Unit Resistance R25 Tc = 25°C 46.530 47 47.47 kW Resistance R125 Tc = 125°C 1.344 1.406 1.471 kW B−Constant (25−50°C) − B 4009.5 4050 4090.5 K Temperature Range − − −40 − +125 °C Thermistor Resistance [kW] 10000 1000 min typ max 100 10 1 −40 −30 −20 −10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Case Temperature Figure 5. Thermistor Resistance versus Case Temperature www.onsemi.com 8 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS MINI DIP39, 31.0x54.5 CASE MODGC ISSUE A DATE 19 MAR 2019 GENERIC MARKING DIAGRAM* XXXXXXXXXXXXXXXXX ZZZATYWW XXXXX = Specific Device Code ZZZ = Assembly Lot Code AT = Assembly & Test Location Y = Year WW = Work Week DOCUMENT NUMBER: DESCRIPTION: 98AON91300G MINI DIP39, 31.0x54.5 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking. 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