NFAQ0860L36T

Intelligent Power Module (IPM) 600 V, 8 A NFAQ0860L36T The NFAQ0860L36T is a fully−integrated inverter power stage consisting of a high−voltage driver, six IGBT’s and a thermistor, suitable for driving permanent magnet synchronous motors (PMSM), brushless−DC (BLDC) motors and AC asynchronous motors. The IGBT’s are configured in a 3−phase bridge with separate emitter connections for the lower legs for maximum flexibility in the choice of control algorithm. The power stage has a full range of protection functions including cross−conduction protection, external shutdown and under−voltage lockout functions. An internal comparator and reference connected to the over−current protection circuit allows the designer to set the over−current protection level. www.onsemi.com Features • • • • • • • • • Three−phase 8 A / 600 V IGBT Module with Integrated Drivers Compact 29.6 mm x 18.2 mm Dual In−Line Package Built−in Under Voltage Protection Cross−conduction Protection ITRIP Input to Shut Down All IGBT’s Integrated Bootstrap Diodes and Resistors Thermistor for Substrate Temperature Measurement Shut Down Pin UL1557 Certification (File Number: E339285) DIP38 29.6x18.2 CASE 125BS MARKING DIAGRAM NFAQ0860L36T ZZZATYWW Typical Applications HIN(U) LIN(W) HS2 VS(W),W VS(V),V VS(U),U P HS1 HS2 Device HS3 LS3 LS2 NU ITRIP FAULT SD ORDERING INFORMATION LS2 LS1 CFOD HS3 NFAQ0860L36T LS3 Package DIP38 (Pb-Free) Shipping (Qty / Packing) 400 / Box NW HIN(W) LS1 Three channel half−bridge driver with protection circuits NV LIN(V) NFAQ0860L36T = Specific Device Code ZZZ = Assembly Lot Code A = Assembly Location T = Test Location Y = Year WW = Work Week Device marking is on package top side HS1 LIN(U) HIN(V) TH2 TH1 VDD VSS Industrial Pumps Industrial Fans Industrial Automation Home Appliances VB(U) VB(V) VB(W) • • • • Figure 1. Function Diagram © Semiconductor Components Industries, LLC, 2019 January, 2020 − Rev. 0 1 Publication Order Number: NFAQ0860L36T/D NFAQ0860L36T NFAQ0860L36T VPN C1 + P:38 From Op −amp circuit CS ITRIP:10 HV Ground RSU From HV Power Source RC filtering for HINx and LINx not shown. Recommended in noisy environments. RSV RSW NU:17 HIN(U):3 NV:18 HIN(W):5 HIN(V):4 LIN(U):6 NW:19 LIN(V):7 LIN(W):8 To Op −amp circuit Vctr from external regulator VB(U):34 + RSD RP RTH SD:11 VS(U),U:32 Controller FAULT :9 TH2:14 VB(V):28 + VDD:2 VS(V),V:26 Motor RCLR VDD=15V from external regulator CFOD:12 + VB(W):22 + TH1:13 VS(W),W:20 CCLR VSS:1 LV Ground Star connection to HV Ground Figure 2. Application Schematic www.onsemi.com 2 NFAQ0860L36T Bootstrap VB(U) (34) Bootstrap VB(V) (28) Bootstrap VB(W) (22) P (38) VDD (2) VSS (1) Sets latch time. For R=2MΩ, C=1nF, latch time is 1.65ms (typical). VS(W),W (20) VS(V),V (26) VS(U),U (32) CFOD (12) NU (17) NV (18) NW (19) Level Shifter HIN(U) HIN(V) HIN(W) LIN(U) LIN(V) LIN(W) (3) (4) (5) (6) (7) (8) Logic TH1 (13) TH2 (14) ITRIP (10) SD (11 ) Level Shifter VDD Internal Voltage reference Logic VDD undervoltage shutdown Level Shifter Logic FAULT (9) Over current protection Shutdown Figure 3. Simplified Block Diagram www.onsemi.com 3 NFAQ0860L36T Table 1. PIN FUNCTION DESCRIPTION Pin Name Description 1 VSS Low−Side Common Supply Ground 2 VDD Low−Side Bias Voltage for IC and IGBTs Driving 3 HIN(U) Signal Input for High−Side U Phase 4 HIN(V) Signal Input for High−Side V Phase 5 HIN(W) Signal Input for High−Side W Phase 6 LIN(U) Signal Input for Low−Side U Phase 7 LIN(V) Signal Input for Low−Side V Phase 8 LIN(W) Signal Input for Low−Side W Phase 9 FAULT Fault output 10 ITRIP Input for Over Current Protection 11 SD 12 CFOD 13 TH1 Thermistor Bias Voltage 14 TH2 Series Resistor for Thermistor 17 NU Negative DC−Link Input for U Phase 18 NV Negative DC−Link Input for V Phase 19 NW Negative DC−Link Input for W Phase 20 VS(W), W 22 VB(W) 26 VS(V), V 28 VB(V) 32 VS(U), U 34 VB(U) 38 P NOTE: Shut Down Input Capacitor and Resistor for Fault Output Duration Selection High−Side Bias Voltage GND for W phase IGBT Driving, Output for W Phase High−Side Bias Voltage for W phase IGBT Driving High−Side Bias Voltage GND for V phase IGBT Driving, Output for V Phase High−Side Bias Voltage for V phase IGBT Driving High−Side Bias Voltage GND for U phase IGBT Driving, Output for U Phase High−Side Bias Voltage for U phase IGBT Driving Positive DC−Link Input Pins 15, 16, 21, 23, 24, 25, 27, 29, 30, 31, 33, 35, 36 and 37 are not present www.onsemi.com 4 NFAQ0860L36T Table 2. ABSOLUTE MAXIMUM RATINGS at TC = 25°C (Note 1) Parameter Symbol Supply Voltage VPN Collector − Emitter Voltage VCES Conditions Rating Unit 450 V P-U,V,W; U-NU; V-NV; W-NW 600 V P,U,V,W,NU,NV,NW terminal current ±8 A P−NU,NV,NW, VPN (surge) < 500 V (Note 2) Each IGBT Collector Current IC P,U,V,W,NU,NV,NW terminal current, Tc = 100°C ±4 A Each IGBT Collector Current (Peak) ICp Tc = 25°C, Under 1 ms Pulse Width ±16 A Pc Tc = 25°C, Per One Chip Corrector Dissipation 32 W −0.3 to +20.0 V −0.3 to +20.0 V HIN(U), HIN(V), HIN(W), LIN(U), LIN(V), LIN(W) − VSS −0.3 to VDD V High−Side Control Bias voltage VBS VB(U)−VS(U), VB(V)−VS(V), VB(W)−VS(W) Control Supply Voltage VDD VDD−VSS Input Signal Voltage VIN (Note 3) FAULT Terminal Voltage VFAULT FAULT−VSS −0.3 to VDD V CFOD Terminal Voltage VCFOD CFOD−VSS −0.3 to VDD V SD−VSS −0.3 to VDD V SD Terminal Voltage VSD Current Sensing Input Voltage VITRIP Operating Junction Temperature Storage Temperature −0.3 to +10.0 V Tj ITRIP−VSS 150 _C Tstg −40 to +125 _C Module Case Operation Temperature Tc Tightening Torque MT Case mounting screws Isolation Voltage Viso 50 Hz sine wave AC 1 minute (Note 4) −40 to +125 _C 0.6 Nm 2000 Vrms Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe Operating parameters 2. This surge voltage developed by the switching operation due to the wiring inductance between P and NU, NV, NW terminal. 3. VBS=VB(U)−VS(U), VB(V)−VS(V), VB(W)−VS(W) 4. Test conditions : AC2500V, 1 s Table 3. RECOMMENDED OPERATING RANGES Rating Symbol Conditions Min Typ Max Unit 0 280 450 V Supply Voltage VPN P − NU, NV, NW High−Side Control Bias Voltage VBS VB(U) − VS(U), VB(V) − VS(V), VB(W) − VS(W) 13.0 15 17.5 V Control Supply Voltage VDD VDD − VSS 14.0 15 16.5 V ON−state Input Voltage VIN(ON) 3.0 − 5.0 V OFF−state Input Voltage VIN(OFF) HIN(U), HIN(V), HIN(W), LIN(U), LIN(V), LIN(W) − VSS 0 − 0.3 V 1 − 20 kHz 1 − − ms 1 − − ms 0.4 − 0.6 Nm PWM Frequency Dead Time Allowable Input Pulse Width Tightening Torque fPWM DT PWIN Turn−off to Turn−on (external) ON and OFF ‘M3’ Type Screw Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 5 NFAQ0860L36T Table 4. ELECTRICAL CHARACTERISTICS at TC = 25 _C, VBIAS (VBS, VDD) = 15 V unless otherwise noted. Parameter Test Conditions Symbol Min Typ Max Unit ICES − − 100 mA VCE(sat) − 2.4 3.0 V − 1.9 − V − 2.1 2.7 V Power Output Section Collector−Emitter Leakage Current VCE = 600 V Collector−Emitter Saturation Voltage IN = 5 V, IC = 8 A, Tj = 25 _C IN = 5 V, IC = 4 A, Tj = 100 _C FWDi Forward Voltage IN = 0 V, IC = −8 A, Tj = 25 _C VF − 1.6 − V Inverter IGBT Part (per 1/6 Module) Rth(j−c)Q − − 3.9 _C/W Inverter FRD Part (per 1/6 Module) Rth(j−c)F − − 7.3 _C/W IN = 0 V, IC = −4 A, Tj = 100 _C Junction to Case Thermal Resistance Switching Character tON − 0.4 1.1 ms tOFF − 0.4 1.1 ms EON − 190 − mJ Turn−off Switching Loss EOFF − 90 − mJ Total Switching Loss ETOT − 280 − mJ Switching Time Turn−on Switching Loss Turn−on Switching Loss IC = 8 A, VPN = 300 V, Tj = 25_C, Inductive Switching IC = 8 A, VPN = 300 V, Tj = 25_C EON − 100 − mJ Turn−off Switching Loss EOFF − 50 − mJ Total Switching Loss ETOT − 150 − mJ EREC − 25 − mJ tRR − 140 − ns Diode Reverse Recovery Energy Diode Reverse Recovery Time IC = 4 A, VPN = 300 V, Tj = 100_C IC = 4 A, VPN = 300 V, Tj = 100_C, (di/dt set by internal driver) Reverse Bias Safe Operating Area IC = 16 A, VCE = 450 V RBSOA Short Circuit Safe Operating Area VCE = 400 V, Tj = 100_C SCSOA 4 − − ms IQBS − 0.07 0.4 mA Full Square Driver Section Quiescent VBS Supply Current VBS = 15 V, HIN = 0 V, per driver Quiescent VDD Supply Current VDD = 15 V, LIN = 0 V, VDD−VSS ON Threshold Voltage HIN(U), HIN(V), HIN(W), LIN(U), LIN(V), LIN(W) − VSS OFF Threshold Voltage IQDD − 0.95 3.0 mA VIN(ON) − − 2.5 V VIN(OFF) 0.8 − − V Logic 1 Input Current VIN = +3.3 V IIN+ − 660 900 mA Logic 0 Input Current VIN = 0 V IIN− − − 3 mA Bootstrap ON Resistance IB = 1 mA FAULT Terminal Sink Current FAULT: ON / VFAULT = 0.1 V Fault−Output Pulse Width CFOD Threshold Shut Down Threshold SD−VSS ITRIP Trip Level RB − 500 − W IoSD − 2 − mA FAULT−VSS tFOD 1.1 1.65 2.2 ms CFOD−VSS VCFOD − 8 − V VSD+ − − 2.5 V VSD− 0.8 − − V VITRIP 0.44 0.49 0.54 V tITRIP − 1.1 − ms ITRIP−VSS ITRIP to Shutdown Propagation Delay ITRIP Blanking Time High−Side Control Bias Voltage Under− Voltage Protection tITRIPBL 250 350 − ns Reset Level UVBSR 10.3 11.1 11.9 V Detection Level UVBSD 10.1 10.9 11.7 V Hysteresis UVBSH − 0.2 − V UVDDR 10.3 11.1 11.7 V Detection Level UVDDD 10.1 10.9 11.5 V Hysteresis UVDDH − 0.2 − V Supply Voltage Under−Voltage Protection Reset Level Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 6 NFAQ0860L36T TYPICAL CHARACTERISTICS Figure 4. VCE versus IC for Different Temperatures (VDD = 15 V) Figure 5. VF versus IF for Different Temperatures Figure 6. EON versus IC for Different Temperatures Figure 7. EOFF versus IC for Different Temperatures Figure 8. Thermal Impedance Plot (IGBT) Figure 9. Thermal Impedance Plot (FRD) Figure 10. Turn−on Waveform Tj = 1005C, VCC = 300 V Figure 11. Turn−off Waveform Tj = 1005C, VCC = 300 V www.onsemi.com 7 NFAQ0860L36T APPLICATIONS INFORMATION Input / Output Timing Chart VBS undervoltage protection reset signal HIN is disabled until LIN receives input (Note 5) HIN LIN VDD undervoltage protection reset voltage (Note 2) VBS undervoltage protection reset voltage(Note 3) VDD VB(U), VB(V), VB(W) VIT w0.54V ( Note 4 ) ITRIP VIT < 0.44V FAULT driven output (with pull−up) SD driven input (with pull−up) Cross−conduction prevention period(Note 1) Upper IGBT Gate Drive Lower IGBT Gate Drive Automatic reset after protection(Fault−Output Pulse Width) NOTES: 1. This section of the timing diagram shows the effect of cross−conduction prevention. 2. This section of the timing diagram shows that when the voltage on VDD decreases sufficiently all gate output signals will go low, switching off all six IGBTs. When the voltage on VDD rises sufficiently, normal operation will resume. 3. This section shows that when the bootstrap voltage on VB(U) (VB(V), VB(W)) drops, the corresponding high side output U (V, W) is switched off. When the voltage on VB(U) (VB(V), VB(W)) rises sufficiently, normal operation will resume. 4. This section shows that when the voltage on ITRIP exceeds the threshold, all IGBTs are turned off. Normal operation resumes later after the over−current condition is removed. 5. After VDD has risen above the threshold to enable normal operation, the driver waits to receive an input signal on the LIN input before enabling the driver for the HIN signal. Figure 12. Input / Output Timing Chart Table 5. INPUT / OUTPUT LOGIC TABLE INPUT HIN OUTPUT LIN ITRIP SD High side IGBT Low side IGBT U,V,W FAULT H L L H ON (Note 5) L H L H OFF OFF P OFF ON NU,NV,NW OFF L L L H OFF OFF High Impedance OFF H H L H OFF OFF High Impedance OFF X X H X OFF OFF High Impedance ON X X L L OFF OFF High Impedance OFF www.onsemi.com 8 NFAQ0860L36T Table 6. THERMISTOR CHARACTERISTICS Parameter Resistance Symbol Condition R25 Tth = 25_C 99 Tth = 100_C 5.18 4208 −40 R100 B−Constant (25 to 50_C) Min B Temperature Range Typ Max Unit 100 101 kW 5.38 5.60 kW 4250 4293 K − +125 _C Figure 13. Thermistor Resistance versus Thermistor Temperature Figure 14. Thermistor Voltage versus Thermistor Temperature Conditions: RTH = 39 kW, Pull−up Voltage 5.0 V (see Figure 2) www.onsemi.com 9 NFAQ0860L36T FAULT Pin Calculation of Bootstrap Capacitor Value The FAULT output is an open drain output requiring a pull−up resistor. If the pull−up voltage is 5 V, use a pull−up resistor with a value of 6.8 kW or higher. If the pull−up voltage is 15 V, use a pull−up resistor with a value of 20 kW or higher. The FAULT output is triggered if there is a VDD undervoltage or an overcurrent condition. The bootstrap capacitor value CB is calculated using the following approach. The following parameters influence the choice of bootstrap capacitor: • VBS: Bootstrap power supply. 15 V is recommended. • QG: Total gate charge of IGBT at VBS = 15 V. 8 nC • UVLO: Falling threshold for UVLO. Specified as 12 V. • IDMAX: High side drive power dissipation. Specified as 0.4 mA • TONMAX: Maximum ON pulse width of high side IGBT. Under−voltage Protection If VDD goes below the VDD supply under−voltage lockout falling threshold, the FAULT output is switched on. The FAULT output stays on until VDD rises above the VDD supply under−voltage lockout rising threshold. After VDD has risen above the threshold to enable normal operation, the driver waits to receive an input signal on the LIN input before enabling the driver for the HIN signal. Capacitance calculation formula: Overcurrent Protection CB = (QG + IDMAX * TONMAX) / (VBS − UVLO) An over−current condition is detected if the voltage on the ITRIP pin is larger than the reference voltage. There is a blanking time of typically 350 ns to improve noise immunity. After a shutdown propagation delay of typically 1.1 ms, the FAULT output is switched on. The FAULT output is held on for a time determined by the resistor and capacitor connected to the CFOD pin. If RCLR = 2 MW and CCLR = 1 nF, the FAULT output is switched on for 1.65 ms (typ.) because the FAULT pin goes back to high impedance when CFOD is higher than 8 V (typ.). The over−current protection threshold should be set to be equal or lower to 2 times the module rated current (Io). An additional fuse is recommended to protect against system level or abnormal over−current fault conditions. CB is recommended to be approximately 3 times the value calculated above. The recommended value of CB is in the range of 1 to 47 mF, however, the value needs to be verified prior to production. When not using the bootstrap circuit, each high side driver power supply requires an external independent power supply. The internal bootstrap circuit uses a MOSFET. The turn on time of this MOSFET is synchronized with the turn on of the low side IGBT. The bootstrap capacitor is charged by turning on the low side IGBT. If the low side IGBT is held on for a long period of time (more than one second for example), the bootstrap voltage on the high side MOSFET will slowly discharge. Capacitors on High Voltage and VDD Supplies 100 Boot strap capacitance Cb ( F) Both the high voltage and VDD supplies require an electrolytic capacitor and an additional high frequency capacitor. The recommended value of the high frequency capacitor is between 100 nF and 10 mF. SD Pin The SD terminal pin is used to enable or shut down the built−in driver. If the voltage on the SD pin rises above the VSD+ voltage, the output drivers are enabled. If the voltage on the SD pin falls below the VSD− voltage, the drivers are disabled. 10 1 0.1 0.01 Minimum Input Pulse Width 0.1 1 10 Tonmax (ms) 100 1000 Figure 15. Bootstrap Capacitance versus Tonmax When input pulse width is less than 1 ms, an output may not react to the pulse. (Both ON signal and OFF signal) www.onsemi.com 10 NFAQ0860L36T TEST CIRCUITS • ICES VBS=15V U+ V+ W+ U− V− W− A 38 38 38 32 26 20 B 32 26 20 17 18 19 34 ICE 32 VBS=15V A A 28 VCE 26 U+, V+, W+ : High side phase U−, V−, W− : Low side phase VBS=15V 22 20 VDD=15V 2,9,11 ,12 B 1,10,17,18,19 Figure 16. Test Circuit for ICE • VCE(sat) (Test by pulse) U+ V+ W+ U− V− W− A 38 38 38 32 26 20 B 32 26 20 17 18 19 C 3 4 5 6 7 8 VBS=15V 34 A 32 VBS=15V 28 26 VBS=15V V 22 IC VCE(sat) 20 VDD=15V 5V 2,9,11,12 C B 1,10,17,18,19 Figure 17. Test Circuit for VCE(SAT) • VF (Test by pulse) U+ V+ W+ U− V− W− A 38 38 38 32 26 20 B 32 26 20 17 18 19 A V VF B Figure 18. Test Circuit for VF www.onsemi.com 11 NFAQ0860L36T • RB (Test by pulse) U+ V+ W+ A 2 2 2 B 34 28 22 C 6 7 8 A V C 5V IB VB (RB) 2,9,11,12 VDD=15V 1,10,17,18,19 B Figure 19. Test Circuit for RB • IQBS, IQDD VBS U+ VBS V+ VBS W+ VDD A 34 28 22 2 B 32 26 20 1 IQBS VBSx=15V A A B IQDD A 2 9,11 ,12 VDD=15V 1,10 Figure 20. Test Circuit for ID • Switching Time (The circuit is a representative example of the Inverter Low side U phase.) VBS=15V 34 32 Input Signal (0 to 5V) VBS=15V 38 28 26 lo VBS=15V 90% VDD=15V tOFF CS 32 20 10% tON 22 Input Signal 2,9,11,12 6 1,10,17,18,19 Figure 21. Test Circuit for Switching Time www.onsemi.com 12 17 Io MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DIP38, 29.6x18.2 EP−4 CASE 125BS ISSUE A DATE 13 APR 2021 GENERIC MARKING DIAGRAM* XXXXXXXXXXXXXXXXX ZZZATYWW DOCUMENT NUMBER: DESCRIPTION: XXXX ZZZ AT Y WW = Specific Device Code = Lot ID = Assembly & Test Location = Year = Work Week 98AON92315G DIP38, 29.6x18.2 EP−4 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2018 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Email Requests to: orderlit@onsemi.com onsemi Website: www.onsemi.com ◊ TECHNICAL SUPPORT North American Technical Support: Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910 Europe, Middle East and Africa Technical Support: Phone: 00421 33 790 2910 For additional information, please contact your local Sales Representative