NFP36060L42T

NFP36060L42T SPM) 3 27 Series Intelligent Power Module (IPM) Bridgeless PFC, 600 V, 60 A The NFP36060L42T is an advanced PFC SPM 3 module providing a fully−featured, high−performance Bridgeless PFC (Power Factor Correction) input power stage for consumer, medical, and industrial applications. These modules integrate optimized gate drive of the built−in IGBTs to minimize EMI and losses, while also providing multiple on−module protection features including under−voltage lockout, short−circuit current protection, thermal monitoring, and fault reporting. These modules also feature high−performance output diodes and shunt resistor for additional space savings and mounting convenience. www.onsemi.com Features • UL Certified No. E209024 (UL1557) • 600 V – 60 A 2−Phase Bridgeless PFC with Integral Gate Drivers • • • • • • • and Protection Very Low Thermal Resistance using AlN DBC Substrate Low−Loss Field Stop 4th Generation IGBT Optimized for 20 kHz Switching Frequency Built−in NTC Thermistor for Temperature Monitoring Built−in Shunt Resistor for Current Sensing Isolation Rating of 2500 Vrms / 1 min These Devices are RoHS Compliant 3D Package Drawing (Click to Activate 3D Content) SPMHC−027 CASE MODFJ Typical Applications MARKING DIAGRAM • 2−Phase Bridgeless PFC Converter (AC 200V Class) ♦ HVAC (Commercial Air−conditioner) Integrated Power Functions • 600 V – 60 A 2−Phase Bridgeless PFC for Single−phase AC / DC Power Conversion (refer to Figure 2) Integrated Drive, Protection, and System Control Functions • For IGBTs: Gate−drive Circuit, Short−Circuit Protection (SCP) • • • Control Circuit, Under−Voltage Lock−Out Protection (UVLO) Fault Signaling: Corresponding to UV and SC faults Built−in Thermistor: Temperature Monitoring Input Interface: Active−HIGH Interface, works with 3.3 V / 5 V Logic, Schmitt−Trigger Input ON NFP36060L42T XXX Y WW = ON Semiconductor Logo = Specific Device Code = Lot Number = Year = Work Week Related Resources • AN−9041 * Bridgeless PFC SPM 3 Series Design Guide • AN−9086 * SPM 3 Package Mounting Guidance © Semiconductor Components Industries, LLC, 2019 November, 2019 − Rev. 1 ORDERING INFORMATION See detailed ordering and shipping information on page 7 of this data sheet. 1 Publication Order Number: NFP36060L42T/D NFP36060L42T PIN CONFIGURATION (1) VDD (2) VSS (3) N.C. (4) IN(R) (5) IN(S) (6) VFO (7) CFOD (8) CIN (21) VAC − (22) NSENSE (23) NC (9) N.C. (10) N.C. (24) N Case Temperature (TC) Detecting Point (11 ) N.C. (12) N.C. (13) N.C. (14) N.C. (25) R (15) N.C. (16) N.C. (17) N.C. (18) N.C. (19) RTH (20) VTH (26) S DBC Substrate (27) PR Figure 1. Pin Configuration − Top View INTERNAL EQUIVALENT CIRCUIT AND INPUT/OUTPUT PINS (20 ) VTH NTC Thermistor (27) PR (19) RTH D1 D2 (26 ) S (8) CIN CIN (7) CFOD CFOD (6) VFO VFO (5) IN(S) IN(S) (4) IN(R) IN(R) (2) VSS VSS (1) VDD VDD (25) R OUT(S) Q1 D3 Q2 D4 (24) N (22) NSENSE Shunt Resistor OUT(R) Figure 2. Internal Block Diagram www.onsemi.com 2 (21) VAC − NFP36060L42T Table 1. PIN DESCRIPTION Pin Number Pin Name Pin Description 1 VDD Common Supply Voltage of IC for IGBTs Driving 2 VSS Common Supply Ground 4 IN(R) Signal Input for Low−Side R−Phase IGBT 5 IN(S) Signal Input for Low−Side S−Phase IGBT 6 VFO Fault Output 7 CFOD 8 CIN Capacitor (Low−Pass Filter) for Short−Circuit Current Detection 19 RTH Series Resistor for The Use of Thermistor 20 VTH Thermistor Bias Voltage 21 VAC− Current Sensing Terminal 22 NSENSE 24 N Negative Rail of DC−Link 25 R Output for R−Phase 26 S Output for S−Phase 27 PR 3, 9~18, 23 N.C. Capacitor for Fault Output Duration Selection Current Sensing Reference Terminal Positive Rail of DC−Link No Connection www.onsemi.com 3 NFP36060L42T Table 2. ABSOLUTE MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Parameter Conditions Rating Unit CONVERTER PART Vi Input Supply Voltage Applied between R − S 264 Vrms Input Supply Voltage (Surge) Applied between R − S 500 V Output Voltage Applied between P − N 450 V Output Supply Voltage (Surge) Applied between P − N 500 V VCES Collector - Emitter Voltage Breakdown Voltage 600 V VRRM Repetitive Peak Reverse Voltage Breakdown Voltage 600 V Diode Forward Current Tc = 25°C, Tj ≤ 150°C (Note 1) 60 A IFSM Peak Forward Surge Current Non−Repetitive, 60 Hz Single Half−Sine Wave (Note 1) 350 A ± Ic Each IGBT Collector Current VDD = 15 V, Tc = 25°C, Tj ≤ 150°C (Note 1) 60 A ± Icp Each IGBT Collector Current (Peak) Tc = 25°C, Tj ≤ 150°C, Under 1 ms Pulse Width (Note 1) 90 A Collector Dissipation Tc = 25°C per IGBT (Note 1) 160 W PRSH Power Rating of Shunt Resistor Tc < 125°C 2 W Tj Operating Junction Temperature −40 ~ 150 _C 20 V Vi(Surge) VPN VPN(Surge) IF Pc CONTROL PART VDD Control Supply Voltage Applied between VDD − VSS VIN Input Signal Voltage Applied between IN(X), IN(Y) − VSS ~0.3 ~ VDD + 0.3 V VFO Fault Output Supply Voltage Applied between VFO − VSS ~0.3 ~ VDD + 0.3 V IFO Fault Output Current Sink Current at VFO pin 2 mA Current Sensing Input Voltage Applied between CIN − VSS ~0.3 ~ VDD + 0.3 V −40 ~ 150 _C −40 ~ 125 _C −40 ~ 125 _C 2500 Vrms VCIN Tj Operating Junction Temperature TOTAL SYSTEM Tc Module Case Operation Temperature Tstg Storage Temperature Viso Isolation Voltage See Figure 1 60 Hz, Sinusoidal, AC 1 Minute, Connection Pins to Heat Sink Plate Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. These values had been made an acquisition by the calculation considered to design factor. Table 3. THERMAL RESISTANCE Symbol Parameter Rth(j−c)Q Rth(j−c)D Rth(j−c)R Junction−to−Case Thermal Resistance (Note 2) Conditions Min Typ Max Unit Each IGBT under Operating Condition − − 0.78 _C/W Each Boost Diode under Operating Condition − − 1.50 _C/W Each Rectifier under Operating Condition − − 0.85 _C/W 2. For the measurement point of case temperature (Tc), please refer to Figure 1. DBC discoloration and Picker Circle Printing allowed, please refer to application note AN−9190 (Impact of DBC Oxidation on SPM® Module Performance). www.onsemi.com 4 NFP36060L42T Table 4. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified.) Symbol Parameter Conditions Min Typ Max Unit − 1.55 2.05 V CONVERTER PART VCE(sat) Collector − Emitter Saturation Voltage VDD = 15 V, VIN = 5 V, Ic = 50 A, Tj = 25°C VFH High−Side Diode Forward Voltage IFH = 50 A, Tj = 25°C − 2.40 2.90 V VFL Low−Side Diode Forward Voltage IFL = 50 A, Tj = 25°C − 1.20 1.60 V ton Switching Characteristics − 990 − ns − 120 − ns − 930 − ns − 190 − ns trr − 65 − ns Irr − 5 − A tc(on) toff tc(off) ICES IR RSENSE VPN = 400 V, VDD = 15 V, Ic = 60 A Tj = 25°C VIN = 0 V ´ 5 V, Inductive Load See Figure 3 (Note 3) Collector − Emitter Leakage Current VCE = VCES − − 1 mA Boost Diode Revers Leakage Current VR = VRRM − − 1 mA 1.83 2.00 2.17 mW Collector Sensing Resistor CONTROL PART IQDD Quiescent VDD Supply Current VDD = 15 V, IN(X), IN(Y) − VSS = 0 V, Supply Current between VDD and VSS − − 5.00 mA IPDD Operating VDD Supply Current VDD = 15 V, FPWM = 20 kHz, Duty = 50%, Applied to one PWM Signal Input per IGBT, Supply Current between VDD and VSS − − 10.00 mA VFOH Fault Output Voltage VDD = 15 V, VFO Circuit: 10 kW VCIN = 0 V to 5 V Pull−up 4.50 − − V VFOL VDD = 15 V, IFO = 1 mA VCIN = 1 V − − 0.50 V Short Circuit Trip Level VDD = 15 V CIN − VSS 0.45 0.50 0.55 V Supply Circuit Under−Voltage Protection Detection Level 9.8 − 13.3 V Reset Level 10.3 − 13.8 V VIN(ON) ON Threshold Voltage Applied between IN(X), IN(Y) − VSS − − 2.6 V VIN(OFF) OFF Threshold Voltage 0.8 − − V tFOD Fault−Out Pulse Width CFOD = 33 nF (Note 4) 25 − − ms RTH Resistance of Thermistor at TTH = 25°C − 50 − kW − 5.76 − kW VCIN(ref) UVDDD UVDDR See Figure 4 (Note 5) at TTH = 85°C Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. ton and toff include the propagation delay of the internal drive IC. tc(on) and tc(off) are the switching times of IGBT under the given gate−driving condition internally. For the detailed information, please see Figure 3. 4. The fault−out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation: CFOD = 0.89 x 10−6 x tFOD [F] 5. TTH is the temperature of thermistor itself. To know case temperature (Tc), conduct experiments considering the application. www.onsemi.com 5 NFP36060L42T 100% Ic 100% Ic trr Vce Ic Ic Vce VIN VIN ton toff tc(on) tc(off) 10% Ic VIN(ON) 90% Ic VIN(OFF) 10% Vce (a) turn−on 10% Vce (b) turn−off Figure 3. Switching Time Definition Figure 4. R−T Curve of Built−in Thermistor www.onsemi.com 6 10% Ic NFP36060L42T Table 5. RECOMMENDED OPERATIONG CONDITIONS Value Symbol Vi Parameter Conditions Min Typ Max Unit Input Supply Voltage Applied between R − S 160 − 264 Vrms VPN Supply Voltage Applied between P − N − 280 400 V VDD Control Supply Voltage Applied between VDD − VSS 13.5 15.0 16.5 V dVDD / dt Control Supply Variation −1 − +1 V / ms − 20 − kHz −40 − 150 °C FPWM Tj −40°C ≤ Tc ≤ 125°C, −40°C ≤ Tj ≤ 150°C PWM Input Signal Junction Temperature Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. PACKAGE MARKING AND ODERING INFORMATION Device Device Marking Package Shipping NFP36060L42T NFP36060L42T SPMHC-027 10 Units / Tube MECHANICAL CHARACTERISTICS AND RATINGS Value Parameter Conditions Device Flatness See Figure 5 Mounting Torque Mounting Screw: M3 See Figure 6 (Note 6, 7) Recommended 0.62 N • m Weight Min Typ Max 0 − +120 mm 0.51 0.62 0.72 N•m − 15.00 − g Unit 6. Do not over torque when mounting screws. Too much mounting torque may cause DBC cracks, as well as bolts and Al heat−sink destruction. 7. Avoid one−sided tightening stress. Uneven mounting can cause the DBC substrate of package to be damaged. The pre−screwing torque is set to 20 ~ 30% of maximum torque rating. Pre−Screwing: 1 → 2 Final Screwing: 2 → 1 2 1 Figure 5. Flatness Measurement Position Figure 6. Mounting Screws Torque Order www.onsemi.com 7 NFP36060L42T TIME CHARTS OF SPMs PROTECTIVE FUNCTION Input Signal Protection Circuit State RESET SET RESET UVDDR a1 Control Supply Voltage a6 UVDDD a3 a2 a7 a4 Output Current a5 Fault Output Signal a1: Control supply voltage rises: after the voltage rises UVDDR, the circuits start to operate when the next input is applied. a2: Normal operation: IGBT ON and carrying current. a3: Under−voltage detection (UVDDD). a4: IGBT OFF in spite of control input condition. a5: Fault output operation starts. a6: Under−voltage reset (UVDDR). a7: Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH. Figure 7. Under−Voltage Protection Lower Arms Control Input b6 Protection Circuit state SET Internal IGBT Gate−Emitter Voltage b7 RESET b4 b3 b2 Internal delay at protection circuit SC current trip level b8 b1 Output Current SC reference voltage Sensing Voltage of Sense Resistor RC filter circuit c5 time constant Fault Output Signal delay (With the external over current detection circuit) b1: Normal operation: IGBT ON and carrying current. b2: Short−Circuit current detection (SC trigger). b3: All IGBTs gate are hard interrupted. b4: All IGBTs turn OFF. b5: Fault output operation starts with a fixed pulse width. b6: Input HIGH − IGBT ON state, but during the active period of fault output, the IGBT doesn’t turn ON. b7: Fault output operation finishes, but IGBT doesn’t turn ON until triggering next signal from LOW to HIGH. b8: Normal operation: IGBT ON and carrying current. Figure 8. Short−Circuit Current Protection www.onsemi.com 8 NFP36060L42T Vac PFCM 5V line VTH RTH Temp . Monitoring NTC Thermistor 15V line R4 PR VDD C2 C4 VSS VDD S VSS M C U R IN(S) R1 IN(R) IN(R) Gating R R1 5V line C1 C1 Fault C1 R2 R1 C1 OUT(S) VFO N VFO CFOD CFOD Current Sensing for Control 3−Phase Inverter IN(S) Gating S OUT(R) Shunt Resistor C5 NSENSE VAC − CIN CIN R3 C3 Figure 9. Typical Application Circuit 8. To avoid malfunction, the wiring of each input should be as short as possible (Less than 2 − 3 cm). 9. VFO output is an open−drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO up to 2 mA. 10. Input signal is active−HIGH type. There is a 5 kW resistor inside the IC to pull−down each input signal line to GND. RC coupling circuits should be adopted for the prevention of input signal oscillation. RC coupling at each input might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s printed circuit board. R1C1 time constant should be selected in the range 50 ~ 150 ns (Recommended R1 = 100 W, C1 = 1 nF). 11. To prevent error of the protection function, the wiring related with R3 and C3 should be as short as possible. 12. In the short−circuit current protection circuit, select the R3C3 time constant in the range 3.0 ~ 4.0 ms. Do enough evaluation on the real system because over−current protection time may vary wiring pattern layout and value of the R3C3 time constant. 13. Each capacitor should be mounted as close to the pins of the Motion SPM 3 product as possible. 14. Relays are used in most systems of electrical equipment in industrial application. In these cases, there should be sufficient distance between the MCU and the relays. 15. The zener diode or transient voltage suppressor should be adapted for the protection of ICs from the surge destruction between each pair of control supply terminals (Recommended zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15 W). 16. Please choose the electrolytic capacitor with good temperature characteristic in C2. Choose 0.1 ~ 0.2 mF R−category ceramic capacitors with good temperature and frequency characteristics in C4. SPM is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 9 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SPMCA−027 / PDD STD, SPM27−CA, DBC TYPE CASE MODFJ ISSUE O DOCUMENT NUMBER: DESCRIPTION: 98AON13563G DATE 31 JAN 2017 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. SPMCA−027 / PDD STD, SPM27−CA, DBC TYPE PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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