NIF5002NT1

NIF5002N Preferred Device Self−Protected FET with Temperature and Current Limit 42 V, 2.0 A, Single N−Channel, SOT−223 http://onsemi.com HDPlust devices are an advanced series of power MOSFETs which utilize ON Semiconductors latest MOSFET technology process to achieve the lowest possible on−resistance per silicon area while incorporating smart features. Integrated thermal and current limits work together to provide short circuit protection. The devices feature an integrated Drain−to−Gate Clamp that enables them to withstand high energy in the avalanche mode. The Clamp also provides additional safety margin against unexpected voltage transients. Electrostatic Discharge (ESD) protection is provided by an integrated Gate−to−Source Clamp. Features • • • • • • • • Current Limitation Thermal Shutdown with Automatic Restart Short Circuit Protection IDSS Specified at Elevated Temperature Avalanche Energy Specified Slew Rate Control for Low Noise Switching Overvoltage Clamped Protection Pb−Free Packages are Available V(BR)DSS (Clamped) RDS(ON) TYP ID MAX 42 V 165 mW @ 10 V 2.0 A* *Max current limit value is dependent on input condition. Drain Gate Input RG MPWR ESD Protection Temperature Limit Current Limit Current Sense Source 4 Applications 1 • Lighting • Solenoids • Small Motors 2 SOT−223 CASE 318E STYLE 3 3 MARKING DIAGRAM MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) 1 Value Unit Drain−to−Source Voltage Internally Clamped VDSS 42 V Drain−to−Gate Voltage Internally Clamped (RG = 1.0 MW) VDGR 42 V Gate−to−Source Voltage VGS "14 V Continuous Drain Current ID Power Dissipation PD 1.1 1.7 8.9 W TJ, Tstg −55 to 150 °C EAS 150 mJ @ TA = 25°C (Note 1) @ TA = 25°C (Note 2) @ TT = 25°C (Note 3) Operating Junction and Storage Temperature Single Pulse Drain−to−Source Avalanche Energy (VDD = 32 V, VG = 5.0 V, IPK = 1.0 A, L = 300 mH, RG(ext) = 25 W) 4 2 DRAIN 3 DRAIN SOURCE Internally Limited A = Assembly Location Y = Year W = Work Week 5002N = Specific Device Code G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. © Semiconductor Components Industries, LLC, 2006 GATE AYW 5002N G G Symbol Rating April, 2006 − Rev. 7 Overvoltage Protection 1 See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. Preferred devices are recommended choices for future use and best overall value. Publication Order Number: NIF5002N/D NIF5002N THERMAL CHARACTERISTICS Characteristic Symbol Value Unit RqJA RqJA RqJT 114 72 14 °C/W Junction−to−Ambient − Steady State (Note 1) Junction−to−Ambient − Steady State (Note 2) Junction−to−Tab − Steady State (Note 3) 1. Surface−mounted onto min pad FR4 PCB, (2 oz. Cu, 0.06″ thick). 2. Surface−mounted onto 2″ sq. FR4 board (1″ sq., 1 oz. Cu, 0.06″ thick). 3. Surface−mounted onto min pad FR4 PCB, (2 oz. Cu, 0.06″ thick). ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Condition Min Typ Max Unit TJ = 25°C 42 46 55 V TJ = 150°C 40 OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage (Note 4) Zero Gate Voltage Drain Current Gate Input Current V(BR)DSS IDSS VGS = 0 V, ID = 10 mA VGS = 0 V, VDS = 32 V 45 55 TJ = 25°C 0.25 4.0 TJ = 150°C 1.1 20 50 100 1.8 2.2 V 4.0 6.0 −mV/°C mW IGSSF VDS = 0 V, VGS = 5.0 V VGS(th) VGS = VDS, ID = 150 mA mA mA ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Gate Threshold Temperature Coefficient VGS(th)/TJ Static Drain−to−Source On−Resistance RDS(on) VGS = 10 V, ID = 1.7 A VGS = 5.0 V, ID = 1.7 A VGS = 5.0 V, ID = 0.5 A Source−Drain Forward On Voltage 1.3 TJ = 25°C 165 200 TJ = 150°C 305 400 TJ = 25°C 195 230 TJ = 150°C 360 460 TJ = 25°C 190 230 TJ = 150°C 350 460 VSD VGS = 0 V, IS = 7.0 A 1.0 V Turn−on Time td(on) 20 30 Turn−off Time td(off) VGS = 10 V, VDD = 12 V, ID = 2.5 A, RL = 4.7 W, (10% Vin to 90% ID) 65 100 Slew Rate On dVDS/dton RL = 4.7 W, Vin = 0 to 10 V, VDD = 12 V, 70% to 50% 1.2 Slew−Rate Off dVDS/dtoff RL = 4.7 W, Vin = 0 to 10 V, VDD = 12 V, 50% to 70% 0.5 SWITCHING CHARACTERISTICS ms V/ms SELF PROTECTION CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 5) Current Limit ILIM VDS = 10 V, VGS = 5.0 V VDS = 10 V, VGS = 10 V TJ = 25°C 3.1 4.7 6.3 TJ = 150°C 2.0 3.2 4.3 TJ = 25°C 3.8 5.7 7.6 TJ = 150°C 2.8 4.3 5.7 Temperature Limit (Turn−off) TLIM(off) VGS = 5.0 V 150 175 200 Temperature Limit (Circuit Reset) TLIM(on) VGS = 5.0 V 135 160 185 Temperature Limit (Turn−off) TLIM(off) VGS = 10 V 150 165 185 Temperature Limit (Circuit Reset) TLIM(on) VGS = 10 V 135 150 170 A °C ESD ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Electro−Static Discharge Capability ESD Human Body Model (HBM) 4000 Machine Model (MM) 400 4. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 5. Fault conditions are viewed as beyond the normal operating range of the part. http://onsemi.com 2 V NIF5002N TYPICAL PERFORMANCE CURVES ID, DRAIN CURRENT (AMPS) 8V 4 6V 5V 4V 3.8 V 3 3.6 V 7V 5 3.4 V 2 3.2 V 3.0 V 2.8 V 2.6 V 1 0 2 1 3 3 2 100°C 1 4 TJ = −55°C 1 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 1.0 ID = 1.7 A TJ = 25°C 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 3 5 4 6 7 8 9 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 10 4 0.3 TJ = 25°C 0.25 VGS = 5 V 0.2 0.15 VGS = 10 V 0.1 0.05 0 2 3 4 5 ID, DRAIN CURRENT (AMPS) Figure 4. On−Resistance vs. Drain Current and Gate Voltage Figure 3. On−Resistance vs. Gate−to−Source Voltage 10000 2.5 ID = 1.7 A VGS = 5 V VGS = 0 V 2 1000 IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 25°C 2 3 1.5 3.5 2.5 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 0.9 2 VDS ≥ 10 V 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) ID, DRAIN CURRENT (AMPS) 9V 6 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 4 TJ = 25°C 10 V 7 1.5 1 TJ = 150°C 100 TJ = 100°C 10 0.5 0 −50 −25 0 25 50 75 100 125 150 1 10 20 30 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 40 NIF5002N TYPICAL PERFORMANCE CURVES 10 VGS = 0 V TJ = 25°C ID, DRAIN CURRENT (AMPS) IS, SOURCE CURRENT (AMPS) 10 1 0.1 0.01 0.4 0.5 0.6 0.7 0.8 0.9 VGS = 20 V SINGLE PULSE TC = 25°C 1.0 10 ms 0.1 VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) dc RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.01 0.1 1 1 ms 1.0 10 100 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 8. Maximum Rated Forward Biased Safe Operating Area Figure 7. Diode Forward Voltage vs. Current r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1.0 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 1.0E−03 0.01 SINGLE PULSE 1.0E−02 1.0E−01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 t, TIME (s) Figure 9. Thermal Response ORDERING INFORMATION Package Shipping† NIF5002NT1 SOT−223 1000 / Tape & Reel NIF5002NT1G SOT−223 (Pb−Free) 1000 / Tape & Reel NIF5002NT3 SOT−223 4000 / Tape & Reel NIF5002NT3G SOT−223 (Pb−Free) 4000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. HDPlus is a trademark of Semiconductor Components Industries, LLC (SCILLC). http://onsemi.com 4 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOT−223 (TO−261) CASE 318E−04 ISSUE R DATE 02 OCT 2018 SCALE 1:1 q q DOCUMENT NUMBER: DESCRIPTION: 98ASB42680B SOT−223 (TO−261) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2018 www.onsemi.com SOT−223 (TO−261) CASE 318E−04 ISSUE R STYLE 1: PIN 1. 2. 3. 4. BASE COLLECTOR EMITTER COLLECTOR STYLE 2: PIN 1. 2. 3. 4. ANODE CATHODE NC CATHODE STYLE 6: PIN 1. 2. 3. 4. RETURN INPUT OUTPUT INPUT STYLE 7: PIN 1. 2. 3. 4. ANODE 1 CATHODE ANODE 2 CATHODE STYLE 11: PIN 1. MT 1 2. MT 2 3. GATE 4. MT 2 STYLE 3: PIN 1. 2. 3. 4. GATE DRAIN SOURCE DRAIN STYLE 8: STYLE 12: PIN 1. INPUT 2. OUTPUT 3. NC 4. OUTPUT CANCELLED DATE 02 OCT 2018 STYLE 4: PIN 1. 2. 3. 4. SOURCE DRAIN GATE DRAIN STYLE 5: PIN 1. 2. 3. 4. STYLE 9: PIN 1. 2. 3. 4. INPUT GROUND LOGIC GROUND STYLE 10: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE DRAIN GATE SOURCE GATE STYLE 13: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR GENERIC MARKING DIAGRAM* AYW XXXXXG G 1 A = Assembly Location Y = Year W = Work Week XXXXX = Specific Device Code G = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98ASB42680B SOT−223 (TO−261) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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