NIF62514T1G

NIF62514 Self-protected FET, Temp and Current Limit, Voltage Clamp, ESD, SOT-223 HDPlus devices are an advanced series of power MOSFETs which utilize ON Semiconductor’s latest MOSFET technology process to achieve the lowest possible on−resistance per silicon area while incorporating smart features. Integrated thermal and current limits work together to provide short circuit protection. The devices feature an integrated Drain−to−Gate Clamp that enables them to withstand high energy in the avalanche mode. The Clamp also provides additional safety margin against unexpected voltage transients. Electrostatic Discharge (ESD) protection is provided by an integrated Gate−to−Source Clamp. Features • • • • • • • • • http://onsemi.com 6.0 AMPERES* 40 VOLTS CLAMPED RDS(on) = 90 mW Drain Gate Input Current Limitation Thermal Shutdown with Automatic Restart Short Circuit Protection Low RDS(on) IDSS Specified at Elevated Temperature Avalanche Energy Specified Slew Rate Control for Low Noise Switching Overvoltage Clamped Protection This is a Pb−Free Device RG Overvoltage Protection MPWR ESD Protection Current Limit Temperature Limit Current Sense Source MARKING DIAGRAM DRAIN 4 4 1 SOT−223 CASE 318E STYLE 3 AYW 62514G G 2 3 1 2 3 SOURCE GATE DRAIN A = Assembly Location Y = Year W = Work Week 62514 = Specific Device Code G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Package Shipping† NIF62514T1G SOT−223 (Pb−Free) 1000/Tape & Reel NIF62514T3G SOT−223 (Pb−Free) 4000/Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. *Limited by the current limit circuit. © Semiconductor Components Industries, LLC, 2009 April, 2009 − Rev. 7 1 Publication Order Number: NIF62514/D NIF62514 MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Drain−to−Source Voltage Internally Clamped VDSS 40 Vdc Drain−to−Gate Voltage Internally Clamped (RGS = 1.0 MW) VDGR 40 Vdc VGS "16 Vdc Gate−to−Source Voltage Drain Current − Continuous @ TA = 25°C − Continuous @ TA = 100°C − Pulsed (tp ≤ 10 ms) ID ID Internally Limited IDM Total Power Dissipation @ TA = 25°C (Note 1) @ TA = 25°C (Note 2) @ TA = 25°C (Note 3) PD Thermal Resistance, Junction−to−Tab Junction−to−Ambient (Note 1) Junction−to−Ambient (Note 2) Single Pulse Drain−to−Source Avalanche Energy (VDD = 25 Vdc, VGS = 5.0 Vdc, VDS = 40 Vdc, IL = 2.8 Apk, L = 80 mH, RG = 25 W) Operating and Storage Temperature Range 1.1 1.73 8.93 W °C/W RqJT RqJA RqJA 14 114 72.3 EAS 300 mJ TJ, Tstg −55 to 150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Mounted onto min pad board. 2. Mounted onto 1″ pad board. 3. Mounted onto large heatsink. + ID DRAIN IG + VDS GATE SOURCE VGS − − Figure 1. Voltage and Current Convention http://onsemi.com 2 NIF62514 MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit 42 42 46 45 50 50 Vdc − − 0.5 2.0 2.0 10 − − 50 550 100 1000 1.0 − 1.7 4.0 2.0 − − − 90 165 100 190 − − 105 185 120 210 VSD − 1.05 − V OFF CHARACTERISTICS Drain−to−Source Clamped Breakdown Voltage (VGS = 0 Vdc, ID = 250 mAdc) (VGS = 0 Vdc, ID = 250 mAdc, TJ = 150°C) (Note 4) V(BR)DSS Zero Gate Voltage Drain Current (VDS = 32 Vdc, VGS = 0 Vdc) (VDS = 32 Vdc, VGS = 0 Vdc, TJ = 150°C) (Note 4) IDSS Gate Input Current (VGS = 5.0 Vdc, VDS = 0 Vdc) (VGS = −5.0 Vdc, VDS = 0 Vdc) IGSS mAdc mAdc ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = 150 mAdc) Threshold Temperature Coefficient (Negative) VGS(th) Static Drain−to−Source On−Resistance (Note 5) (VGS = 10 Vdc, ID = 1.4 Adc, TJ @ 25°C) (VGS = 10 Vdc, ID = 1.4 Adc, TJ @ 150°C) (Note 4) RDS(on) Static Drain−to−Source On−Resistance (Note 5) (VGS = 5.0 Vdc, ID = 1.4 Adc, TJ @ 25°C) (VGS = 5.0 Vdc, ID = 1.4 Adc, TJ @ 150°C) (Note 4) RDS(on) Source−Drain Forward On Voltage (IS = 7 A, VGS = 0 V) Vdc mV/°C mW mW SWITCHING CHARACTERISTICS (Note 4) Turn−on Delay Time 10% Vin to 10% ID RL = 4.7 W, Vin = 0 to 10 V, VDD = 12 V td(on) − 4.0 8.0 ms Turn−on Rise Time 10% ID to 90% ID RL = 4.7 W, Vin = 0 to 10 V, VDD = 12 V trise − 11 20 ms Turn−off Delay Time 90% Vin to 90% ID RL = 4.7 W, Vin = 10 to 0 V, VDD = 12 V td(off) − 32 50 ms Turn−off Fall Time 90% ID to 10% ID RL = 4.7 W, Vin = 10 to 0 V, VDD = 12 V tfall − 27 50 ms Slew−Rate On RL = 4.7 W, Vin = 0 to 10 V, VDD = 12 V −dVDS/dton − 1.5 2.5 ms Slew−Rate Off RL = 4.7 W, Vin = 10 to 0 V, VDD = 12 V dVDS/dtoff − 0.6 1.0 ms SELF PROTECTION CHARACTERISTICS (TJ = 25°C unless otherwise noted) Current Limit (VGS = 5.0 Vdc) (VGS = 5.0 Vdc, TJ = 150°C) (Note 4) ILIM 6.0 3.0 9.0 5.0 11 8.0 Adc Current Limit (VGS = 10 Vdc) (VGS = 10 Vdc, TJ = 150°C) (Note 4) ILIM 7.0 4.0 10.5 7.5 13 10 Adc Temperature Limit (Turn−off) (Note 4) VGS = 5.0 Vdc TLIM(off) 150 175 200 °C Temperature Hysteresis (Note 4) VGS = 5.0 Vdc DTLIM(on) − 15 − °C Temperature Limit (Turn−off) (Note 4) VGS = 10 Vdc TLIM(off) 150 165 185 °C Temperature Hysteresis (Note 4) VGS = 10 Vdc DTLIM(on) − 15 − °C ESD ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Electro−Static Discharge Capability Human Body Model (HBM) ESD 4000 − − V Electro−Static Discharge Capability Machine Model (MM) ESD 400 − − V 4. Not subject to production testing. 5. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%. http://onsemi.com 3 NIF62514 TYPICAL ELECTRICAL CHARACTERISTICS 8 VGS = 10 V 10 8 7V 6V 5V 4V 6 4 3V 2 0 1 3 2 5 4 4V 3 3V 2 1 0 6 0 1 2 3 4 5 6 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 1. Output Characteristics Figure 2. Output Characteristics 12 12 VGS = 10 V 10 7V 6V 5V 8 4V 6 TJ = −40°C 4 2 3V VDS = 5 V 8 6 1 2 3 4 5 TJ = 25°C 4 TJ = 150°C 2 0 0 6 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) VGS = 10 V ID = 1.4 A 175 150 Maximum 125 100 75 Typical 50 25 0 −50 −25 0 25 50 75 100 1 1.5 2 2.5 3 3.5 4 4.5 5 Figure 4. Transfer Characteristics 250 200 0.5 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 3. Output Characteristics 225 TJ = −40°C 10 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) 6V 5V 4 ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) 7V 5 14 0 VGS = 10 V 6 TJ = 25°C 0 TJ = 150°C 7 ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) 12 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 5. Drain−to−Source Resistance versus Junction Temperature 250 VGS = 5 V ID = 1.4 A 225 200 175 150 Maximum 125 100 Typical 75 50 25 0 −50 −25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 6. Drain−to−Source Resistance versus Junction Temperature http://onsemi.com 4 2.50 4 GATE THRESHOLD VOLTAGE (V) IDSS, DRAIN−TO−SOURCE LEAKAGE CURRENT (mA) NIF62514 VDS = 32 V 3 2 1 Typical 0 −50 −25 0 25 50 75 100 125 ID = 150 mA 2.25 2.00 VTH + 4 Sigma VTH 1.75 1.50 VTH − 4 Sigma 1.25 1.00 0.75 0.50 0.25 0 −50 −30 −10 150 10 30 50 70 90 110 130 150 TJ, JUNCTION TEMPERATURE (°C) TEMPERATURE (°C) Figure 7. Drain−to−Source Resistance versus Junction Temperature Figure 8. Gate Threshold Voltage versus Temperature 12 DRAIN CURRENT (AMPS) Current Limit 10 VGS = 10 V 8 6 Temperature Limit VGS = 5 V 4 2 0 0 1 2 3 4 5 TIME (ms) R(t), TRANSIENT THERMAL RESISTANCE (°C/W) Figure 9. Short−circuit Response 100 Duty Cycle = 0.5 10 0.2 0.1 0.05 P(pk) 0.02 1 0.01 t1 t2 DUTY CYCLE, D = t1/t2 Single Pulse 0.1 0.00001 0.0001 0.001 0.01 t,TIME (S) 0.1 D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT T1 TJ(pk) − TA = P(pk) RqJA(t) RqJC @ R(t) for t ≤ 0.02 s 1 10 Figure 10. Transient Thermal Resistance (Non−normalized Junction−to−Ambient mounted on minimum pad area) http://onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOT−223 (TO−261) CASE 318E−04 ISSUE R DATE 02 OCT 2018 SCALE 1:1 q q DOCUMENT NUMBER: DESCRIPTION: 98ASB42680B SOT−223 (TO−261) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2018 www.onsemi.com SOT−223 (TO−261) CASE 318E−04 ISSUE R STYLE 1: PIN 1. 2. 3. 4. BASE COLLECTOR EMITTER COLLECTOR STYLE 2: PIN 1. 2. 3. 4. ANODE CATHODE NC CATHODE STYLE 6: PIN 1. 2. 3. 4. RETURN INPUT OUTPUT INPUT STYLE 7: PIN 1. 2. 3. 4. ANODE 1 CATHODE ANODE 2 CATHODE STYLE 11: PIN 1. MT 1 2. MT 2 3. GATE 4. MT 2 STYLE 3: PIN 1. 2. 3. 4. GATE DRAIN SOURCE DRAIN STYLE 8: STYLE 12: PIN 1. INPUT 2. OUTPUT 3. NC 4. OUTPUT CANCELLED DATE 02 OCT 2018 STYLE 4: PIN 1. 2. 3. 4. SOURCE DRAIN GATE DRAIN STYLE 5: PIN 1. 2. 3. 4. STYLE 9: PIN 1. 2. 3. 4. INPUT GROUND LOGIC GROUND STYLE 10: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE DRAIN GATE SOURCE GATE STYLE 13: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR GENERIC MARKING DIAGRAM* AYW XXXXXG G 1 A = Assembly Location Y = Year W = Work Week XXXXX = Specific Device Code G = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98ASB42680B SOT−223 (TO−261) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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