MJB44H11 (NPN),
NJVMJB44H11 (NPN),
MJB45H11 (PNP),
NJVMJB45H11 (PNP)
Complementary
Power Transistors
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D2PAK for Surface Mount
Complementary power transistors are for general purpose power
amplification and switching such as output or driver stages in
applications such as switching regulators, converters and power
amplifiers.
SILICON POWER
TRANSISTORS
10 AMPERES,
80 VOLTS, 50 WATTS
MARKING
DIAGRAM
Features
• Low Collector−Emitter Saturation Voltage −
•
•
•
•
•
•
VCE(sat) = 1.0 V (Max) @ 8.0 A
Fast Switching Speeds
Complementary Pairs Simplifies Designs
Epoxy Meets UL 94 V−0 @ 0.125 in
ESD Ratings:
Human Body Model, 3B > 8000 V
Machine Model, C > 400 V
NJV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
Pb−Free Packages are Available
Collector−Emitter Voltage
Emitter−Base Voltage
Collector Current
− Continuous
− Peak
Symbol
Value
Unit
VCEO
80
Vdc
VEB
5
Vdc
IC
10
20
Adc
Total Power Dissipation
@ TC = 25°C
Derate above 25°C
PD
Total Power Dissipation
@ TA = 25°C
Derate above 25°C
PD
Operating and Storage Junction
Temperature Range
TJ, Tstg
50
0.4
W
W/°C
2.0
0.016
W
W/°C
−55 to 150
°C
THERMAL CHARACTERISTICS
Characteristic
x
A
Y
WW
G
B4xH11G
AYWW
= 4 or 5
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
MAXIMUM RATINGS
Rating
D2PAK
CASE 418B
STYLE 1
Symbol
Max
Unit
Thermal Resistance, Junction−to−Case
RqJC
2.5
°C/W
Thermal Resistance, Junction−to−Ambient
RqJA
75
°C/W
Device
MJB44H11G
Package
Shipping†
D2PAK
50 Units/Rail
(Pb−Free)
MJB44H11T4G
D2PAK
(Pb−Free)
800/Tape & Reel
NJVMJB44H11T4G
D2PAK
(Pb−Free)
800/Tape & Reel
MJB45H11G
D2PAK
(Pb−Free)
50 Units/Rail
MJB45H11T4G
D2PAK
(Pb−Free)
800/Tape & Reel
NJVMJB45H11T4G
D2PAK
(Pb−Free)
800/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
© Semiconductor Components Industries, LLC, 2013
May, 2013 − Rev. 5
1
Publication Order Number:
MJB44H11/D
MJB44H11 (NPN), NJVMJB44H11 (NPN), MJB45H11 (PNP), NJVMJB45H11 (PNP)
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
VCEO(sus)
80
−
−
Vdc
Collector Cutoff Current (VCE = Rated VCEO, VBE = 0)
ICES
−
−
10
mA
Emitter Cutoff Current (VEB = 5 Vdc)
IEBO
−
−
50
mA
Collector−Emitter Saturation Voltage (IC = 8 Adc, IB = 0.4 Adc)
VCE(sat)
−
−
1.0
Vdc
Base−Emitter Saturation Voltage (IC = 8 Adc, IB = 0.8 Adc)
VBE(sat)
−
−
1.5
Vdc
hFE
60
−
−
−
40
−
−
−
−
130
230
−
−
−
−
50
40
−
−
−
−
300
135
−
−
−
−
500
500
−
−
−
−
140
100
−
−
Characteristic
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (IC = 30 mA, IB = 0)
ON CHARACTERISTICS
DC Current Gain (VCE = 1 Vdc, IC = 2 Adc)
DC Current Gain (VCE = 1 Vdc, IC = 4 Adc)
DYNAMIC CHARACTERISTICS
Collector Capacitance (VCB = 10 Vdc, ftest = 1 MHz)
Ccb
MJB44H11, NJVMJB44H11
MJB45H11, NJVMJB45H11
Gain Bandwidth Product (IC = 0.5 Adc, VCE = 10 Vdc, f = 20 MHz)
MJB44H11, NJVMJB44H11
MJB45H11, NJVMJB45H11
pF
fT
MHz
SWITCHING TIMES
Delay and Rise Times(IC = 5 Adc, IB1 = 0.5 Adc)
Storage Time(IC = 5 Adc, IB1 = IB2 = 0.5 Adc)
r(t), TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
Fall Time(IC = 5 Adc, IB1 = IB2 = 0.5 Adc)
1.0
0.7
0.5
tf
MJB44H11, NJVMJB44H11
MJB45H11, NJVMJB45H11
ns
0.1
0.1
0.02
0.01
SINGLE PULSE
0.02
0.05
0.1
P(pk)
ZqJC(t) = r(t) RqJC
RqJC = 1.56°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) ZqJC(t)
0.05
0.03
0.01
0.01
ns
0.2
0.2
0.02
ts
MJB44H11, NJVMJB44H11
MJB45H11, NJVMJB45H11
ns
D = 0.5
0.3
0.07
0.05
td + tr
MJB44H11, NJVMJB44H11
MJB45H11, NJVMJB45H11
0.2
0.5
1.0
2.0
t, TIME (ms)
5.0
10
Figure 1. Thermal Response
http://onsemi.com
2
20
t1
t2
DUTY CYCLE, D = t1/t2
50
100
200
500
1.0 k
MJB44H11 (NPN), NJVMJB44H11 (NPN), MJB45H11 (PNP), NJVMJB45H11 (PNP)
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 2 is based on TJ(pk) = 150°C; TC is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided TJ(pk)
v 150°C. TJ(pk) may be calculated from the data in
Figure 1. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
50
30
20
1.0 ms
100 ms
10
5.0
3.0
2.0
1.0
10 ms
TC ≤ 70° C
DUTY CYCLE ≤ 50%
dc
1.0 ms
0.5
0.3
0.2
0.1
1.0
5.0 7.0 10
2.0 3.0
20 30
50 70 100
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 2. Maximum Rated Forward Bias
Safe Operating Area
PD, POWER DISSIPATION (WATTS)
IC, COLLECTOR CURRENT (AMPS)
100
TA
TC
3.0
60
2.0
40
TC
1.0
20
0
0
TA
0
20
40
60
80
100
120
T, TEMPERATURE (°C)
Figure 3. Power Derating
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3
140
160
MJB44H11 (NPN), NJVMJB44H11 (NPN), MJB45H11 (PNP), NJVMJB45H11 (PNP)
1000
hFE, DC CURRENT GAIN
hFE, DC CURRENT GAIN
1000
VCE = 4 V
100
VCE = 1 V
TJ = 25°C
10
0.1
1
VCE = 4 V
100
1V
TJ = 25°C
10
0.1
10
1
10
IC, COLLECTOR CURRENT (AMPS)
IC, COLLECTOR CURRENT (AMPS)
Figure 4. MJB44H11 DC Current Gain
Figure 5. MJB45H11 DC Current Gain
1000
1000
hFE , DC CURRENT GAIN
hFE , DC CURRENT GAIN
TJ = 125°C
TJ = 125°C
25°C
100
-40°C
VCE = 1 V
10
0.1
1
1
10
Figure 6. MJB44H11 Current Gain
versus Temperature
Figure 7. MJB45H11 Current Gain
versus Temperature
1.2
SATURATION VOLTAGE (VOLTS)
SATURATION VOLTAGE (VOLTS)
0.1
IC, COLLECTOR CURRENT (AMPS)
VBE(sat)
0.8
0.6
0
0.1
VCE = 1 V
IC, COLLECTOR CURRENT (AMPS)
1
0.2
100
10
10
1.2
0.4
25°C
-40°C
IC/IB = 10
TJ = 25°C
VCE(sat)
1
IC, COLLECTOR CURRENT (AMPS)
1
0.8
0.6
0.4
IC/IB = 10
TJ = 25°C
VCE(sat)
0.2
0
0.1
10
VBE(sat)
Figure 8. MJB44H11 On−Voltages
1
IC, COLLECTOR CURRENT (AMPS)
Figure 9. MJB45H11 On−Voltages
http://onsemi.com
4
10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
D2PAK 3
CASE 418B−04
ISSUE L
DATE 17 FEB 2015
SCALE 1:1
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 418B−01 THRU 418B−03 OBSOLETE,
NEW STANDARD 418B−04.
C
E
−B−
V
W
4
1
2
A
S
3
−T−
SEATING
PLANE
K
W
J
G
D
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
S
V
H
3 PL
0.13 (0.005)
M
T B
M
VARIABLE
CONFIGURATION
ZONE
N
R
P
L
M
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
L
M
F
F
F
VIEW W−W
1
VIEW W−W
2
VIEW W−W
3
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
MILLIMETERS
MIN
MAX
8.64
9.65
9.65 10.29
4.06
4.83
0.51
0.89
1.14
1.40
7.87
8.89
2.54 BSC
2.03
2.79
0.46
0.64
2.29
2.79
1.32
1.83
7.11
8.13
5.00 REF
2.00 REF
0.99 REF
14.60 15.88
1.14
1.40
U
L
M
INCHES
MIN
MAX
0.340 0.380
0.380 0.405
0.160 0.190
0.020 0.035
0.045 0.055
0.310 0.350
0.100 BSC
0.080
0.110
0.018 0.025
0.090
0.110
0.052 0.072
0.280 0.320
0.197 REF
0.079 REF
0.039 REF
0.575 0.625
0.045 0.055
STYLE 3:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. CATHODE
STYLE 4:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 5:
STYLE 6:
PIN 1. CATHODE
PIN 1. NO CONNECT
2. ANODE
2. CATHODE
3. CATHODE
3. ANODE
4. ANODE
4. CATHODE
MARKING INFORMATION AND FOOTPRINT ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42761B
D2PAK 3
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
D2PAK 3
CASE 418B−04
ISSUE L
DATE 17 FEB 2015
GENERIC
MARKING DIAGRAM*
xx
xxxxxxxxx
AWLYWWG
xxxxxxxxG
AYWW
AYWW
xxxxxxxxG
AKA
IC
Standard
Rectifier
xx
A
WL
Y
WW
G
AKA
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
= Polarity Indicator
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
SOLDERING FOOTPRINT*
10.49
8.38
16.155
2X
3.504
2X
1.016
5.080
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42761B
D2PAK 3
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
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