NL17SH125P5T5G

NL17SH125 Non-Inverting 3-State Buffer The NL17SH125 MiniGatet is an advanced high−speed CMOS non−inverting buffer in ultra−small footprint. The NL17SH125 requires the 3−state control input (OE) to be set High to place the output in the high impedance state. The NL17SH125 input structures provide protection when voltages up to 7.0 V are applied, regardless of the supply voltage. http://onsemi.com MARKING DIAGRAM Features High Speed: tPD = 3.8 ns (Typ) at VCC = 5.0 V Low Power Dissipation: ICC = 1.0 mA (Max) at TA = 25°C SOT−953 CASE 527AE Power Down Protection Provided on Inputs Balanced Propagation Delays These are Pb−Free and Halide−Free Devices T M T • • • • • M 1 = Specific Device Code (Rotated 90°) = Month Code PIN ASSIGNMENT IN A GND OE 5 1 VCC 2 4 3 1 IN A 2 GND 3 OE 4 OUT Y 5 VCC OUT Y FUNCTION TABLE Figure 1. Pinout (Top View) OE EN IN A OUT Y Input A Input OE Output Y L H X L L H L H Z Figure 2. Logic Symbol ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. © Semiconductor Components Industries, LLC, 2012 September, 2012 − Rev. 0 1 Publication Order Number: NL17SH125/D NL17SH125 MAXIMUM RATINGS Symbol Parameter VCC DC Supply Voltage VIN DC Input Voltage VOUT DC Input Diode Current IOK DC Output Diode Current IOUT DC Output Source/Sink Current ICC DC Supply Current per Supply Pin IGND DC Ground Current per Ground Pin TSTG Storage Temperature Range Unit −0.5 to +7.0 V −0.5 to +7.0 V −0.5 to VCC + 0.5 V VIN < GND −20 mA VOUT < GND, VOUT > VCC ±20 mA ±12.5 mA ±25 mA DC Output Voltage IIK Value ±25 mA −65 to +150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature Under Bias +150 °C MSL Moisture Sensitivity FR Flammability Rating VESD ILATCHUP Level 1 Oxygen Index: 28 to 34 ESD Withstand Voltage UL 94 V−0 @ 0.125 in Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Latchup Performance Above VCC and Below GND at 125°C (Note 5) >3000 >150 N/A V ±100 mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Characteristics Min Max Unit VCC Positive DC Supply Voltage 1.65 5.5 V VIN Digital Input Voltage 0.0 5.5 V Output Voltage 0.0 VCC V −55 +125 °C 0 0 100 20 ns/V VOUT TA Dt / DV Operating Temperature Range Input Transition Rise or Fail Rate VCC = 3.3 V ± 0.3 V VCC = 5.0 V ± 0.5 V http://onsemi.com 2 NL17SH125 DC ELECTRICAL CHARACTERISTICS TA = 255C VCC Symbol VIH VIL VOH VOL Parameter Test Conditions High−Level Input Voltage Low−Level Input Voltage High−Level Output Voltage Low−Level Output Voltage TA v 855C (V) Min Typ Max Min 1.65 to 2.0 0.75 x VCC 0.75 x VCC 2.3 to 5.5 0.70 x VCC 0.70 x VCC Max *555C to 1255C Min Max V 1.65 to 2.0 0.25 x VCC 0.25 x VCC 0.25 x VCC 2.3 to 5.5 0.30 x VCC 0.30 x VCC 0.30 x VCC VIN = VIH or VIL IOH = −50 mA 2.0 3.0 4.5 1.9 2.9 4.4 VIN = VIH or VIL IOH = −4 mA IOH = −8 mA 3.0 4.5 2.58 3.94 VIN = VIH or VIL IOL = 50 mA 2.0 3.0 4.5 VIN = VIH or VIL IOL = 4 mA IOL = 8 mA 2.0 3.0 4.5 0.0 0.0 0.0 Unit 1.9 2.9 4.4 1.9 2.9 4.4 2.48 3.80 2.34 3.66 V V 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 V IIN Input Leakage Current 0 ≤ VIN ≤ 5.5 V 0 to 5.5 $0.1 $1.0 $1.0 mA ICC Quiescent Supply Current 0 ≤ VIN ≤ VCC 5.5 1.0 10 40 mA IOZ 3−State Leakage Current VIN = VIH or VIL VOUT = VCC or GND 0.0 $0.25 $2.5 $2.5 mA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) Symbol tPLH, tPHL tPZL, tPZH tPLZ, tPHZ Parameter Propagation Delay, A to Y Output Enable Time, OE to Y Output Enable Time, OE to Y CIN Input Capacitance CPD Power Dissipation Capacitance (Note 6) VCC (V) TA = 255C Test Conditions Min TA v 855C *555C to 1255C Typ Max Min Max Max Unit 3.0 to 3.6 CL = 15 pF CL = 50 pF 5.6 8.1 8.0 11.5 1.0 1.0 9.5 13.0 12.0 16.0 ns 4.5 to 5.5 CL = 15 pF CL = 50 pF 3.8 5.3 5.5 7.5 1.0 1.0 6.5 8.5 8.5 10.5 3.0 to 3.6 CL = 15 pF CL = 50 pF 5.4 7.9 8.0 11.5 1.0 1.0 9.5 13.0 11.5 15.0 4.5 to 5.5 CL = 15 pF CL = 50 pF 3.6 5.1 5.1 7.1 1.0 1.0 6.0 8.0 7.5 9.5 3.0 to 3.6 CL = 15 pF CL = 50 pF 6.5 8.0 9.7 13.2 1.0 1.0 11.5 15.0 14.5 18.5 4.5 to 5.5 CL = 15 pF CL = 50 pF 4.8 7.0 6.8 8.8 1.0 1.0 8.0 10 10.0 12.0 5.5 10 10 10 5.0 11 Min ns ns pF pF 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC. http://onsemi.com 3 NL17SH125 ORDERING INFORMATION Device NL17SH125P5T5G Package Shipping† SOT−953 (Pb−Free) 8000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. A or B VCC 50% Y tPLH tPLZ 50% VCC Y tPZH tPHZ 50% VCC Figure 3. Switching Waveform HIGH IMPEDANCE VOL + 0.3V VOH − 0.3V 50% VCC Y HIGH IMPEDANCE Figure 4. TEST POINT TEST POINT 1 kW OUTPUT DEVICE UNDER TEST GND tPZL GND tPHL VCC 50% DEVICE UNDER TEST CL* *Includes all probe and jig capacitance. CL* Connect to VCC when testing tPLZ and tPZL. Connect to GND when testing tPHZ and tPZH. *Includes all probe and jig capacitance. Figure 5. Test Circuit Figure 6. Test Circuit INPUT Figure 7. Input Equivalent Circuit MiniGate is a trademark of Semiconductor Components Industries, LLC (SCILLC). http://onsemi.com 4 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOT−953 CASE 527AE ISSUE E DATE 02 AUG 2011 SCALE 4:1 X Y D 5 PIN ONE INDICATOR A 4 HE E 1 2 3 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF THE BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. DIM A b C D E e HE L L2 L3 C TOP VIEW SIDE VIEW e L 5X 5X L3 5X L2 MILLIMETERS MIN NOM MAX 0.34 0.37 0.40 0.10 0.15 0.20 0.07 0.12 0.17 0.95 1.00 1.05 0.75 0.80 0.85 0.35 BSC 0.95 1.00 1.05 0.175 REF 0.05 0.10 0.15 −−− −−− 0.15 GENERIC MARKING DIAGRAM* 5X BOTTOM VIEW XM b 1 0.08 X Y X M SOLDERING FOOTPRINT* *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. 5X 0.35 5X 0.20 = Specific Device Code = Month Code PACKAGE OUTLINE 1.20 1 0.35 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON26457D SOT−953 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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