NLAS4052DTR2

NLAS4052 Analog Multiplexer/ Demultiplexer Double–Pole, 4–Position Plus Common Off The NLAS4052 is an improved version of the MC14052 and MC74HC4052 fabricated in sub–micron Silicon Gate CMOS technology for lower RDS(on) resistance and improved linearity with low current. This device may be operated either with a single supply or dual supply up to ±3 V to pass a 6 VPP signal without coupling capacitors. When operating in single supply mode, it is only necessary to tie VEE, pin 7 to ground. For dual supply operation, VEE is tied to a negative voltage, not to exceed maximum ratings. http://onsemi.com MARKING DIAGRAMS 16 9 SO–16 D SUFFIX CASE 751B NLAS4052 AWLYWW 1 8 • Improved RDS(on) Specifications • Pin for Pin Replacement for MAX4052 and MAX4052A • – One Half the Resistance Operating at 5.0 Volts Single or Dual Supply Operation – Single 2.5–5 Volt Operation, or Dual ±3 Volt Operation – With VCC of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic, – No Translators Needed – Address and Inhibit pins are Logic is Over–Voltage Tolerant and – www.DataSheet4U.com – May Be Driven Up +6 V Regardless of VCC Address and Inhibit pins are Standard TTL Compatible – Greatly Improved Noise Margin Over MAX4052 and MAX4052A Improved Linearity Over Standard HC4052 Devices Packages TSSOP–16 DT SUFFIX CASE 948F 16 9 NLAS 4052 ALYW 1 8 16 9 • • • Popular SOIC, and Space Saving TSSOP, and QSOP 16 Pin QSOP–16 QS SUFFIX CASE 492 A WL, L Y WW, W NLAS 4052 ALYW 1 8 = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION Device NLAS4052DR2 NLAS4052DTR2 NLAS4052QSR Package SO–16 TSSOP–16 QSOP–16 Shipping 2500 Units/Reel 2500 Units/Reel 2500 Units/Reel © Semiconductor Components Industries, LLC, 2002 1 June, 2002 – Rev. 1 Publication Order Number: NLAS4052/D NLAS4052 VCC 16 NO1A NO2A COMA NO0A NO3A ADDB ADDA 15 14 13 12 11 10 9 NO0B NO1B COMB NO3B NO2B NO1A NO2A COMA NO0A NO3A ADDB ADDA LOGIC Inhibit 1 2 3 4 5 6 7 8 GND NO0B NO1B COMB NO3B NO2B Inhibit VEE Figure 1. Pin Connection (Top View) Figure 2. Logic Diagram TRUTH TABLE Address Inhibit 1 0 0 0 0 B X don’t care 0 0 1 1 A X don’t care 0 1 0 1 ON SWITCHES* All switches open COMA–NO0A, COMB–NO0B COMA–NO1A, COMB–NO1B COMA–NO2A, COMB–NO2B COMA–NO3A, COMB–NO3B *NO and COM pins are identical and interchangeable. Either may be considered an input or output; signals pass equally well in either direction. http://onsemi.com 2 NLAS4052 ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î Î ÎÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎ Î Î Î ÎÎÎ Î Î Î Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS (Note 1) Symbol Parameter Value Unit V V V V VEE Negative DC Supply Voltage (Referenced to GND) –7.0 to )0.5 –0.5 to )7.0 –0.5 to )7.0 VCC VIS Positive DC Supply Voltage (Note 2) Analog Input Voltage Digital Input Voltage (Referenced to GND) (Referenced to VEE) VEE –0.5 to VCC )0.5 –0.5 to 7.0 $50 VIN I (Referenced to GND) DC Current, Into or Out of Any Pin Storage Temperature Range mA °C °C °C TSTG TL TJ –65 to )150 260 Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature under Bias Thermal Resistance )150 143 164 164 500 450 450 qJA SOIC TSSOP QSOP SOIC TSSOP QSOP °C/W PD Power Dissipation in Still Air, mW MSL FR Moisture Sensitivity Level 1 Flammability Rating Oxygen Index: 30% – 35% UL 94 V–0 @ 0.125 in u2000 u200 u1000 $300 VESD ESD Withstand Voltage Human Body Model (Note 3) Machine Model (Note 4) Charged Device Model (Note 5) V ILATCH–UP Latch–Up Performance Above VCC and Below GND at 125°C (Note 6) mA 1. Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Extended exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum–rated conditions is not implied. 2. The absolute value of VCC $|VEE| ≤ 7.0. 3. Tested to EIA/JESD22–A114–A. 4. Tested to EIA/JESD22–A115–A. 5. Tested to JESD22–C101–A. 6. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VEE Negative DC Supply Voltage Positive DC Supply Voltage Analog Input Voltage Digital Input Voltage Parameter (Referenced to GND) Min –5.5 2.5 2.5 Max GND 5.5 6.6 Unit V V V V ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î ÎÎ Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎÎ ÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î VCC VIS (Referenced to GND) (Referenced to VEE) VEE 0 VCC 5.5 VIN TA (Note 7) (Referenced to GND) Operating Temperature Range, All Package Types –55 0 0 125 100 20 °C tr, tf Input Rise/Fall Time (Channel Select or Enable Inputs) VCC = 3.0 V $ 0.3 V VCC = 5.0 V $ 0.5 V ns/V 7. Unused digital inputs may not be left open. All digital inputs must be tied to a high–logic voltage level or a low–logic input voltage level. http://onsemi.com 3 NLAS4052 DC CHARACTERISTICS – Digital Section (Voltages Referenced to GND) Guaranteed Max Limit Symbol VIH Parameter Minimum High–Level Input Voltage, Enable Inputs Condition VCC 2.5 3.0 4.5 5.5 2.5 3.0 4.5 5.5 VIN = 6.0 or GND Address, Inhibit and VIS = VCC or GND 0 V to 6.0 V 6.0 –55 to 255C 1.75 2.1 3.15 3.85 0.45 0.9 1.35 1.65 $0.1 4.0