NLAS5223

NLAS5223, NLAS5223L Ultra−Low 0.5 W Dual SPDT Analog Switch The NLAS5223 is an advanced CMOS analog switch fabricated in Sub−micron silicon gate CMOS technology. The device is a dual Independent Single Pole Double Throw (SPDT) switch featuring Ultra−Low RON of 0.5 W, at VCC = 3.0 $ 0.3 V. The part also features guaranteed Break Before Make (BBM) switching, assuring the switches never short the driver. Features http://onsemi.com MARKING DIAGRAM WQFN−10 CASE 488AQ 1 XX = Specific Device Code AU = NLAS5223 AV = NLAS5223L M = Date Code G = Pb−Free Device (Note: Microdot may be in either location) XXMG G • • • • • • • • • • • • • • • • • • Ultra−Low RON, t0.5 W at VCC = 3.0 $ 0.3 V NLAS5223 Interfaces with 2.8 V Chipset NLAS5223L Interfaces with 1.8 V Chipset Single Supply Operation from 1.65−3.6 V Smallest 1.4 x 1.8 x 0.75 mm Thin QFN Package Full 0−VCC Signal Handling Capability High Off−Channel Isolation Low Standby Current, t50 nA Low Distortion RON Flatness of 0.15 W High Continuous Current Capability $300 mA Through Each Switch Large Current Clamping Diodes at Analog Inputs $300 mA Continuous Current Capability ESD Human Body Model = 3000 V These are Pb−Free Devices Cell Phone Audio Block Speaker and Earphone Switching Ring−Tone Chip / Amplifier Switching Modems NC2 7 GND 6 IN2 8 5 NC1 COM2 9 4 IN1 NO2 10 3 COM1 Applications 1 VCC 2 NO1 FUNCTION TABLE IN 1, 2 0 1 NO 1, 2 OFF ON NC 1, 2 ON OFF ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. © Semiconductor Components Industries, LLC, 2005 1 December, 2005 − Rev. 0 Publication Order Number: NLAS5223/D NLAS5223, NLAS5223L COM NO NC IN Figure 1. Logic Equivalent Circuit PIN DESCRIPTION QFN PIN # 2, 5, 7, 10 4, 8 3, 9 6 1 Symbol NC1 to NC2, NO1 to NO2 IN1 and IN2 COM1 and COM2 GND VCC Independent Channels Controls Common Channels Ground (V) Positive Supply Voltage Name and Function http://onsemi.com 2 NLAS5223, NLAS5223L MAXIMUM RATINGS Symbol VCC VIS VIN Ianl1 Ianl−pk1 Iclmp Positive DC Supply Voltage Analog Input Voltage (VNO, VNC, or VCOM) Digital Select Input Voltage Continuous DC Current from COM to NC/NO Peak Current from COM to NC/NO, 10 Duty Cycle (Note 1) Continuous DC Current into COM/NO/NC with Respect to VCC or GND Parameter Value −0.5 to +4.6 −0.5 v VIS v VCC + 0.5 −0.5 v VIN v +4.6 ±300 ±500 ±100 Unit V V V mA mA mA Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Defined as 10% ON, 90% OFF Duty Cycle. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN VIS TA tr, tf DC Supply Voltage Digital Select Input Voltage (OVT) Overvoltage Tolerance Analog Input Voltage (NC, NO, COM) Operating Temperature Range Input Rise or Fall Time, SELECT VCC = 1.6 V − 2.7 V VCC = 3.0 V − 3.6 V Parameter Min 1.65 GND GND −40 Max 3.6 3.6 VCC +85 20 10 Unit V V V °C ns/V http://onsemi.com 3 NLAS5223, NLAS5223L NLAS5223 DC CHARACTERISTICS − DIGITAL SECTION (Voltages Referenced to GND) Guaranteed Limit Symbol VIH VIL IIN IOFF ICC Parameter Minimum High−Level Input Voltage, Select Inputs Maximum Low−Level Input Voltage, Select Inputs Maximum Input Leakage Current, Select Inputs Power Off Leakage Current Maximum Quiescent Supply Current (Note 2) VIN = 3.6 V or GND VIN = 3.6 V or GND Select and VIS = VCC or GND Condition VCC 3.0 3.6 3.0 3.6 3.6 0 1.65 to 3.6 25°C 1.4 1.7 0.7 0.8 ±0.1 ±0.5 ±1.0 −40°C to +85°C 1.4 1.7 0.7 0.8 ±1.0 ±2.0 ±2.0 Unit V V mA mA mA 2. Guaranteed by design. Resistance measurements do not include test circuit or package resistance. NLAS5223 DC ELECTRICAL CHARACTERISTICS − ANALOG SECTION Guaranteed Maximum Limit 25°C Symbol RON Parameter NC/NO On−Resistance (Note 3) NC/NO On−Resistance Flatness (Notes 3 and 4) On−Resistance Match Between Channels (Notes 3 and 5) Condition VIN = VIL or VIN = VIH VIS = GND to VCC ICOM = 100 mA ICOM = 100 mA VIS = 0 to VCC VIS = 1.5 V; ICOM = 100 mA VIS = 1.8 V; ICOM = 100 mA VIN = VIL or VIH VNO or VNC = 0.3 V VCOM = 3.3 V VIN = VIL or VIH VNO 0.3 V or 3.3 V with VNC floating or VNC 0.3 V or 3.3 V with VNO floating VCOM = 0.3 V or 3.3 V VCC 3.0 3.6 3.0 3.6 3.0 3.6 3.6 −5.0 Min Max 0.5 0.5 0.15 0.15 0.05 0.05 5.0 −10 −40°C to +85°C Min Max 0.5 0.5 0.15 0.15 0.05 0.05 10 nA Unit W RFLAT DRON W W INC(OFF) INO(OFF) ICOM(ON) NC or NO Off Leakage Current (Note 3) COM ON Leakage Current (Note 3) 3.6 −10 10 −100 100 nA 3. Guaranteed by design. Resistance measurements do not include test circuit or package resistance. 4. Flatness is defined as the difference between the maximum and minimum value of On−resistance as measured over the specified analog signal ranges. 5. DRON = RON(MAX) − RON(MIN) between NC1 and NC2 or between NO1 and NO2. http://onsemi.com 4 NLAS5223, NLAS5223L NLAS5223L DC CHARACTERISTICS − DIGITAL SECTION (Voltages Referenced to GND) Guaranteed Limit Symbol VIH VIL IIN IOFF ICC Parameter Minimum High−Level Input Voltage, Select Inputs Maximum Low−Level Input Voltage, Select Inputs Maximum Input Leakage Current, Select Inputs Power Off Leakage Current Maximum Quiescent Supply Current (Note 6) VIN = 3.6 V or GND VIN = 3.6 V or GND Select and VIS = VCC or GND Condition VCC 3.0 3.6 3.0 3.6 3.6 0 1.65 to 3.6 25°C 1.1 1.3 0.5 0.5 ±0.1 ±0.5 ±1.0 −40°C to +85°C 1.1 1.3 0.5 0.5 ±1.0 ±2.0 ±2.0 Unit V V mA mA mA 6. Guaranteed by design. Resistance measurements do not include test circuit or package resistance. NLAS5223L DC ELECTRICAL CHARACTERISTICS − ANALOG SECTION Guaranteed Maximum Limit 25°C Symbol RON Parameter NC/NO On−Resistance (Note 7) NC/NO On−Resistance Flatness (Notes 7 and 8) On−Resistance Match Between Channels (Notes 7 and 9) Condition VIN = VIL or VIN = VIH VIS = GND to VCC ICOM = 100 mA ICOM = 100 mA VIS = 0 to VCC VIS = 1.5 V; ICOM = 100 mA VIS = 1.8 V; ICOM = 100 mA VIN = VIL or VIH VNO or VNC = 0.3 V VCOM = 3.3 V VIN = VIL or VIH VNO 0.3 V or 3.3 V with VNC floating or VNC 0.3 V or 3.3 V with VNO floating VCOM = 0.3 V or 3.3 V VCC 3.0 3.6 3.0 3.6 3.0 3.6 3.6 −5.0 Min Max 0.5 0.5 0.15 0.15 0.05 0.05 5.0 −10 −40°C to +85°C Min Max 0.5 0.5 0.15 0.15 0.05 0.05 10 nA Unit W RFLAT DRON W W INC(OFF) INO(OFF) ICOM(ON) NC or NO Off Leakage Current (Note 7) COM ON Leakage Current (Note 7) 3.6 −10 10 −100 100 nA 7. Guaranteed by design. Resistance measurements do not include test circuit or package resistance. 8. Flatness is defined as the difference between the maximum and minimum value of On−resistance as measured over the specified analog signal ranges. 9. DRON = RON(MAX) − RON(MIN) between NC1 and NC2 or between NO1 and NO2. http://onsemi.com 5 NLAS5223, NLAS5223L AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) Guaranteed Maximum Limit VCC (V) 2.3 − 3.6 2.3 − 3.6 VIS (V) 1.5 1.5 25°C Min Typ* Max 50 30 −40°C to +85°C Min Max 60 40 Unit ns ns ns 3.0 1.5 2 15 Symbol tON tOFF tBBM Parameter Turn−On Time Turn−Off Time Minimum Break−Before−Make Time Test Conditions RL = 50 W, CL = 35 pF (Figures 3 and 4) RL = 50 W, CL = 35 pF (Figures 3 and 4) VIS = 3.0 RL = 50 W, CL = 35 pF (Figure 2) Typical @ 25, VCC = 3.6 V CIN CSN CD Control Pin Input Capacitance SN Port Capacitance D Port Capacitance When Switch is Enabled 3.5 75 240 pF pF pF *Typical Characteristics are at 25°C. ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted) VCC (V) 1.65 − 3.6 25°C Typical 17 Unit MHz Symbol BW Parameter Maximum On−Channel −3 dB Bandwidth or Minimum Frequency Response Maximum Feed−through On Loss Off−Channel Isolation Charge Injection Select Input to Common I/O Total Harmonic Distortion THD + Noise Channel−to−Channel Crosstalk Condition VIN centered between VCC and GND (Figure 5) VIN = 0 dBm @ 100 kHz to 50 MHz VIN centered between VCC and GND (Figure 5) f = 100 kHz; VIS = 1 V RMS; CL = 5.0 pF VIN centered between VCC and GND (Figure 5) VIN = VCC to GND, RIS = 0 W, CL = 1.0 nF Q = CL x DVOUT (Figure 6) FIS = 20 Hz to 20 kHz, RL = Rgen = 600 W, CL = 50 pF VIS = 2.0 V RMS f = 100 kHz; VIS = 1.0 V RMS, CL = 5.0 pF, RL = 50 W VIN centered between VCC and GND (Figure 5) VONL VISO Q THD VCT 1.65 − 3.6 1.65 − 3.6 1.65 − 3.6 3.0 1.65 − 3.6 −0.06 −65 38 0.12 −70 dB dB pC % dB 10. Off−Channel Isolation = 20log10 (VCOM/VNO), VCOM = output, VNO = input to off switch. http://onsemi.com 6 NLAS5223, NLAS5223L DUT VCC 0.1 mF 50 W Output VOUT 35 pF 90% Output Input GND tBMM 90% of VOH VCC Switch Select Pin GND Figure 2. tBBM (Time Break−Before−Make) VCC DUT VCC 0.1 mF Open Output VOUT 50 W 35 pF Output VOL Input tON tOFF Input 0V VOH 90% 90% 50% 50% Figure 3. tON/tOFF VCC DUT Output Open 50 W VOUT 35 pF Input VCC 50% 0V VOH Output VOL 10% tOFF tON 10% 50% Input Figure 4. tON/tOFF http://onsemi.com 7 NLAS5223, NLAS5223L 50 W Reference Input Output 50 W Generator 50 W DUT Transmitted Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction. VISO = Off Channel Isolation = 20 Log VOUT VIN for VIN at 100 kHz VOUT VONL = On Channel Loss = 20 Log VIN for VIN at 100 kHz to 50 MHz Bandwidth (BW) = the frequency 3 dB below VONL VCT = Use VISO setup and test to all other switch analog input/outputs terminated with 50 W Figure 5. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL DUT Open Output VIN VCC GND CL Output Off Off DVOUT VIN On Figure 6. Charge Injection: (Q) http://onsemi.com 8 NLAS5223, NLAS5223L 0 −10 −20 −30 XT (dB) BW (dB) −40 −50 −60 −70 −80 −90 −100 0.01 0.1 1 FREQUENCY (MHz) 10 100 −18 0.01 0.1 1 FREQUENCY (MHz) 10 100 −3 −6 −9 −12 −15 0 Figure 7. Cross Talk vs. Frequency @ VCC = 3.6 V 0.12 0.1 0.08 THD (%) RON (W) 0.06 0.04 0.02 0 10 0.4 0.35 0.3 0.25 0.2 0.15 0.1 0.05 100 1000 FREQUENCY (Hz) 10000 100000 0 0 Figure 8. Bandwidth vs. Frequency 85°C 25°C −40°C 0.5 1 1.5 VIN (V) 2 2.5 3 Figure 9. Total Harmonic Distortion Figure 10. On−Resistance vs. Input Voltage @ VCC = 3.0 V 0.35 0.3 0.25 25°C RON (W) 0.2 −40°C RON (W) 85°C 0.35 0.3 3.0 V 0.25 3.6 V 0.2 0.15 0.1 0.05 0 0 0.5 1 0.15 1.5 2 VIN (V) 2.5 3 3.5 4 0.1 0 0.5 1 1.5 2 VIN (V) 2.5 3 3.5 4 Figure 11. On−Resistance vs. Input Voltage @ VCC = 3.6 V Figure 12. On−Resistance vs. Input Voltage http://onsemi.com 9 NLAS5223, NLAS5223L ORDERING INFORMATION Device NLAS5223MNR2G NLAS5223LMNR2G Package WQFN−10 (Pb−Free) WQFN−10 (Pb−Free) Shipping† 3000 / Tape & Reel 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 10 NLAS5223, NLAS5223L PACKAGE DIMENSIONS WQFN10, 1.4x1.8x0.4P CASE 488AQ−01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 5. EXPOSED PADS CONNECTED TO DIE FLAG. USED AS TEST CONTACTS. DIM A A1 A3 b D E e L L1 MILLIMETERS MIN MAX 0.70 0.80 0.00 0.050 0.20 REF 0.15 0.25 1.40 BSC 1.80 BSC 0.40 BSC 0.30 0.50 0.40 0.60 D A PIN 1 REFERENCE 2X 0.15 C 0.15 C 2X 0.10 C 0.08 C A1 A3 3 9X 5 6 1 L e 0.663 0.0261 0.200 0.0079 L1 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. ÉÉ ÉÉ 10 10 X E B A SEATING PLANE C SOLDERING FOOTPRINT* 1.700 0.0669 9X e/2 0.225 0.0089 b 0.10 C A B 0.05 C NOTE 3 1 1.700 0.0669 0.400 0.0157 PITCH 10 X 0.225 0.0089 SCALE 20:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 11 NLAS5223/D