NLAS5223C, NLAS5223CL
Ultra-Low 0.35 W
Dual SPDT Analog Switch
The NLAS5223C is an advanced CMOS analog switch fabricated in
Sub−micron silicon gate CMOS technology. The device is a dual
Independent Single Pole Double Throw (SPDT) switch featuring
Ultra−Low RON of 0.35 , at VCC = 4.3 V.
The part also features guaranteed Break Before Make (BBM)
switching, assuring the switches never short the driver.
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MARKING
DIAGRAM
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
Ultra−Low RON, 0.35 (typ) at VCC = 4.3 V
NLAS5223C Interfaces with 2.8 V Chipset
NLAS5223CL Interfaces with 1.8 V Chipset
Single Supply Operation from 1.65−4.5 V
Full 0−VCC Signal Handling Capability
High Off−Channel Isolation
Low Standby Current, t50 nA
Low Distortion
RON Flatness of 0.15
High Continuous Current Capability
♦ ±320 mA Through Each Switch
Large Current Clamping Diodes at Analog Inputs
♦ ±100 mA Continuous Current Capability
Package:
♦ 1.4 x 1.8 x 0.55 mm UQFN10 Pb−Free
These are Pb−Free Devices
UQFN10
CASE 488AT
1
XX
M
G
XXMG
G
= Specific Device Code
= Date Code/Assembly Location
= Pb−Free Device
(Note: Microdot may be in either location)
NC2
GND
7
6
IN2
8
5
NC1
COM2
9
4
IN1
10
3
COM1
NO2
Applications
•
•
•
•
Cell Phone Audio Block
Speaker and Earphone Switching
Ring−Tone Chip/Amplifier Switching
Modems
1
2
VCC
NO1
FUNCTION TABLE
IN 1, 2
NO 1, 2
NC 1, 2
0
OFF
ON
1
ON
OFF
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
September, 2015 − Rev. 2
1
Publication Order Number:
NLAS5223C/D
NLAS5223C, NLAS5223CL
COM
NO
NC
IN
Figure 1. Logic Equivalent Circuit
PIN DESCRIPTION
QFN PIN #
Symbol
Name and Function
2, 5, 7, 10
NC1 to NC2, NO1 to NO2
Independent Channels
4, 8
IN1 and IN2
3, 9
COM1 and COM2
Controls
6
GND
Ground (V)
1
VCC
Positive Supply Voltage
Common Channels
MAXIMUM RATINGS
Symbol
Parameter
VCC
Positive DC Supply Voltage
VIS
Analog Input Voltage (VNO, VNC, or VCOM)
VIN
Digital Select Input Voltage
Ianl1
Value
Unit
−0.5 to +7.0
V
−0.5 v VIS v VCC + 0.5
V
−0.5 v VIN v +5.5
V
Continuous DC Current from COM to NC/NO
±320
mA
Ianl−pk1
Peak Current from COM to NC/NO, 10% Duty Cycle, 100 ms = tON (Note 1)
±600
mA
Ianl−pk2
Instantaneous Peak Current from COM to NC/NO, 10% Duty Cycle, tON < 1 s
±850
mA
Iclmp
Continuous DC Current into COM/NO/NC with Respect to VCC or GND
±100
mA
ESD
ESD Withstand Voltage
>3000
V
Human Body Model (HBM)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Defined as 10% ON, 90% OFF Duty Cycle.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage
1.65
4.5
V
VIN
Digital Select Input Voltage (OVT) Overvoltage Tolerance
GND
4.5
V
VIS
Analog Input Voltage (NC, NO, COM)
GND
VCC
V
TA
Operating Temperature Range
−40
+85
°C
tr, tf
Input Rise or Fall Time, SELECT
VCC = 1.6 V − 2.7 V
VCC = 3.0 V − 4.5 V
ns/V
20
10
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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2
NLAS5223C, NLAS5223CL
NLAS5223C DC CHARACTERISTICS − DIGITAL SECTION (Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
VCC
25°C
−40°C to +85°C
Unit
VIH
Minimum High−Level Input Voltage, Select
Inputs
3.0
4.3
1.4
2.0
1.4
2.0
V
VIL
Maximum Low−Level Input Voltage, Select
Inputs
3.0
4.3
0.7
0.8
0.7
0.8
V
IIN
Maximum Input Leakage Current, Select
Inputs
VIN = VCC or GND
4.3
±0.1
±1.0
A
IOFF
Power Off Leakage Current
VIN = VCC or GND
0
±0.5
±2.0
A
ICC
Maximum Quiescent Supply Current
(Note 2)
Select and VIS = VCC or GND
1.65 to 4.5
±1.0
±2.0
A
Condition
2. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
NLAS5223C DC ELECTRICAL CHARACTERISTICS − ANALOG SECTION
Guaranteed Maximum Limit
25°C
Max
Unit
NC/NO On−Resistance
(Note 3)
VIN = VIL or VIN = VIH
VIS = GND to VCC
ICOM = 100 mA
3.0
4.3
0.4
0.35
0.5
0.4
RFLAT
NC/NO On−Resistance Flatness
(Notes 3 and 4)
ICOM = 100 mA
VIS = 0 to VCC
3.0
4.3
0.16
0.11
0.20
0.14
RON
On−Resistance Match Between Channels
(Notes 3 and 5)
VIS = 1.5 V;
ICOM = 100 mA
VIS = 2.2 V;
ICOM = 100 mA
3.0
0.05
0.05
4.3
0.05
0.05
Symbol
RON
Parameter
Condition
VCC
Min
−40°C to +85°C
Max
Min
INC(OFF)
INO(OFF)
NC or NO Off Leakage Current (Note 3)
VIN = VIL or VIH
VNO or VNC = 0.3 V
VCOM = 4.0 V
4.3
−5.0
5.0
−50
50
nA
ICOM(ON)
COM ON
Leakage Current
(Note 3)
VIN = VIL or VIH
VNO 0.3 V or 4.0 V with
VNC floating or
VNC 0.3 V or 4.0 V with
VNO floating
VCOM = 0.3 V or 4.0 V
4.3
−10
10
−100
100
nA
3. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
4. Flatness is defined as the difference between the maximum and minimum value of On−resistance as measured over the specified analog
signal ranges.
5. RON = RON(MAX) − RON(MIN) between NC1 and NC2 or between NO1 and NO2.
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3
NLAS5223C, NLAS5223CL
NLAS5223CL DC CHARACTERISTICS − DIGITAL SECTION (Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
VCC
25°C
−40°C to +85°C
Unit
VIH
Minimum High−Level Input Voltage, Select
Inputs
3.0
4.3
1.3
1.6
1.3
1.6
V
VIL
Maximum Low−Level Input Voltage, Select
Inputs
3.0
4.3
0.5
0.6
0.5
0.6
V
IIN
Maximum Input Leakage Current, Select
Inputs
VIN = 4.5 V or GND
4.3
±0.1
±1.0
A
IOFF
Power Off Leakage Current
VIN = 4.5 V or GND
0
±0.5
±2.0
A
ICC
Maximum Quiescent Supply Current
Select and VIS = VCC or GND
1.65 to 4.5
±1.0
±2.0
A
ICCV
Maximum Quiescent Supply Current, Low
Voltage Driving (Note 6)
VIS = VCC or GND
VIN = 1.65 V
4.3
±145
±150
A
VIS = VCC or GND
VIN = 1.80 V
±125
±130
VIS = VCC or GND
VIN = 2.60 V
±50
±55
Condition
6. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
NLAS5223CL DC ELECTRICAL CHARACTERISTICS − ANALOG SECTION
Guaranteed Maximum Limit
25°C
Symbol
Parameter
Condition
VCC
Min
−40°C to +85°C
Max
Min
Max
Unit
NC/NO On−Resistance
(Note 7)
VIN = VIL or VIN = VIH
VIS = GND to VCC
ICOM = 100 mA
3.0
4.3
0.4
0.35
0.5
0.4
RFLAT
NC/NO On−Resistance Flatness
(Notes 7 and 8)
ICOM = 100 mA
VIS = 0 to VCC
3.0
4.3
0.16
0.11
0.20
0.14
RON
On−Resistance Match Between Channels
(Notes 7 and 9)
VIS = 1.5 V;
ICOM = 100 mA
VIS = 2.2 V;
ICOM = 100 mA
3.0
0.05
0.05
4.3
0.05
0.05
RON
INC(OFF)
INO(OFF)
NC or NO Off Leakage Current (Note 7)
VIN = VIL or VIH
VNO or VNC = 0.3 V
VCOM = 4.0 V
4.3
−10
10
−100
100
nA
ICOM(ON)
COM ON
Leakage Current
(Note 7)
VIN = VIL or VIH
VNO 0.3 V or 4.0 V with
VNC floating or
VNC 0.3 V or 4.0 V with
VNO floating
VCOM = 0.3 V or 4.0 V
4.3
−10
10
−100
100
nA
7. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
8. Flatness is defined as the difference between the maximum and minimum value of On−resistance as measured over the specified analog
signal ranges.
9. RON = RON(MAX) − RON(MIN) between NC1 and NC2 or between NO1 and NO2.
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4
NLAS5223C, NLAS5223CL
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Guaranteed Maximum Limit
Symbol
Parameter
Test Conditions
VCC
(V)
VIS
(V)
25°C
Min
Typ*
−40°C to +85°C
Max
Min
Max
Unit
tON
Turn−On Time
RL = 50 , CL = 35 pF
(Figures 3 and 4)
2.3 − 4.5
1.5
50
60
ns
tOFF
Turn−Off Time
RL = 50 , CL = 35 pF
(Figures 3 and 4)
2.3 − 4.5
1.5
30
40
ns
tBBM
Minimum Break−Before−Make
Time
VIS = 3.0
RL = 50 , CL = 35 pF
(Figure 2)
3.0
1.5
ns
2
15
Typical @ 25, VCC = 3.6 V
CIN
CNO/NC
CCOM
Control Pin Input Capacitance
3.5
pF
NO, NC Port Capacitance
60
pF
COM Port Capacitance When Switch is Enabled
200
pF
*Typical Characteristics are at 25°C.
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
Symbol
BW
Parameter
Condition
25°C
VCC
(V)
Typical
Unit
Maximum On−Channel −3 dB
Bandwidth or Minimum
Frequency Response
VIN centered between VCC and GND
(Figure 5)
1.65 − 4.5
24
MHz
VONL
Maximum Feed−through On Loss
VIN = 0 dBm @ 100 kHz to 50 MHz
VIN centered between VCC and GND (Figure 5)
1.65 − 4.5
−0.06
dB
VISO
Off−Channel Isolation
f = 100 kHz; VIS = 1 V RMS; CL = 5.0 pF
VIN centered between VCC and GND (Figure 5)
1.65 − 4.5
−68
dB
Charge Injection Select Input to
Common I/O
VIN = VCC to GND, RIS = 0 , CL = 1.0 nF
Q = CL x DVOUT (Figure 6)
1.65 − 4.5
38
pC
THD
Total Harmonic Distortion
THD + Noise
FIS = 20 Hz to 20 kHz, RL = Rgen = 600 , CL = 50 pF
VIS = 2.0 V RMS
3.0
0.08
%
VCT
Channel−to−Channel Crosstalk
f = 100 kHz; VIS = 1.0 V RMS, CL = 5.0 pF, RL = 50
VIN centered between VCC and GND (Figure 5)
1.65 − 4.5
−70
dB
Q
10. Off−Channel Isolation = 20log10 (VCOM/VNO), VCOM = output, VNO = input to off switch.
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5
NLAS5223C, NLAS5223CL
VCC
DUT
VIS
Input
Output
GND
VOUT
0.1 F
50
tBMM
35 pF
90%
90% of VOH
Output
Switch Select Pin
GND
Figure 2. tBBM (Time Break−Before−Make)
VCC
Input
DUT
VIS
0.1 F
50%
Output
VOUT
Open
50%
0V
50
VOH
90%
35 pF
90%
Output
VOL
Input
tON
tOFF
Figure 3. tON/tOFF
VCC
VCC
Input
DUT
Output
50
50%
0V
VOUT
Open
50%
VOH
35 pF
Output
Input
tOFF
Figure 4. tON/tOFF
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6
10%
10%
VOL
tON
NLAS5223C, NLAS5223CL
50
DUT
Reference
Transmitted
Input
Output
50 Generator
50
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction.
ǒVVOUT
Ǔ for VIN at 100 kHz
IN
VOUT
Ǔ for VIN at 100 kHz to 50 MHz
VONL = On Channel Loss = 20 Logǒ
VIN
VISO = Off Channel Isolation = 20 Log
Bandwidth (BW) = the frequency 3 dB below VONL
VCT = Use VISO setup and test to all other switch analog input/outputs terminated with 50
Figure 5. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
VCC
VIN
Output
Open
GND
CL
Output
Off
VIN
Figure 6. Charge Injection: (Q)
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7
On
Off
VOUT
NLAS5223C, NLAS5223CL
0
0
−10
−5
−30
−10
BW (dB)
CROSS TALK (dB)
−20
−40
−50
−60
−15
−20
−70
−25
−80
−90
10k
100k
1M
10M
1.00E+05
1.00E+07
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 7. Cross Talk vs. Frequency
(VCC = 3.0 V)
Figure 8. Bandwidth
(VCC = 3.0 V)
0
0.12
−20
OFF ISOLATION (dB)
0.14
0.1
THD (%)
−30
1.00E+03
100M
0.08
0.06
0.04
1.00E+09
−40
−60
−80
−100
0.02
0
10
1k
100
10k
−120
10k
100k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 9. Total Harmonic Distortion
(VCC = 3.0 V)
Figure 10. Off Isolation
(VCC = 3.0 V)
0.45
100M
0.55
0.50
0.40
0.35
RON ()
RON ()
VCC = 3.0 V
0.30
0.45
TA = 85°C
0.40
TA = 25°C
0.35
TA = −40°C
VCC = 4.3 V
0.30
0.25
0.25
0.20
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0.20
0.0
4.5
0.5
1.0
1.5
2.0
2.5
VIN (V)
VIN (V)
Figure 11. On−Resistance vs. Input Voltage
@ 255C and VCC = 3.0 V and 4.3 V
Figure 12. On−Resistance vs. Input Voltage
@ VCC = 3.0 V, TA = −405C to 855C
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8
3.0
NLAS5223C, NLAS5223CL
0.45
RON ()
0.40
0.35
TA = 85°C
0.30
TA = 25°C
0.25
TA = −40°C
0.20
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VIN (V)
Figure 13. On−Resistance vs. Input Voltage
@ VCC = 3.0 V, TA = −405C to 855C
ORDERING INFORMATION
Marking
Package
Shipping†
NLAS5223CMUTAG
AK
UQFN10
(Pb−Free)
3000 / Tape & Reel
NLAS5223CLMUTAG
AU
UQFN10
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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9
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UQFN10 1.4x1.8, 0.4P
CASE 488AT−01
ISSUE A
DATE 01 AUG 2007
1
SCALE 5:1
EDGE OF PACKAGE
D
ÉÉÉ
ÉÉÉ
ÉÉÉ
PIN 1 REFERENCE
2X
2X
A
0.10 C
L1
E
0.10 C
B
TOP VIEW
A1
0.05 C
A1
C
SIDE VIEW
3
9X
EXPOSED Cu
A
0.05 C
10X
DETAIL A
Bottom View
(Optional)
5
ÉÉÉ
ÉÉÉ
SEATING
PLANE
DETAIL B
Side View
(Optional)
6
e
1
10
10 X
L3
b
A3
DIM
A
A1
A3
b
D
E
e
L
L1
L3
MILLIMETERS
MIN
MAX
0.45
0.60
0.00
0.05
0.127 REF
0.15
0.25
1.40 BSC
1.80 BSC
0.40 BSC
0.30
0.50
0.00
0.15
0.40
0.60
GENERIC
MARKING DIAGRAM*
XXMG
G
e/2
L
MOLD CMPD
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30 MM
FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
XX
= Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
0.10 C A B
0.05 C
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
NOTE 3
BOTTOM VIEW
MOUNTING FOOTPRINT
1.700
0.0669
0.663
0.0261
0.200
0.0079
9X
0.563
0.0221
1
2.100
0.0827
0.400
0.0157
PITCH
DOCUMENT NUMBER:
DESCRIPTION:
10 X
0.225
0.0089
SCALE 20:1
98AON22493D
mm Ǔ
ǒinches
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
10 PIN UQFN, 1.4 X 1.8, 0.4P
PAGE 1 OF 1
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ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
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, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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